Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2002,2003 Oliver Kurth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	     (c) 2003,2004 Joerg Albert <joerg.albert@gmx.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *	     (c) 2007 Guido Guenther <agx@sigxcpu.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * This driver was based on information from the Sourceforge driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * released and maintained by Atmel:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *  http://sourceforge.net/projects/atmelwlandriver/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Although the code was completely re-written,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  * it would have been impossible without Atmel's decision to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * release an Open Source driver (unfortunately the firmware was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * kept binary only). Thanks for that decision to Atmel!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #ifndef _AT76_USB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define _AT76_USB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) /* Board types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) enum board_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	BOARD_503_ISL3861 = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	BOARD_503_ISL3863 = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	BOARD_503 = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	BOARD_503_ACC = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	BOARD_505 = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	BOARD_505_2958 = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	BOARD_505A = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	BOARD_505AMX = 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define CMD_STATUS_IDLE				0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define CMD_STATUS_COMPLETE			0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define CMD_STATUS_UNKNOWN			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define CMD_STATUS_INVALID_PARAMETER		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define CMD_STATUS_FUNCTION_NOT_SUPPORTED	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define CMD_STATUS_TIME_OUT			0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define CMD_STATUS_IN_PROGRESS			0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define CMD_STATUS_HOST_FAILURE			0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define CMD_STATUS_SCAN_FAILED			0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* answers to get op mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define OPMODE_NONE				0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define OPMODE_NORMAL_NIC_WITH_FLASH		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define OPMODE_HW_CONFIG_MODE			0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define OPMODE_DFU_MODE_WITH_FLASH		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define OPMODE_NORMAL_NIC_WITHOUT_FLASH		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define CMD_SET_MIB		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define CMD_GET_MIB		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define CMD_SCAN		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define CMD_JOIN		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define CMD_START_IBSS		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define CMD_RADIO_ON		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define CMD_RADIO_OFF		0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define CMD_STARTUP		0x0B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define MIB_LOCAL		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define MIB_MAC_ADDR		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define MIB_MAC			0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define MIB_MAC_MGMT		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define MIB_MAC_WEP		0x06
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define MIB_PHY			0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define MIB_FW_VERSION		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define MIB_MDOMAIN		0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define ADHOC_MODE		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define INFRASTRUCTURE_MODE	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) /* values for struct mib_local, field preamble_type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define PREAMBLE_TYPE_LONG	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define PREAMBLE_TYPE_SHORT	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define PREAMBLE_TYPE_AUTO	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) /* values for tx_rate */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define TX_RATE_1MBIT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define TX_RATE_2MBIT		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define TX_RATE_5_5MBIT 	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define TX_RATE_11MBIT		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define TX_RATE_AUTO		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) /* power management modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define AT76_PM_OFF		1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define AT76_PM_ON		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define AT76_PM_SMART		3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) struct hwcfg_r505 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	u8 cr39_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	u8 reserved1[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	u8 bb_cr[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	u8 pidvid[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	u8 regulatory_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	u8 reserved2[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	u8 cr15_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	u8 reserved3[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct hwcfg_rfmd {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	u8 cr20_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	u8 cr21_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	u8 bb_cr[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	u8 pidvid[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	u8 regulatory_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	u8 low_power_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 normal_power_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	u8 reserved1[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct hwcfg_intersil {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	u8 cr31_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	u8 cr58_values[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	u8 pidvid[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	u8 regulatory_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	u8 reserved[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) union at76_hwcfg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	struct hwcfg_intersil i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	struct hwcfg_rfmd r3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	struct hwcfg_r505 r5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define WEP_SMALL_KEY_LEN	(40 / 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define WEP_LARGE_KEY_LEN	(104 / 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define WEP_KEYS		(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct at76_card_config {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	u8 exclude_unencrypted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	u8 promiscuous_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	u8 short_retry_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	u8 encryption_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	__le16 rts_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	__le16 fragmentation_threshold;	/* 256..2346 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	u8 basic_rate_set[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	u8 auto_rate_fallback;	/* 0,1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	u8 privacy_invoked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	u8 wep_default_key_id;	/* 0..3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	u8 current_ssid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	u8 wep_default_key_value[4][WEP_LARGE_KEY_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	u8 ssid_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	u8 short_preamble;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	__le16 beacon_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct at76_command {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	u8 cmd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	__le16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	u8 data[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* Length of Atmel-specific Rx header before 802.11 frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define AT76_RX_HDRLEN offsetof(struct at76_rx_buffer, packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct at76_rx_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	__le16 wlength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	u8 rx_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	u8 newbss;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	u8 fragmentation;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	u8 rssi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	u8 link_quality;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	u8 noise_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	__le32 rx_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Length of Atmel-specific Tx header before 802.11 frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define AT76_TX_HDRLEN offsetof(struct at76_tx_buffer, packet)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct at76_tx_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	__le16 wlength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	u8 tx_rate;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	u8 padding;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	u8 reserved[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	u8 packet[IEEE80211_MAX_FRAG_THRESHOLD];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) /* defines for scan_type below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define SCAN_TYPE_ACTIVE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define SCAN_TYPE_PASSIVE	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct at76_req_scan {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	u8 bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	u8 essid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	u8 scan_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	__le16 probe_delay;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	__le16 min_channel_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	__le16 max_channel_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	u8 essid_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	u8 international_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct at76_req_ibss {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	u8 bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	u8 essid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	u8 bss_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	u8 essid_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct at76_req_join {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	u8 bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	u8 essid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	u8 bss_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	u8 channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	__le16 timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	u8 essid_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) struct mib_local {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	u16 reserved0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	u8 beacon_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 	u8 txautorate_fallback;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	u8 reserved1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	u8 ssid_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	u8 promiscuous_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	u16 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	u8 preamble_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	u16 reserved3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct mib_mac_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	u8 res[2];		/* ??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	u8 group_addr[4][ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	u8 group_addr_status[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) struct mib_mac {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	__le32 max_tx_msdu_lifetime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	__le32 max_rx_lifetime;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	__le16 frag_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	__le16 rts_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	__le16 cwmin;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	__le16 cwmax;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	u8 short_retry_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	u8 long_retry_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	u8 scan_type;		/* active or passive */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	u8 scan_channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	__le16 probe_delay;	/* delay before ProbeReq in active scan, RO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	__le16 min_channel_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	__le16 max_channel_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	__le16 listen_interval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	u8 desired_ssid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	u8 desired_bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	u8 desired_bsstype;	/* ad-hoc or infrastructure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	u8 reserved2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct mib_mac_mgmt {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 	__le16 beacon_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 	__le16 CFP_max_duration;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	__le16 medium_occupancy_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	__le16 station_id;	/* assoc id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	__le16 ATIM_window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	u8 CFP_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	u8 privacy_option_implemented;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	u8 DTIM_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	u8 CFP_period;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	u8 current_bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	u8 current_essid[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	u8 current_bss_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	u8 power_mgmt_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	/* rfmd and 505 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	u8 ibss_change;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	u8 res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	u8 multi_domain_capability_implemented;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	u8 multi_domain_capability_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	u8 country_string[IEEE80211_COUNTRY_STRING_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	u8 reserved[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) struct mib_mac_wep {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	u8 privacy_invoked;	/* 0 disable encr., 1 enable encr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	u8 wep_default_key_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	u8 wep_key_mapping_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	u8 exclude_unencrypted;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	__le32 wep_icv_error_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	__le32 wep_excluded_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	u8 wep_default_keyvalue[WEP_KEYS][WEP_LARGE_KEY_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	u8 encryption_level;	/* 1 for 40bit, 2 for 104bit encryption */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) struct mib_phy {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	__le32 ed_threshold;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	__le16 slot_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	__le16 sifs_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	__le16 preamble_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	__le16 plcp_header_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	__le16 mpdu_max_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	__le16 cca_mode_supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	u8 operation_rate_set[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	u8 channel_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	u8 current_cca_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	u8 phy_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	u8 current_reg_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) struct mib_fw_version {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	u8 major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	u8 minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	u8 patch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	u8 build;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct mib_mdomain {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	u8 tx_powerlevel[14];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	u8 channel_list[14];	/* 0 for invalid channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) struct set_mib_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	u8 type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	u8 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	u8 index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	u8 reserved;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		__le16 word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		u8 addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		struct mib_mac_wep wep_mib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	} data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) struct at76_fw_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	__le32 crc;		/* CRC32 of the whole image */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	__le32 board_type;	/* firmware compatibility code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	u8 build;		/* firmware build number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	u8 patch;		/* firmware patch level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	u8 minor;		/* firmware minor version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	u8 major;		/* firmware major version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 	__le32 str_offset;	/* offset of the copyright string */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	__le32 int_fw_offset;	/* internal firmware image offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	__le32 int_fw_len;	/* internal firmware image length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	__le32 ext_fw_offset;	/* external firmware image offset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	__le32 ext_fw_len;	/* external firmware image length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) } __packed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* a description of a regulatory domain and the allowed channels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) struct reg_domain {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	u16 code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	char const *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	u32 channel_map;	/* if bit N is set, channel (N+1) is allowed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) /* Data for one loaded firmware file */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct fwentry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	const char *const fwname;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	const struct firmware *fw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	int extfw_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	int intfw_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	/* pointer to loaded firmware, no need to free */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	u8 *extfw;		/* external firmware, extfw_size bytes long */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	u8 *intfw;		/* internal firmware, intfw_size bytes long */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	enum board_type board_type;	/* board type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	struct mib_fw_version fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	int loaded;		/* Loaded and parsed successfully */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct at76_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) 	struct usb_device *udev;	/* USB device pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	struct sk_buff *rx_skb;	/* skbuff for receiving data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	struct sk_buff *tx_skb;	/* skbuff for transmitting data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	void *bulk_out_buffer;	/* buffer for sending data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) 	struct urb *tx_urb;	/* URB for sending data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	struct urb *rx_urb;	/* URB for receiving data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	unsigned int tx_pipe;	/* bulk out pipe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	unsigned int rx_pipe;	/* bulk in pipe */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 	struct mutex mtx;	/* locks this structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	/* work queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	struct work_struct work_set_promisc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	struct work_struct work_submit_rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	struct work_struct work_join_bssid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 	struct delayed_work dwork_hw_scan;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	struct tasklet_struct rx_tasklet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	/* the WEP stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	int wep_enabled;	/* 1 if WEP is enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	int wep_key_id;		/* key id to be used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 	u8 wep_keys[WEP_KEYS][WEP_LARGE_KEY_LEN];	/* WEP keys */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	u8 wep_keys_len[WEP_KEYS];	/* length of WEP keys */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) 	int channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	int iw_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	u8 bssid[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	u8 essid[IW_ESSID_MAX_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	int essid_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 	int radio_on;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	int promisc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	int preamble_type;	/* 0 - long, 1 - short, 2 - auto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	int auth_mode;		/* authentication type: 0 open, 1 shared key */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 	int txrate;		/* 0,1,2,3 = 1,2,5.5,11 Mbps, 4 is auto */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) 	int frag_threshold;	/* threshold for fragmentation of tx packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	int rts_threshold;	/* threshold for RTS mechanism */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	int short_retry_limit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	int scan_min_time;	/* scan min channel time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	int scan_max_time;	/* scan max channel time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	int scan_mode;		/* SCAN_TYPE_ACTIVE, SCAN_TYPE_PASSIVE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	int scan_need_any;	/* if set, need to scan for any ESSID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	bool scanning;		/* if set, the scan is running */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	u16 assoc_id;		/* current association ID, if associated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	u8 pm_mode;		/* power management mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	u32 pm_period;		/* power management period in microseconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	struct reg_domain const *domain;	/* reg domain description */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) 	/* These fields contain HW config provided by the device (not all of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 	 * these fields are used by all board types) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 	u8 mac_addr[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) 	u8 regulatory_domain;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 	struct at76_card_config card_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 	enum board_type board_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 	struct mib_fw_version fw_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) 	unsigned int device_unplugged:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 	unsigned int netdev_registered:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 	struct set_mib_buffer mib_buf;	/* global buffer for set_mib calls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 	int beacon_period;	/* period of mgmt beacons, Kus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) 	struct ieee80211_hw *hw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 	int mac80211_registered;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) #define AT76_SUPPORTED_FILTERS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) #define SCAN_POLL_INTERVAL	(HZ / 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) #define CMD_COMPLETION_TIMEOUT	(5 * HZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) #define DEF_RTS_THRESHOLD	1536
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) #define DEF_FRAG_THRESHOLD	1536
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) #define DEF_SHORT_RETRY_LIMIT	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #define DEF_CHANNEL		10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) #define DEF_SCAN_MIN_TIME	10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #define DEF_SCAN_MAX_TIME	120
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* the max padding size for tx in bytes (see calc_padding) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) #define MAX_PADDING_SIZE	53
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) #endif				/* _AT76_USB_H */