^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (c) 2009 Atheros Communications Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Permission to use, copy, modify, and/or distribute this software for any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * purpose with or without fee is hereby granted, provided that the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * copyright notice and this permission notice appear in all copies.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/unaligned.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "ath.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define REG_READ (common->ops->read)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define REG_WRITE(_ah, _reg, _val) (common->ops->write)(_ah, _val, _reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * ath_hw_set_bssid_mask - filter out bssids we listen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * @common: the ath_common struct for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * BSSID masking is a method used by AR5212 and newer hardware to inform PCU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * which bits of the interface's MAC address should be looked at when trying
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * to decide which packets to ACK. In station mode and AP mode with a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * BSS every bit matters since we lock to only one BSS. In AP mode with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * multiple BSSes (virtual interfaces) not every bit matters because hw must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * accept frames for all BSSes and so we tweak some bits of our mac address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * in order to have multiple BSSes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * NOTE: This is a simple filter and does *not* filter out all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * relevant frames. Some frames that are not for us might get ACKed from us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * by PCU because they just match the mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * When handling multiple BSSes you can get the BSSID mask by computing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * set of ~ ( MAC XOR BSSID ) for all bssids we handle.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * When you do this you are essentially computing the common bits of all your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * BSSes. Later it is assumed the hardware will "and" (&) the BSSID mask with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * the MAC address to obtain the relevant bits and compare the result with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * (frame's BSSID & mask) to see if they match.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * Simple example: on your card you have have two BSSes you have created with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * BSSID-01 and BSSID-02. Lets assume BSSID-01 will not use the MAC address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * There is another BSSID-03 but you are not part of it. For simplicity's sake,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * assuming only 4 bits for a mac address and for BSSIDs you can then have:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * MAC: 0001 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * BSSID-01: 0100 | --> Belongs to us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * BSSID-02: 1001 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * -------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * BSSID-03: 0110 | --> External
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * -------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Our bssid_mask would then be:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * On loop iteration for BSSID-01:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * ~(0001 ^ 0100) -> ~(0101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * -> 1010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * bssid_mask = 1010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * On loop iteration for BSSID-02:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * bssid_mask &= ~(0001 ^ 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * bssid_mask = (1010) & ~(0001 ^ 1001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * bssid_mask = (1010) & ~(1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * bssid_mask = (1010) & (0111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * bssid_mask = 0010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * A bssid_mask of 0010 means "only pay attention to the second least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * significant bit". This is because its the only bit common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * amongst the MAC and all BSSIDs we support. To findout what the real
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * common bit is we can simply "&" the bssid_mask now with any BSSID we have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * or our MAC address (we assume the hardware uses the MAC address).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Now, suppose there's an incoming frame for BSSID-03:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * IFRAME-01: 0110
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * An easy eye-inspeciton of this already should tell you that this frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * will not pass our check. This is because the bssid_mask tells the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * hardware to only look at the second least significant bit and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * common bit amongst the MAC and BSSIDs is 0, this frame has the 2nd LSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * as 1, which does not match 0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * So with IFRAME-01 we *assume* the hardware will do:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * allow = (IFRAME-01 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * --> allow = (0110 & 0010) == (0010 & 0001) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * --> allow = (0010) == 0000 ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * --> allow = 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * Lets now test a frame that should work:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * IFRAME-02: 0001 (we should allow)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * allow = (IFRAME-02 & bssid_mask) == (bssid_mask & MAC) ? 1 : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * --> allow = (0001 & 0010) == (0010 & 0001) ? 1 :0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * --> allow = (0000) == (0000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * --> allow = 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Other examples:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * IFRAME-03: 0100 --> allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * IFRAME-04: 1001 --> allowed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * IFRAME-05: 1101 --> allowed but its not for us!!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void ath_hw_setbssidmask(struct ath_common *common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) void *ah = common->ah;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u32 id1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) REG_WRITE(ah, AR_STA_ID0, get_unaligned_le32(common->macaddr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) id1 = REG_READ(ah, AR_STA_ID1) & ~AR_STA_ID1_SADH_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) id1 |= get_unaligned_le16(common->macaddr + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) REG_WRITE(ah, AR_STA_ID1, id1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) REG_WRITE(ah, AR_BSSMSKL, get_unaligned_le32(common->bssidmask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) REG_WRITE(ah, AR_BSSMSKU, get_unaligned_le16(common->bssidmask + 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) EXPORT_SYMBOL(ath_hw_setbssidmask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * ath_hw_cycle_counters_update - common function to update cycle counters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * @common: the ath_common struct for the device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * This function is used to update all cycle counters in one place.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * It has to be called while holding common->cc_lock!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void ath_hw_cycle_counters_update(struct ath_common *common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u32 cycles, busy, rx, tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void *ah = common->ah;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* freeze */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) REG_WRITE(ah, AR_MIBC, AR_MIBC_FMC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) cycles = REG_READ(ah, AR_CCCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) busy = REG_READ(ah, AR_RCCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) rx = REG_READ(ah, AR_RFCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) tx = REG_READ(ah, AR_TFCNT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* clear */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) REG_WRITE(ah, AR_CCCNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) REG_WRITE(ah, AR_RFCNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) REG_WRITE(ah, AR_RCCNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) REG_WRITE(ah, AR_TFCNT, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* unfreeze */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) REG_WRITE(ah, AR_MIBC, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* update all cycle counters here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) common->cc_ani.cycles += cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) common->cc_ani.rx_busy += busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) common->cc_ani.rx_frame += rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) common->cc_ani.tx_frame += tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) common->cc_survey.cycles += cycles;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) common->cc_survey.rx_busy += busy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) common->cc_survey.rx_frame += rx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) common->cc_survey.tx_frame += tx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) EXPORT_SYMBOL(ath_hw_cycle_counters_update);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int32_t ath_hw_get_listen_time(struct ath_common *common)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) struct ath_cycle_counters *cc = &common->cc_ani;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int32_t listen_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) listen_time = (cc->cycles - cc->rx_frame - cc->tx_frame) /
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) (common->clockrate * 1000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) memset(cc, 0, sizeof(*cc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return listen_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) EXPORT_SYMBOL(ath_hw_get_listen_time);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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