^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* CoreChip-sz SR9800 one chip USB 2.0 Ethernet Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Author : Liu Junliang <liujunliang_ljl@163.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Based on asix_common.c, asix_devices.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file is licensed under the terms of the GNU General Public License
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * version 2. This program is licensed "as is" without any warranty of any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * kind, whether express or implied.*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kmod.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/workqueue.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mii.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/usb/usbnet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/if_vlan.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "sr9800.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static int sr_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) err = usbnet_read_cmd(dev, cmd, SR_REQ_RD_REG, value, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if ((err != size) && (err >= 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int sr_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) err = usbnet_write_cmd(dev, cmd, SR_REQ_WR_REG, value, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) if ((err != size) && (err >= 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) err = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) sr_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value, u16 index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) usbnet_write_cmd_async(dev, cmd, SR_REQ_WR_REG, value, index, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static int sr_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* This check is no longer done by usbnet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (skb->len < dev->net->hard_header_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) while (offset + sizeof(u32) < skb->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct sk_buff *sr_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u16 size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 header = get_unaligned_le32(skb->data + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) offset += sizeof(u32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* get the packet length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) size = (u16) (header & 0x7ff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) if (size != ((~header >> 16) & 0x07ff)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) netdev_err(dev->net, "%s : Bad Header Length\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if ((size > dev->net->mtu + ETH_HLEN + VLAN_HLEN) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) (size + offset > skb->len)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) netdev_err(dev->net, "%s : Bad RX Length %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) __func__, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) sr_skb = netdev_alloc_skb_ip_align(dev->net, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!sr_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) skb_put(sr_skb, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) memcpy(sr_skb->data, skb->data + offset, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) usbnet_skb_return(dev, sr_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) offset += (size + 1) & 0xfffe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (skb->len != offset) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) netdev_err(dev->net, "%s : Bad SKB Length %d\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static struct sk_buff *sr_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int headroom = skb_headroom(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int tailroom = skb_tailroom(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) u32 padbytes = 0xffff0000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) u32 packet_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int padlen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) void *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) padlen = ((skb->len + 4) % (dev->maxpacket - 1)) ? 0 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if ((!skb_cloned(skb)) && ((headroom + tailroom) >= (4 + padlen))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if ((headroom < 4) || (tailroom < padlen)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) skb->data = memmove(skb->head + 4, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) skb_set_tail_pointer(skb, skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) struct sk_buff *skb2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) skb2 = skb_copy_expand(skb, 4, padlen, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) dev_kfree_skb_any(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) skb = skb2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ptr = skb_push(skb, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) packet_len = (((skb->len - 4) ^ 0x0000ffff) << 16) + (skb->len - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) put_unaligned_le32(packet_len, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (padlen) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) put_unaligned_le32(padbytes, skb_tail_pointer(skb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) skb_put(skb, sizeof(padbytes));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) usbnet_set_skb_tx_stats(skb, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void sr_status(struct usbnet *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct sr9800_int_data *event;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (urb->actual_length < 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) event = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) link = event->link & 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (netif_carrier_ok(dev->net) != link) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) usbnet_link_change(dev, link, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) netdev_dbg(dev->net, "Link Status is: %d\n", link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) static inline int sr_set_sw_mii(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) ret = sr_write_cmd(dev, SR_CMD_SET_SW_MII, 0x0000, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) netdev_err(dev->net, "Failed to enable software MII access\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static inline int sr_set_hw_mii(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ret = sr_write_cmd(dev, SR_CMD_SET_HW_MII, 0x0000, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) netdev_err(dev->net, "Failed to enable hardware MII access\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) static inline int sr_get_phy_addr(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) u8 buf[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ret = sr_read_cmd(dev, SR_CMD_READ_PHY_ID, 0, 0, 2, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) netdev_err(dev->net, "%s : Error reading PHYID register:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) __func__, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) netdev_dbg(dev->net, "%s : returning 0x%04x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *((__le16 *)buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ret = buf[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static int sr_sw_reset(struct usbnet *dev, u8 flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ret = sr_write_cmd(dev, SR_CMD_SW_RESET, flags, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) netdev_err(dev->net, "Failed to send software reset:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static u16 sr_read_rx_ctl(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) __le16 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ret = sr_read_cmd(dev, SR_CMD_READ_RX_CTL, 0, 0, 2, &v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) netdev_err(dev->net, "Error reading RX_CTL register:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ret = le16_to_cpu(v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) static int sr_write_rx_ctl(struct usbnet *dev, u16 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) ret = sr_write_cmd(dev, SR_CMD_WRITE_RX_CTL, mode, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) netdev_err(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) "Failed to write RX_CTL mode to 0x%04x:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) mode, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static u16 sr_read_medium_status(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) __le16 v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) ret = sr_read_cmd(dev, SR_CMD_READ_MEDIUM_STATUS, 0, 0, 2, &v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) netdev_err(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) "Error reading Medium Status register:%02x\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) return ret; /* TODO: callers not checking for error ret */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return le16_to_cpu(v);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) static int sr_write_medium_mode(struct usbnet *dev, u16 mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) netdev_dbg(dev->net, "%s : mode = 0x%04x\n", __func__, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ret = sr_write_cmd(dev, SR_CMD_WRITE_MEDIUM_MODE, mode, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) netdev_err(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) "Failed to write Medium Mode mode to 0x%04x:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) mode, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) static int sr_write_gpio(struct usbnet *dev, u16 value, int sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) netdev_dbg(dev->net, "%s : value = 0x%04x\n", __func__, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ret = sr_write_cmd(dev, SR_CMD_WRITE_GPIOS, value, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) netdev_err(dev->net, "Failed to write GPIO value 0x%04x:%02x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) value, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (sleep)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) msleep(sleep);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) /* SR9800 have a 16-bit RX_CTL value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static void sr_set_multicast(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct sr_data *data = (struct sr_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) u16 rx_ctl = SR_DEFAULT_RX_CTL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (net->flags & IFF_PROMISC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) rx_ctl |= SR_RX_CTL_PRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) } else if (net->flags & IFF_ALLMULTI ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) netdev_mc_count(net) > SR_MAX_MCAST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) rx_ctl |= SR_RX_CTL_AMALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) } else if (netdev_mc_empty(net)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /* just broadcast and directed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* We use the 20 byte dev->data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * for our 8 byte filter buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * to avoid allocating memory that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) * is tricky to free later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) struct netdev_hw_addr *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) u32 crc_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) memset(data->multi_filter, 0, SR_MCAST_FILTER_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) /* Build the multicast hash filter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) netdev_for_each_mc_addr(ha, net) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) data->multi_filter[crc_bits >> 3] |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 1 << (crc_bits & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) sr_write_cmd_async(dev, SR_CMD_WRITE_MULTI_FILTER, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SR_MCAST_FILTER_SIZE, data->multi_filter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) rx_ctl |= SR_RX_CTL_AM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) sr_write_cmd_async(dev, SR_CMD_WRITE_RX_CTL, rx_ctl, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) static int sr_mdio_read(struct net_device *net, int phy_id, int loc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) __le16 res = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) mutex_lock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) sr_set_sw_mii(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) sr_read_cmd(dev, SR_CMD_READ_MII_REG, phy_id, (__u16)loc, 2, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) sr_set_hw_mii(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) mutex_unlock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) netdev_dbg(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) "%s : phy_id=0x%02x, loc=0x%02x, returns=0x%04x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) phy_id, loc, le16_to_cpu(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) return le16_to_cpu(res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) sr_mdio_write(struct net_device *net, int phy_id, int loc, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) __le16 res = cpu_to_le16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) netdev_dbg(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) "%s : phy_id=0x%02x, loc=0x%02x, val=0x%04x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) phy_id, loc, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) mutex_lock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) sr_set_sw_mii(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) sr_write_cmd(dev, SR_CMD_WRITE_MII_REG, phy_id, (__u16)loc, 2, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) sr_set_hw_mii(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) mutex_unlock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) static u32 sr_get_phyid(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) int phy_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u32 phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* Poll for the rare case the FW or phy isn't ready yet. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) for (i = 0; i < 100; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (phy_reg != 0 && phy_reg != 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mdelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) if (phy_reg <= 0 || phy_reg == 0xFFFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) phy_id = (phy_reg & 0xffff) << 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (phy_reg < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) phy_id |= (phy_reg & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) return phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) sr_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) u8 opt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) if (sr_read_cmd(dev, SR_CMD_READ_MONITOR_MODE, 0, 0, 1, &opt) < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) wolinfo->supported = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) wolinfo->wolopts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) wolinfo->supported = WAKE_PHY | WAKE_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) wolinfo->wolopts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (opt & SR_MONITOR_LINK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) wolinfo->wolopts |= WAKE_PHY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (opt & SR_MONITOR_MAGIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) wolinfo->wolopts |= WAKE_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) sr_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) u8 opt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (wolinfo->wolopts & ~(WAKE_PHY | WAKE_MAGIC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) if (wolinfo->wolopts & WAKE_PHY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) opt |= SR_MONITOR_LINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (wolinfo->wolopts & WAKE_MAGIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) opt |= SR_MONITOR_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (sr_write_cmd(dev, SR_CMD_WRITE_MONITOR_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) opt, 0, 0, NULL) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int sr_get_eeprom_len(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) struct sr_data *data = (struct sr_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return data->eeprom_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int sr_get_eeprom(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct ethtool_eeprom *eeprom, u8 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) __le16 *ebuf = (__le16 *)data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) /* Crude hack to ensure that we don't overwrite memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) * if an odd length is supplied
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (eeprom->len % 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) eeprom->magic = SR_EEPROM_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) /* sr9800 returns 2 bytes from eeprom on read */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) for (i = 0; i < eeprom->len / 2; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ret = sr_read_cmd(dev, SR_CMD_READ_EEPROM, eeprom->offset + i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) 0, 2, &ebuf[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static void sr_get_drvinfo(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) struct ethtool_drvinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Inherit standard device info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) usbnet_get_drvinfo(net, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) strncpy(info->driver, DRIVER_NAME, sizeof(info->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) strncpy(info->version, DRIVER_VERSION, sizeof(info->version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) static u32 sr_get_link(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return mii_link_ok(&dev->mii);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) static int sr_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static int sr_set_mac_address(struct net_device *net, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) struct sr_data *data = (struct sr_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) struct sockaddr *addr = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (netif_running(net))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) if (!is_valid_ether_addr(addr->sa_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) return -EADDRNOTAVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) memcpy(net->dev_addr, addr->sa_data, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) /* We use the 20 byte dev->data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * for our 6 byte mac buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) * to avoid allocating memory that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * is tricky to free later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) memcpy(data->mac_addr, addr->sa_data, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) sr_write_cmd_async(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) data->mac_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static const struct ethtool_ops sr9800_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) .get_drvinfo = sr_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .get_link = sr_get_link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) .get_msglevel = usbnet_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) .set_msglevel = usbnet_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .get_wol = sr_get_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) .set_wol = sr_set_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) .get_eeprom_len = sr_get_eeprom_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) .get_eeprom = sr_get_eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .nway_reset = usbnet_nway_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) .get_link_ksettings = usbnet_get_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) .set_link_ksettings = usbnet_set_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) static int sr9800_link_reset(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) u16 mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) mii_check_media(&dev->mii, 1, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) mii_ethtool_gset(&dev->mii, &ecmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) mode = SR9800_MEDIUM_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) if (ethtool_cmd_speed(&ecmd) != SPEED_100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) mode &= ~SR_MEDIUM_PS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (ecmd.duplex != DUPLEX_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) mode &= ~SR_MEDIUM_FD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) netdev_dbg(dev->net, "%s : speed: %u duplex: %d mode: 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) __func__, ethtool_cmd_speed(&ecmd), ecmd.duplex, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) sr_write_medium_mode(dev, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) static int sr9800_set_default_mode(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) u16 rx_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) sr_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) sr_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) ADVERTISE_ALL | ADVERTISE_CSMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) mii_nway_restart(&dev->mii);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ret = sr_write_medium_mode(dev, SR9800_MEDIUM_DEFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) ret = sr_write_cmd(dev, SR_CMD_WRITE_IPG012,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) SR9800_IPG0_DEFAULT | SR9800_IPG1_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) SR9800_IPG2_DEFAULT, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) netdev_dbg(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) /* Set RX_CTL to default values with 2k buffer, and enable cactus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ret = sr_write_rx_ctl(dev, SR_DEFAULT_RX_CTL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) rx_ctl = sr_read_rx_ctl(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) rx_ctl = sr_read_medium_status(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) netdev_dbg(dev->net, "Medium Status:0x%04x after all initializations\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static int sr9800_reset(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) struct sr_data *data = (struct sr_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) int ret, embd_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) u16 rx_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) ret = sr_write_gpio(dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) SR_GPIO_RSE | SR_GPIO_GPO_2 | SR_GPIO_GPO2EN, 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) embd_phy = ((sr_get_phy_addr(dev) & 0x1f) == 0x10 ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_PRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) if (embd_phy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ret = sr_sw_reset(dev, SR_SWRESET_PRTE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) rx_ctl = sr_read_rx_ctl(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ret = sr_write_rx_ctl(dev, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) rx_ctl = sr_read_rx_ctl(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ret = sr_sw_reset(dev, SR_SWRESET_PRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ret = sr_sw_reset(dev, SR_SWRESET_IPRL | SR_SWRESET_PRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) ret = sr9800_set_default_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) /* Rewrite MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ret = sr_write_cmd(dev, SR_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) data->mac_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) static const struct net_device_ops sr9800_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .ndo_open = usbnet_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .ndo_stop = usbnet_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) .ndo_start_xmit = usbnet_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) .ndo_tx_timeout = usbnet_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .ndo_change_mtu = usbnet_change_mtu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .ndo_get_stats64 = usbnet_get_stats64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .ndo_set_mac_address = sr_set_mac_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) .ndo_do_ioctl = sr_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) .ndo_set_rx_mode = sr_set_multicast,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static int sr9800_phy_powerup(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /* set the embedded Ethernet PHY in power-down state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) ret = sr_sw_reset(dev, SR_SWRESET_IPPD | SR_SWRESET_IPRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) netdev_err(dev->net, "Failed to power down PHY : %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) /* set the embedded Ethernet PHY in power-up state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) msleep(600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) /* set the embedded Ethernet PHY in reset state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) ret = sr_sw_reset(dev, SR_SWRESET_CLEAR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) netdev_err(dev->net, "Failed to power up PHY: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) msleep(20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /* set the embedded Ethernet PHY in power-up state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) ret = sr_sw_reset(dev, SR_SWRESET_IPRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) netdev_err(dev->net, "Failed to reset PHY: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) static int sr9800_bind(struct usbnet *dev, struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct sr_data *data = (struct sr_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) u16 led01_mux, led23_mux;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) int ret, embd_phy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) u32 phyid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) u16 rx_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) data->eeprom_len = SR9800_EEPROM_LEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) usbnet_get_endpoints(dev, intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) /* LED Setting Rule :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) * AABB:CCDD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) * AA : MFA0(LED0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) * BB : MFA1(LED1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) * CC : MFA2(LED2), Reserved for SR9800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) * DD : MFA3(LED3), Reserved for SR9800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) led01_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_LINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) led23_mux = (SR_LED_MUX_LINK_ACTIVE << 8) | SR_LED_MUX_TX_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) ret = sr_write_cmd(dev, SR_CMD_LED_MUX, led01_mux, led23_mux, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) netdev_err(dev->net, "set LINK LED failed : %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) /* Get the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) ret = sr_read_cmd(dev, SR_CMD_READ_NODE_ID, 0, 0, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) dev->net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) netdev_dbg(dev->net, "Failed to read MAC address: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) netdev_dbg(dev->net, "mac addr : %pM\n", dev->net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* Initialize MII structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) dev->mii.dev = dev->net;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) dev->mii.mdio_read = sr_mdio_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) dev->mii.mdio_write = sr_mdio_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) dev->mii.phy_id_mask = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) dev->mii.reg_num_mask = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) dev->mii.phy_id = sr_get_phy_addr(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) dev->net->netdev_ops = &sr9800_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) dev->net->ethtool_ops = &sr9800_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) embd_phy = ((dev->mii.phy_id & 0x1f) == 0x10 ? 1 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) /* Reset the PHY to normal operation mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) ret = sr_write_cmd(dev, SR_CMD_SW_PHY_SELECT, embd_phy, 0, 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) netdev_dbg(dev->net, "Select PHY #1 failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /* Init PHY routine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) ret = sr9800_phy_powerup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) rx_ctl = sr_read_rx_ctl(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) ret = sr_write_rx_ctl(dev, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) rx_ctl = sr_read_rx_ctl(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) /* Read PHYID register *AFTER* the PHY was reset properly */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) phyid = sr_get_phyid(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) netdev_dbg(dev->net, "PHYID=0x%08x\n", phyid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) /* medium mode setting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) ret = sr9800_set_default_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) if (dev->udev->speed == USB_SPEED_HIGH) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].byte_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].threshold,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) dev->rx_urb_size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_4K].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ret = sr_write_cmd(dev, SR_CMD_BULKIN_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].byte_cnt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].threshold,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) 0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) netdev_err(dev->net, "Reset RX_CTL failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) dev->rx_urb_size =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) SR9800_BULKIN_SIZE[SR9800_MAX_BULKIN_2K].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) netdev_dbg(dev->net, "%s : setting rx_urb_size with : %zu\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) dev->rx_urb_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static const struct driver_info sr9800_driver_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .description = "CoreChip SR9800 USB 2.0 Ethernet",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .bind = sr9800_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .status = sr_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .link_reset = sr9800_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .reset = sr9800_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .flags = DRIVER_FLAG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) .rx_fixup = sr_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) .tx_fixup = sr_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) static const struct usb_device_id products[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) USB_DEVICE(0x0fe6, 0x9800), /* SR9800 Device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) .driver_info = (unsigned long) &sr9800_driver_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) {}, /* END */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) MODULE_DEVICE_TABLE(usb, products);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) static struct usb_driver sr_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) .name = DRIVER_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) .id_table = products,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .probe = usbnet_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) .suspend = usbnet_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) .resume = usbnet_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .disconnect = usbnet_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .supports_autosuspend = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) module_usb_driver(sr_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) MODULE_AUTHOR("Liu Junliang <liujunliang_ljl@163.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) MODULE_VERSION(DRIVER_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) MODULE_DESCRIPTION("SR9800 USB 2.0 USB2NET Dev : http://www.corechip-sz.com");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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