^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * MOSCHIP MCS7830 based (7730/7830/7832) USB 2.0 Ethernet Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * based on usbnet.c, asix.c and the vendor provided mcs7830 driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2010 Andreas Mohr <andi@lisas.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Copyright (c) 2002-2003 TiVo Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Definitions gathered from MOSCHIP, Data Sheet_7830DA.pdf (thanks!).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 2010-12-19: add 7832 USB PID ("functionality same as MCS7830"),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * per active notification by manufacturer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * - support HIF_REG_CONFIG_SLEEPMODE/HIF_REG_CONFIG_TXENABLE (via autopm?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * - implement ethtool_ops get_pauseparam/set_pauseparam
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * via HIF_REG_PAUSE_THRESHOLD (>= revision C only!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * - implement get_eeprom/[set_eeprom]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * - switch PHY on/off on ifup/ifdown (perhaps in usbnet.c, via MII)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * - mcs7830_get_regs() handling is weird: for rev 2 we return 32 regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * can access only ~ 24, remaining user buffer is uninitialized garbage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * - anything else?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/mii.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/usb/usbnet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* requests */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define MCS7830_RD_BMREQ (USB_DIR_IN | USB_TYPE_VENDOR | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) USB_RECIP_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MCS7830_WR_BMREQ (USB_DIR_OUT | USB_TYPE_VENDOR | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) USB_RECIP_DEVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MCS7830_RD_BREQ 0x0E
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MCS7830_WR_BREQ 0x0D
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MCS7830_CTRL_TIMEOUT 1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MCS7830_MAX_MCAST 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MCS7830_VENDOR_ID 0x9710
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MCS7832_PRODUCT_ID 0x7832
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MCS7830_PRODUCT_ID 0x7830
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MCS7730_PRODUCT_ID 0x7730
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define SITECOM_VENDOR_ID 0x0DF6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define LN_030_PRODUCT_ID 0x0021
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MCS7830_MII_ADVERTISE (ADVERTISE_PAUSE_CAP | ADVERTISE_100FULL | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) ADVERTISE_100HALF | ADVERTISE_10FULL | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) ADVERTISE_10HALF | ADVERTISE_CSMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* HIF_REG_XX corresponding index value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) HIF_REG_MULTICAST_HASH = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) HIF_REG_PACKET_GAP1 = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) HIF_REG_PACKET_GAP2 = 0x09,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) HIF_REG_PHY_DATA = 0x0a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) HIF_REG_PHY_CMD1 = 0x0c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) HIF_REG_PHY_CMD1_READ = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) HIF_REG_PHY_CMD1_WRITE = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) HIF_REG_PHY_CMD1_PHYADDR = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) HIF_REG_PHY_CMD2 = 0x0d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) HIF_REG_PHY_CMD2_PEND_FLAG_BIT = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) HIF_REG_PHY_CMD2_READY_FLAG_BIT = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) HIF_REG_CONFIG = 0x0e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* hmm, spec sez: "R/W", "Except bit 3" (likely TXENABLE). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) HIF_REG_CONFIG_CFG = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) HIF_REG_CONFIG_SPEED100 = 0x40,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) HIF_REG_CONFIG_FULLDUPLEX_ENABLE = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) HIF_REG_CONFIG_RXENABLE = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) HIF_REG_CONFIG_TXENABLE = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) HIF_REG_CONFIG_SLEEPMODE = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) HIF_REG_CONFIG_ALLMULTICAST = 0x02,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) HIF_REG_CONFIG_PROMISCUOUS = 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) HIF_REG_ETHERNET_ADDR = 0x0f,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) HIF_REG_FRAME_DROP_COUNTER = 0x15, /* 0..ff; reset: 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) HIF_REG_PAUSE_THRESHOLD = 0x16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) HIF_REG_PAUSE_THRESHOLD_DEFAULT = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* Trailing status byte in Ethernet Rx frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) MCS7830_RX_SHORT_FRAME = 0x01, /* < 64 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) MCS7830_RX_LENGTH_ERROR = 0x02, /* framelen != Ethernet length field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) MCS7830_RX_ALIGNMENT_ERROR = 0x04, /* non-even number of nibbles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MCS7830_RX_CRC_ERROR = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) MCS7830_RX_LARGE_FRAME = 0x10, /* > 1518 bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MCS7830_RX_FRAME_CORRECT = 0x20, /* frame is correct */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* [7:6] reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct mcs7830_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u8 multi_filter[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u8 config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static const char driver_name[] = "MOSCHIP usb-ethernet driver";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static int mcs7830_get_reg(struct usbnet *dev, u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) ret = usbnet_read_cmd(dev, MCS7830_RD_BREQ, MCS7830_RD_BMREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0x0000, index, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) else if (ret < size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return -ENODATA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static int mcs7830_set_reg(struct usbnet *dev, u16 index, u16 size, const void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return usbnet_write_cmd(dev, MCS7830_WR_BREQ, MCS7830_WR_BMREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 0x0000, index, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static void mcs7830_set_reg_async(struct usbnet *dev, u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) usbnet_write_cmd_async(dev, MCS7830_WR_BREQ, MCS7830_WR_BMREQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 0x0000, index, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static int mcs7830_hif_get_mac_address(struct usbnet *dev, unsigned char *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int ret = mcs7830_get_reg(dev, HIF_REG_ETHERNET_ADDR, ETH_ALEN, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static int mcs7830_hif_set_mac_address(struct usbnet *dev, unsigned char *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int ret = mcs7830_set_reg(dev, HIF_REG_ETHERNET_ADDR, ETH_ALEN, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static int mcs7830_set_mac_address(struct net_device *netdev, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) struct usbnet *dev = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct sockaddr *addr = p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (netif_running(netdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (!is_valid_ether_addr(addr->sa_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) return -EADDRNOTAVAIL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) ret = mcs7830_hif_set_mac_address(dev, addr->sa_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /* it worked --> adopt it on netdev side */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int mcs7830_read_phy(struct usbnet *dev, u8 index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) __le16 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) u8 cmd[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) HIF_REG_PHY_CMD1_READ | HIF_REG_PHY_CMD1_PHYADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) HIF_REG_PHY_CMD2_PEND_FLAG_BIT | index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) mutex_lock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* write the MII command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ret = mcs7830_set_reg(dev, HIF_REG_PHY_CMD1, 2, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* wait for the data to become valid, should be within < 1ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ret = mcs7830_get_reg(dev, HIF_REG_PHY_CMD1, 2, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if ((ret < 0) || (cmd[1] & HIF_REG_PHY_CMD2_READY_FLAG_BIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* read actual register contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ret = mcs7830_get_reg(dev, HIF_REG_PHY_DATA, 2, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) ret = le16_to_cpu(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) dev_dbg(&dev->udev->dev, "read PHY reg %02x: %04x (%d tries)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) index, val, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) mutex_unlock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) static int mcs7830_write_phy(struct usbnet *dev, u8 index, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) __le16 le_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) u8 cmd[2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) HIF_REG_PHY_CMD1_WRITE | HIF_REG_PHY_CMD1_PHYADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) HIF_REG_PHY_CMD2_PEND_FLAG_BIT | (index & 0x1F),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) mutex_lock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* write the new register contents */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) le_val = cpu_to_le16(val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) ret = mcs7830_set_reg(dev, HIF_REG_PHY_DATA, 2, &le_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* write the MII command */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ret = mcs7830_set_reg(dev, HIF_REG_PHY_CMD1, 2, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* wait for the command to be accepted by the PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) for (i = 0; i < 10; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ret = mcs7830_get_reg(dev, HIF_REG_PHY_CMD1, 2, cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if ((ret < 0) || (cmd[1] & HIF_REG_PHY_CMD2_READY_FLAG_BIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) dev_dbg(&dev->udev->dev, "write PHY reg %02x: %04x (%d tries)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) index, val, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) mutex_unlock(&dev->phy_mutex);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * This algorithm comes from the original mcs7830 version 1.4 driver,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * not sure if it is needed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) static int mcs7830_set_autoneg(struct usbnet *dev, int ptrUserPhyMode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /* Enable all media types */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) ret = mcs7830_write_phy(dev, MII_ADVERTISE, MCS7830_MII_ADVERTISE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* First reset BMCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) ret = mcs7830_write_phy(dev, MII_BMCR, 0x0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Enable Auto Neg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ret = mcs7830_write_phy(dev, MII_BMCR, BMCR_ANENABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Restart Auto Neg (Keep the Enable Auto Neg Bit Set) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ret = mcs7830_write_phy(dev, MII_BMCR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) BMCR_ANENABLE | BMCR_ANRESTART );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) * if we can read register 22, the chip revision is C or higher
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static int mcs7830_get_rev(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) u8 dummy[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ret = mcs7830_get_reg(dev, HIF_REG_FRAME_DROP_COUNTER, 2, dummy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) if (ret > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) return 2; /* Rev C or later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return 1; /* earlier revision */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) * On rev. C we need to set the pause threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) static void mcs7830_rev_C_fixup(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) u8 pause_threshold = HIF_REG_PAUSE_THRESHOLD_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) int retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) for (retry = 0; retry < 2; retry++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (mcs7830_get_rev(dev) == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev_info(&dev->udev->dev, "applying rev.C fixup\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) mcs7830_set_reg(dev, HIF_REG_PAUSE_THRESHOLD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 1, &pause_threshold);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) msleep(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) static int mcs7830_mdio_read(struct net_device *netdev, int phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) int location)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) struct usbnet *dev = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return mcs7830_read_phy(dev, location);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static void mcs7830_mdio_write(struct net_device *netdev, int phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) int location, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) struct usbnet *dev = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) mcs7830_write_phy(dev, location, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static int mcs7830_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) static inline struct mcs7830_data *mcs7830_get_data(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return (struct mcs7830_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) static void mcs7830_hif_update_multicast_hash(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct mcs7830_data *data = mcs7830_get_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) mcs7830_set_reg_async(dev, HIF_REG_MULTICAST_HASH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) sizeof data->multi_filter,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) data->multi_filter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static void mcs7830_hif_update_config(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* implementation specific to data->config
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) (argument needs to be heap-based anyway - USB DMA!) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) struct mcs7830_data *data = mcs7830_get_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) mcs7830_set_reg_async(dev, HIF_REG_CONFIG, 1, &data->config);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static void mcs7830_data_set_multicast(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) struct mcs7830_data *data = mcs7830_get_data(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) memset(data->multi_filter, 0, sizeof data->multi_filter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) data->config = HIF_REG_CONFIG_TXENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* this should not be needed, but it doesn't work otherwise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) data->config |= HIF_REG_CONFIG_ALLMULTICAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (net->flags & IFF_PROMISC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) data->config |= HIF_REG_CONFIG_PROMISCUOUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) } else if (net->flags & IFF_ALLMULTI ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) netdev_mc_count(net) > MCS7830_MAX_MCAST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) data->config |= HIF_REG_CONFIG_ALLMULTICAST;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) } else if (netdev_mc_empty(net)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* just broadcast and directed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) /* We use the 20 byte dev->data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * for our 8 byte filter buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * to avoid allocating memory that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) * is tricky to free later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) struct netdev_hw_addr *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) u32 crc_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) /* Build the multicast hash filter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) netdev_for_each_mc_addr(ha, net) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) data->multi_filter[crc_bits >> 3] |= 1 << (crc_bits & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) static int mcs7830_apply_base_config(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) /* re-configure known MAC (suspend case etc.) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) ret = mcs7830_hif_set_mac_address(dev, dev->net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) dev_info(&dev->udev->dev, "Cannot set MAC address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) /* Set up PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) ret = mcs7830_set_autoneg(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) dev_info(&dev->udev->dev, "Cannot set autoneg\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) mcs7830_hif_update_multicast_hash(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) mcs7830_hif_update_config(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) mcs7830_rev_C_fixup(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) /* credits go to asix_set_multicast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) static void mcs7830_set_multicast(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mcs7830_data_set_multicast(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) mcs7830_hif_update_multicast_hash(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) mcs7830_hif_update_config(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static int mcs7830_get_regs_len(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) switch (mcs7830_get_rev(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 21;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return 32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static void mcs7830_get_drvinfo(struct net_device *net, struct ethtool_drvinfo *drvinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) usbnet_get_drvinfo(net, drvinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static void mcs7830_get_regs(struct net_device *net, struct ethtool_regs *regs, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) regs->version = mcs7830_get_rev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) mcs7830_get_reg(dev, 0, regs->len, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static const struct ethtool_ops mcs7830_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) .get_drvinfo = mcs7830_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) .get_regs_len = mcs7830_get_regs_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .get_regs = mcs7830_get_regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /* common usbnet calls */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .get_link = usbnet_get_link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) .get_msglevel = usbnet_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .set_msglevel = usbnet_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .nway_reset = usbnet_nway_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .get_link_ksettings = usbnet_get_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) .set_link_ksettings = usbnet_set_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static const struct net_device_ops mcs7830_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .ndo_open = usbnet_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) .ndo_stop = usbnet_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) .ndo_start_xmit = usbnet_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .ndo_tx_timeout = usbnet_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .ndo_change_mtu = usbnet_change_mtu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .ndo_get_stats64 = usbnet_get_stats64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .ndo_do_ioctl = mcs7830_ioctl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .ndo_set_rx_mode = mcs7830_set_multicast,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .ndo_set_mac_address = mcs7830_set_mac_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) static int mcs7830_bind(struct usbnet *dev, struct usb_interface *udev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) struct net_device *net = dev->net;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) int retry;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) /* Initial startup: Gather MAC address setting from EEPROM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) ret = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) for (retry = 0; retry < 5 && ret; retry++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) ret = mcs7830_hif_get_mac_address(dev, net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dev_warn(&dev->udev->dev, "Cannot read MAC address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) mcs7830_data_set_multicast(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ret = mcs7830_apply_base_config(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) net->ethtool_ops = &mcs7830_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) net->netdev_ops = &mcs7830_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* reserve space for the status byte on rx */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) dev->rx_urb_size = ETH_FRAME_LEN + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) dev->mii.mdio_read = mcs7830_mdio_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) dev->mii.mdio_write = mcs7830_mdio_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) dev->mii.dev = net;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dev->mii.phy_id_mask = 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev->mii.reg_num_mask = 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) dev->mii.phy_id = *((u8 *) net->dev_addr + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ret = usbnet_get_endpoints(dev, udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /* The chip always appends a status byte that we need to strip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) static int mcs7830_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) u8 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* This check is no longer done by usbnet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) if (skb->len < dev->net->hard_header_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) dev_err(&dev->udev->dev, "unexpected tiny rx frame\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) skb_trim(skb, skb->len - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) status = skb->data[skb->len];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) if (status != MCS7830_RX_FRAME_CORRECT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) dev_dbg(&dev->udev->dev, "rx fixup status %x\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) /* hmm, perhaps usbnet.c already sees a globally visible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) frame error and increments rx_errors on its own already? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dev->net->stats.rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (status & (MCS7830_RX_SHORT_FRAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) |MCS7830_RX_LENGTH_ERROR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) |MCS7830_RX_LARGE_FRAME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) dev->net->stats.rx_length_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) if (status & MCS7830_RX_ALIGNMENT_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) dev->net->stats.rx_frame_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (status & MCS7830_RX_CRC_ERROR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) dev->net->stats.rx_crc_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return skb->len > 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) static void mcs7830_status(struct usbnet *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) u8 *buf = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) bool link, link_changed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (urb->actual_length < 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) link = !(buf[1] == 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) link_changed = netif_carrier_ok(dev->net) != link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (link_changed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) usbnet_link_change(dev, link, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) netdev_dbg(dev->net, "Link Status is: %d\n", link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) static const struct driver_info moschip_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) .description = "MOSCHIP 7830/7832/7730 usb-NET adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) .bind = mcs7830_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) .rx_fixup = mcs7830_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .flags = FLAG_ETHER | FLAG_LINK_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .status = mcs7830_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .in = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .out = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static const struct driver_info sitecom_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .description = "Sitecom LN-30 usb-NET adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .bind = mcs7830_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .rx_fixup = mcs7830_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) .flags = FLAG_ETHER | FLAG_LINK_INTR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) .status = mcs7830_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .in = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) .out = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) static const struct usb_device_id products[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) USB_DEVICE(MCS7830_VENDOR_ID, MCS7832_PRODUCT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) .driver_info = (unsigned long) &moschip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) USB_DEVICE(MCS7830_VENDOR_ID, MCS7830_PRODUCT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .driver_info = (unsigned long) &moschip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) USB_DEVICE(MCS7830_VENDOR_ID, MCS7730_PRODUCT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) .driver_info = (unsigned long) &moschip_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) USB_DEVICE(SITECOM_VENDOR_ID, LN_030_PRODUCT_ID),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) .driver_info = (unsigned long) &sitecom_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) MODULE_DEVICE_TABLE(usb, products);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static int mcs7830_reset_resume (struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) /* YES, this function is successful enough that ethtool -d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) does show same output pre-/post-suspend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) struct usbnet *dev = usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) mcs7830_apply_base_config(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) usbnet_resume(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static struct usb_driver mcs7830_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .name = driver_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .id_table = products,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .probe = usbnet_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .disconnect = usbnet_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .suspend = usbnet_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .resume = usbnet_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) .reset_resume = mcs7830_reset_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) .disable_hub_initiated_lpm = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) module_usb_driver(mcs7830_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) MODULE_DESCRIPTION("USB to network adapter MCS7830)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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