Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * ASIX AX88172A based USB 2.0 Ethernet Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright (C) 2012 OMICRON electronics GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Supports external PHYs via phylib. Based on the driver for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * AX88772. Original copyrights follow:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * Copyright (C) 2003-2006 David Hollis <dhollis@davehollis.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  * Copyright (C) 2006 James Painter <jamie.painter@iname.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * Copyright (c) 2002-2003 TiVo Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include "asix.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) struct ax88172a_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	struct mii_bus *mdio;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	struct phy_device *phydev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	char phy_name[20];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	u16 phy_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	u16 oldmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	int use_embdphy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	struct asix_rx_fixup_info rx_fixup_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) /* MDIO read and write wrappers for phylib */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) static int asix_mdio_bus_read(struct mii_bus *bus, int phy_id, int regnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	return asix_mdio_read(((struct usbnet *)bus->priv)->net, phy_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 			      regnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static int asix_mdio_bus_write(struct mii_bus *bus, int phy_id, int regnum,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 			       u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	asix_mdio_write(((struct usbnet *)bus->priv)->net, phy_id, regnum, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) /* set MAC link settings according to information from phylib */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) static void ax88172a_adjust_link(struct net_device *netdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	struct phy_device *phydev = netdev->phydev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	struct usbnet *dev = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	u16 mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	if (phydev->link) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		mode = AX88772_MEDIUM_DEFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		if (phydev->duplex == DUPLEX_HALF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 			mode &= ~AX_MEDIUM_FD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		if (phydev->speed != SPEED_100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 			mode &= ~AX_MEDIUM_PS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	if (mode != priv->oldmode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 		asix_write_medium_mode(dev, mode, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		priv->oldmode = mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 		netdev_dbg(netdev, "speed %u duplex %d, setting mode to 0x%04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 			   phydev->speed, phydev->duplex, mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		phy_print_status(phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static void ax88172a_status(struct usbnet *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	/* link changes are detected by polling the phy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) /* use phylib infrastructure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) static int ax88172a_init_mdio(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	priv->mdio = mdiobus_alloc();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	if (!priv->mdio) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		netdev_err(dev->net, "Could not allocate MDIO bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	priv->mdio->priv = (void *)dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	priv->mdio->read = &asix_mdio_bus_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	priv->mdio->write = &asix_mdio_bus_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	priv->mdio->name = "Asix MDIO Bus";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	/* mii bus name is usb-<usb bus number>-<usb device number> */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	snprintf(priv->mdio->id, MII_BUS_ID_SIZE, "usb-%03d:%03d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		 dev->udev->bus->busnum, dev->udev->devnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	ret = mdiobus_register(priv->mdio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		netdev_err(dev->net, "Could not register MDIO bus\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		goto mfree;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	netdev_info(dev->net, "registered mdio bus %s\n", priv->mdio->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mfree:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	mdiobus_free(priv->mdio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static void ax88172a_remove_mdio(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	netdev_info(dev->net, "deregistering mdio bus %s\n", priv->mdio->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	mdiobus_unregister(priv->mdio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	mdiobus_free(priv->mdio);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static const struct net_device_ops ax88172a_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.ndo_open		= usbnet_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	.ndo_stop		= usbnet_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.ndo_start_xmit		= usbnet_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.ndo_tx_timeout		= usbnet_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	.ndo_change_mtu		= usbnet_change_mtu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	.ndo_get_stats64	= usbnet_get_stats64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	.ndo_set_mac_address	= asix_set_mac_address,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	.ndo_validate_addr	= eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	.ndo_do_ioctl		= phy_do_ioctl_running,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	.ndo_set_rx_mode        = asix_set_multicast,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const struct ethtool_ops ax88172a_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	.get_drvinfo		= asix_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	.get_link		= usbnet_get_link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	.get_msglevel		= usbnet_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	.set_msglevel		= usbnet_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.get_wol		= asix_get_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	.set_wol		= asix_set_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	.get_eeprom_len		= asix_get_eeprom_len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	.get_eeprom		= asix_get_eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	.set_eeprom		= asix_set_eeprom,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	.nway_reset		= phy_ethtool_nway_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	.get_link_ksettings	= phy_ethtool_get_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	.set_link_ksettings	= phy_ethtool_set_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int ax88172a_reset_phy(struct usbnet *dev, int embd_phy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	ret = asix_sw_reset(dev, AX_SWRESET_IPPD, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	ret = asix_sw_reset(dev, AX_SWRESET_CLEAR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	ret = asix_sw_reset(dev, embd_phy ? AX_SWRESET_IPRL : AX_SWRESET_IPPD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 			    0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 		goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static int ax88172a_bind(struct usbnet *dev, struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	u8 buf[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	struct ax88172a_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	usbnet_get_endpoints(dev, intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	dev->driver_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	/* Get the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	ret = asix_read_cmd(dev, AX_CMD_READ_NODE_ID, 0, 0, ETH_ALEN, buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	if (ret < ETH_ALEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		netdev_err(dev->net, "Failed to read MAC address: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	memcpy(dev->net->dev_addr, buf, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	dev->net->netdev_ops = &ax88172a_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	dev->net->ethtool_ops = &ax88172a_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	/* are we using the internal or the external phy? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	ret = asix_read_cmd(dev, AX_CMD_SW_PHY_STATUS, 0, 0, 1, buf, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		netdev_err(dev->net, "Failed to read software interface selection register: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 			   ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 		goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	netdev_dbg(dev->net, "AX_CMD_SW_PHY_STATUS = 0x%02x\n", buf[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	switch (buf[0] & AX_PHY_SELECT_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	case AX_PHY_SELECT_INTERNAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		netdev_dbg(dev->net, "use internal phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		priv->use_embdphy = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	case AX_PHY_SELECT_EXTERNAL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 		netdev_dbg(dev->net, "use external phy\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 		priv->use_embdphy = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 		netdev_err(dev->net, "Interface mode not supported by driver\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		ret = -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	priv->phy_addr = asix_read_phy_addr(dev, priv->use_embdphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 	ax88172a_reset_phy(dev, priv->use_embdphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	/* Asix framing packs multiple eth frames into a 2K usb bulk transfer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	if (dev->driver_info->flags & FLAG_FRAMING_AX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 		/* hard_mtu  is still the default - the device does not support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		   jumbo eth frames */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		dev->rx_urb_size = 2048;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	/* init MDIO bus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	ret = ax88172a_init_mdio(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int ax88172a_stop(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	netdev_dbg(dev->net, "Stopping interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	if (priv->phydev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		netdev_info(dev->net, "Disconnecting from phy %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 			    priv->phy_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		phy_stop(priv->phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		phy_disconnect(priv->phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) static void ax88172a_unbind(struct usbnet *dev, struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	ax88172a_remove_mdio(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	kfree(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int ax88172a_reset(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	struct asix_data *data = (struct asix_data *)&dev->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	struct ax88172a_private *priv = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	u16 rx_ctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	ax88172a_reset_phy(dev, priv->use_embdphy);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	rx_ctl = asix_read_rx_ctl(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	netdev_dbg(dev->net, "RX_CTL is 0x%04x after software reset\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 	ret = asix_write_rx_ctl(dev, 0x0000, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	rx_ctl = asix_read_rx_ctl(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	netdev_dbg(dev->net, "RX_CTL is 0x%04x setting to 0x0000\n", rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	msleep(150);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	ret = asix_write_cmd(dev, AX_CMD_WRITE_IPG0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 			     AX88772_IPG0_DEFAULT | AX88772_IPG1_DEFAULT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 			     AX88772_IPG2_DEFAULT, 0, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		netdev_err(dev->net, "Write IPG,IPG1,IPG2 failed: %d\n", ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	/* Rewrite MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	memcpy(data->mac_addr, dev->net->dev_addr, ETH_ALEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	ret = asix_write_cmd(dev, AX_CMD_WRITE_NODE_ID, 0, 0, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			     data->mac_addr, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	/* Set RX_CTL to default values with 2k buffer, and enable cactus */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	ret = asix_write_rx_ctl(dev, AX_DEFAULT_RX_CTL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	rx_ctl = asix_read_rx_ctl(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	netdev_dbg(dev->net, "RX_CTL is 0x%04x after all initializations\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		   rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	rx_ctl = asix_read_medium_status(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	netdev_dbg(dev->net, "Medium Status is 0x%04x after all initializations\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 		   rx_ctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	/* Connect to PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	snprintf(priv->phy_name, 20, PHY_ID_FMT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 		 priv->mdio->id, priv->phy_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	priv->phydev = phy_connect(dev->net, priv->phy_name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 				   &ax88172a_adjust_link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 				   PHY_INTERFACE_MODE_MII);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	if (IS_ERR(priv->phydev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		netdev_err(dev->net, "Could not connect to PHY device %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 			   priv->phy_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		ret = PTR_ERR(priv->phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	netdev_info(dev->net, "Connected to phy %s\n", priv->phy_name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	/* During power-up, the AX88172A set the power down (BMCR_PDOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	 * bit of the PHY. Bring the PHY up again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	genphy_resume(priv->phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	phy_start(priv->phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static int ax88172a_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	struct ax88172a_private *dp = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	struct asix_rx_fixup_info *rx = &dp->rx_fixup_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	return asix_rx_fixup_internal(dev, skb, rx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) const struct driver_info ax88172a_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	.description = "ASIX AX88172A USB 2.0 Ethernet",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	.bind = ax88172a_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	.reset = ax88172a_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	.stop = ax88172a_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	.unbind = ax88172a_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	.status = ax88172a_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	.flags = FLAG_ETHER | FLAG_FRAMING_AX | FLAG_LINK_INTR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 		 FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	.rx_fixup = ax88172a_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	.tx_fixup = asix_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };