^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Aquantia Corp. Aquantia AQtion USB to 5GbE Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2002-2003 TiVo Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2017-2018 ASIX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2018 Aquantia Corp.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mii.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/usb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/if_vlan.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/usb/cdc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/usb/usbnet.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/linkmode.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "aqc111.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define DRIVER_NAME "aqc111"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ret = usbnet_read_cmd_nopm(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) USB_RECIP_DEVICE, value, index, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) if (unlikely(ret < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) netdev_warn(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) "Failed to read(0x%x) reg index 0x%04x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) cmd, index, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) ret = usbnet_read_cmd(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) USB_RECIP_DEVICE, value, index, data, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (unlikely(ret < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) netdev_warn(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "Failed to read(0x%x) reg index 0x%04x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) cmd, index, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static int aqc111_read16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) u16 index, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) ret = aqc111_read_cmd_nopm(dev, cmd, value, index, sizeof(*data), data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) le16_to_cpus(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static int aqc111_read16_cmd(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) u16 index, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ret = aqc111_read_cmd(dev, cmd, value, index, sizeof(*data), data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) le16_to_cpus(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int __aqc111_write_cmd(struct usbnet *dev, u8 cmd, u8 reqtype,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u16 value, u16 index, u16 size, const void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) void *buf = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) netdev_dbg(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "%s cmd=%#x reqtype=%#x value=%#x index=%#x size=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) __func__, cmd, reqtype, value, index, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) buf = kmemdup(data, size, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) cmd, reqtype, value, index, buf, size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) (cmd == AQ_PHY_POWER) ? AQ_USB_PHY_SET_TIMEOUT :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) AQ_USB_SET_TIMEOUT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (unlikely(err < 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) netdev_warn(dev->net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) "Failed to write(0x%x) reg index 0x%04x: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) cmd, index, err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static int aqc111_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) USB_RECIP_DEVICE, value, index, size, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static int aqc111_write_cmd(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (usb_autopm_get_interface(dev->intf) < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) USB_RECIP_DEVICE, value, index, size, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) usb_autopm_put_interface(dev->intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static int aqc111_write16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u16 index, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) u16 tmp = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) cpu_to_le16s(&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static int aqc111_write16_cmd(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) u16 index, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u16 tmp = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) cpu_to_le16s(&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static int aqc111_write32_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) u16 index, u32 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u32 tmp = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) cpu_to_le32s(&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) static int aqc111_write32_cmd(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) u16 index, u32 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) u32 tmp = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) cpu_to_le32s(&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static int aqc111_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) u16 index, u16 size, void *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) return usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) USB_RECIP_DEVICE, value, index, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static int aqc111_write16_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u16 index, u16 *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u16 tmp = *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) cpu_to_le16s(&tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return aqc111_write_cmd_async(dev, cmd, value, index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) sizeof(tmp), &tmp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) static void aqc111_get_drvinfo(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) struct ethtool_drvinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) /* Inherit standard device info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) usbnet_get_drvinfo(net, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) strlcpy(info->driver, DRIVER_NAME, sizeof(info->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) snprintf(info->fw_version, sizeof(info->fw_version), "%u.%u.%u",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) aqc111_data->fw_ver.major,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) aqc111_data->fw_ver.minor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) aqc111_data->fw_ver.rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) info->eedump_len = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) info->regdump_len = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) static void aqc111_get_wol(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) struct ethtool_wolinfo *wolinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) wolinfo->supported = WAKE_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) wolinfo->wolopts = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (aqc111_data->wol_flags & AQ_WOL_FLAG_MP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) wolinfo->wolopts |= WAKE_MAGIC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int aqc111_set_wol(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) struct ethtool_wolinfo *wolinfo)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (wolinfo->wolopts & ~WAKE_MAGIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) aqc111_data->wol_flags = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (wolinfo->wolopts & WAKE_MAGIC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) aqc111_data->wol_flags |= AQ_WOL_FLAG_MP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) static void aqc111_speed_to_link_mode(u32 speed,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct ethtool_link_ksettings *elk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) switch (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) case SPEED_5000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ethtool_link_ksettings_add_link_mode(elk, advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 5000baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) case SPEED_2500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ethtool_link_ksettings_add_link_mode(elk, advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 2500baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case SPEED_1000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ethtool_link_ksettings_add_link_mode(elk, advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 1000baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) case SPEED_100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ethtool_link_ksettings_add_link_mode(elk, advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 100baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int aqc111_get_link_ksettings(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) struct ethtool_link_ksettings *elk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) enum usb_device_speed usb_speed = dev->udev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) u32 speed = SPEED_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) ethtool_link_ksettings_zero_link_mode(elk, supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) ethtool_link_ksettings_add_link_mode(elk, supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 100baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) ethtool_link_ksettings_add_link_mode(elk, supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 1000baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) if (usb_speed == USB_SPEED_SUPER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) ethtool_link_ksettings_add_link_mode(elk, supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 2500baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ethtool_link_ksettings_add_link_mode(elk, supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 5000baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) ethtool_link_ksettings_add_link_mode(elk, supported, TP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ethtool_link_ksettings_add_link_mode(elk, supported, Autoneg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) elk->base.port = PORT_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) elk->base.transceiver = XCVR_INTERNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) elk->base.mdio_support = 0x00; /*Not supported*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (aqc111_data->autoneg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) linkmode_copy(elk->link_modes.advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) elk->link_modes.supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) aqc111_speed_to_link_mode(aqc111_data->advertised_speed, elk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) elk->base.autoneg = aqc111_data->autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) switch (aqc111_data->link_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) case AQ_INT_SPEED_5G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) speed = SPEED_5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) case AQ_INT_SPEED_2_5G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) speed = SPEED_2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) case AQ_INT_SPEED_1G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) speed = SPEED_1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) case AQ_INT_SPEED_100M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) speed = SPEED_100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) elk->base.duplex = DUPLEX_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) elk->base.speed = speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static void aqc111_set_phy_speed(struct usbnet *dev, u8 autoneg, u16 speed)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) aqc111_data->phy_cfg &= ~AQ_ADV_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) aqc111_data->phy_cfg |= AQ_PAUSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) aqc111_data->phy_cfg |= AQ_ASYM_PAUSE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) aqc111_data->phy_cfg |= AQ_DOWNSHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) aqc111_data->phy_cfg &= ~AQ_DSH_RETRIES_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) aqc111_data->phy_cfg |= (3 << AQ_DSH_RETRIES_SHIFT) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) AQ_DSH_RETRIES_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (autoneg == AUTONEG_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) switch (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) case SPEED_5000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) aqc111_data->phy_cfg |= AQ_ADV_5G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) case SPEED_2500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) aqc111_data->phy_cfg |= AQ_ADV_2G5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) case SPEED_1000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) aqc111_data->phy_cfg |= AQ_ADV_1G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) case SPEED_100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) aqc111_data->phy_cfg |= AQ_ADV_100M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* fall-through */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) switch (speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) case SPEED_5000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) aqc111_data->phy_cfg |= AQ_ADV_5G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) case SPEED_2500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) aqc111_data->phy_cfg |= AQ_ADV_2G5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) case SPEED_1000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) aqc111_data->phy_cfg |= AQ_ADV_1G;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) case SPEED_100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) aqc111_data->phy_cfg |= AQ_ADV_100M;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static int aqc111_set_link_ksettings(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) const struct ethtool_link_ksettings *elk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) enum usb_device_speed usb_speed = dev->udev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) u8 autoneg = elk->base.autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) u32 speed = elk->base.speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (autoneg == AUTONEG_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (aqc111_data->autoneg != AUTONEG_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) aqc111_data->autoneg = AUTONEG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) aqc111_data->advertised_speed =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) (usb_speed == USB_SPEED_SUPER) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) SPEED_5000 : SPEED_1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) aqc111_set_phy_speed(dev, aqc111_data->autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) aqc111_data->advertised_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (speed != SPEED_100 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) speed != SPEED_1000 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) speed != SPEED_2500 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) speed != SPEED_5000 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) speed != SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) if (elk->base.duplex != DUPLEX_FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (usb_speed != USB_SPEED_SUPER && speed > SPEED_1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) aqc111_data->autoneg = AUTONEG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (speed != SPEED_UNKNOWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) aqc111_data->advertised_speed = speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) aqc111_set_phy_speed(dev, aqc111_data->autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) aqc111_data->advertised_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static const struct ethtool_ops aqc111_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .get_drvinfo = aqc111_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .get_wol = aqc111_get_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .set_wol = aqc111_set_wol,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .get_msglevel = usbnet_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .set_msglevel = usbnet_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .get_link = ethtool_op_get_link,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .get_link_ksettings = aqc111_get_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .set_link_ksettings = aqc111_set_link_ksettings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static int aqc111_change_mtu(struct net_device *net, int new_mtu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) u8 buf[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) net->mtu = new_mtu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) dev->hard_mtu = net->mtu + net->hard_header_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (net->mtu > 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) reg16 |= SFR_MEDIUM_JUMBO_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) reg16 &= ~SFR_MEDIUM_JUMBO_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) if (dev->net->mtu > 12500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) memcpy(buf, &AQC111_BULKIN_SIZE[2], 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) /* RX bulk configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) 5, 5, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* Set high low water level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (dev->net->mtu <= 4500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) reg16 = 0x0810;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) else if (dev->net->mtu <= 9500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) reg16 = 0x1020;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) else if (dev->net->mtu <= 12500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) reg16 = 0x1420;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) reg16 = 0x1A20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static int aqc111_set_mac_addr(struct net_device *net, void *p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) int ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) ret = eth_mac_addr(net, p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) /* Set the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ETH_ALEN, net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) static int aqc111_vlan_rx_kill_vid(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) __be16 proto, u16 vid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) u8 vlan_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) vlan_ctrl = reg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) reg8 = (vid / 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) reg16 &= ~(1 << (vid % 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static int aqc111_vlan_rx_add_vid(struct net_device *net, __be16 proto, u16 vid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) u8 vlan_ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) vlan_ctrl = reg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) reg8 = (vid / 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) /* Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) reg16 |= (1 << (vid % 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static void aqc111_set_rx_mode(struct net_device *net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) int mc_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) mc_count = netdev_mc_count(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) aqc111_data->rxctl &= ~(SFR_RX_CTL_PRO | SFR_RX_CTL_AMALL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) SFR_RX_CTL_AM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (net->flags & IFF_PROMISC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) aqc111_data->rxctl |= SFR_RX_CTL_PRO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) } else if ((net->flags & IFF_ALLMULTI) || mc_count > AQ_MAX_MCAST) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) aqc111_data->rxctl |= SFR_RX_CTL_AMALL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) } else if (!netdev_mc_empty(net)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) u8 m_filter[AQ_MCAST_FILTER_SIZE] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) struct netdev_hw_addr *ha = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) u32 crc_bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) netdev_for_each_mc_addr(ha, net) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) m_filter[crc_bits >> 3] |= BIT(crc_bits & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) aqc111_write_cmd_async(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) SFR_MULTI_FILTER_ARRY,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) AQ_MCAST_FILTER_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) AQ_MCAST_FILTER_SIZE, m_filter);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) aqc111_data->rxctl |= SFR_RX_CTL_AM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) aqc111_write16_cmd_async(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) 2, &aqc111_data->rxctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) static int aqc111_set_features(struct net_device *net,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) netdev_features_t features)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) struct usbnet *dev = netdev_priv(net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) netdev_features_t changed = net->features ^ features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (changed & NETIF_F_IP_CSUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) reg8 ^= SFR_TXCOE_TCP | SFR_TXCOE_UDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) if (changed & NETIF_F_IPV6_CSUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) reg8 ^= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (changed & NETIF_F_RXCSUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (features & NETIF_F_RXCSUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) aqc111_data->rx_checksum = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) reg8 &= ~(SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) aqc111_data->rx_checksum = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (features & NETIF_F_HW_VLAN_CTAG_FILTER) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) u16 i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) for (i = 0; i < 256; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) /* Address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) reg8 = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) aqc111_write_cmd(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) SFR_VLAN_ID_ADDRESS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) aqc111_write16_cmd(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) SFR_VLAN_ID_DATA0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) reg8 = SFR_VLAN_CONTROL_WE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) aqc111_write_cmd(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) SFR_VLAN_ID_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) reg8 |= SFR_VLAN_CONTROL_VFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) aqc111_write_cmd(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) reg8 &= ~SFR_VLAN_CONTROL_VFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) aqc111_write_cmd(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) SFR_VLAN_ID_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static const struct net_device_ops aqc111_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .ndo_open = usbnet_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .ndo_stop = usbnet_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .ndo_start_xmit = usbnet_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) .ndo_tx_timeout = usbnet_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .ndo_get_stats64 = usbnet_get_stats64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .ndo_change_mtu = aqc111_change_mtu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .ndo_set_mac_address = aqc111_set_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .ndo_vlan_rx_add_vid = aqc111_vlan_rx_add_vid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .ndo_vlan_rx_kill_vid = aqc111_vlan_rx_kill_vid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .ndo_set_rx_mode = aqc111_set_rx_mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .ndo_set_features = aqc111_set_features,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) static int aqc111_read_perm_mac(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) u8 buf[ETH_ALEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ret = aqc111_read_cmd(dev, AQ_FLASH_PARAMETERS, 0, 0, ETH_ALEN, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) ether_addr_copy(dev->net->perm_addr, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) static void aqc111_read_fw_version(struct usbnet *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) struct aqc111_data *aqc111_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MAJOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) 1, 1, &aqc111_data->fw_ver.major);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MINOR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) 1, 1, &aqc111_data->fw_ver.minor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_REV,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) 1, 1, &aqc111_data->fw_ver.rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) if (aqc111_data->fw_ver.major & 0x80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) aqc111_data->fw_ver.major &= ~0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) struct usb_device *udev = interface_to_usbdev(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) enum usb_device_speed usb_speed = udev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) struct aqc111_data *aqc111_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) /* Check if vendor configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (udev->actconfig->desc.bConfigurationValue != 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) usb_driver_set_configuration(udev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) usb_reset_configuration(dev->udev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) ret = usbnet_get_endpoints(dev, intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (ret < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) netdev_dbg(dev->net, "usbnet_get_endpoints failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) aqc111_data = kzalloc(sizeof(*aqc111_data), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (!aqc111_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) /* store aqc111_data pointer in device data field */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) dev->driver_priv = aqc111_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) /* Init the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) ret = aqc111_read_perm_mac(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) ether_addr_copy(dev->net->dev_addr, dev->net->perm_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) /* Set Rx urb size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) dev->rx_urb_size = URB_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) /* Set TX needed headroom & tailroom */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) dev->net->needed_headroom += sizeof(u64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) dev->net->needed_tailroom += sizeof(u64);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) dev->net->max_mtu = 16334;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) dev->net->netdev_ops = &aqc111_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) dev->net->ethtool_ops = &aqc111_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) if (usb_device_no_sg_constraint(dev->udev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) dev->can_dma_sg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) dev->net->features |= AQ_SUPPORT_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) netif_set_gso_max_size(dev->net, 65535);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) aqc111_read_fw_version(dev, aqc111_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) aqc111_data->autoneg = AUTONEG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) SPEED_5000 : SPEED_1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) kfree(aqc111_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) u16 reg16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) /* Force bz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) reg16 = SFR_PHYPWR_RSTCTL_BZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /* Power down ethernet PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) aqc111_data->phy_cfg &= ~AQ_ADV_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) aqc111_data->phy_cfg |= AQ_LOW_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) aqc111_data->phy_cfg &= ~AQ_PHY_POWER_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) aqc111_write32_cmd_nopm(dev, AQ_PHY_OPS, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) kfree(aqc111_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) static void aqc111_status(struct usbnet *dev, struct urb *urb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) u64 *event_data = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) int link = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) if (urb->actual_length < sizeof(*event_data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) event_data = urb->transfer_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) le64_to_cpus(event_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) if (*event_data & AQ_LS_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) link = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) link = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) aqc111_data->link_speed = (*event_data & AQ_SPEED_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) AQ_SPEED_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) aqc111_data->link = link;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) if (netif_carrier_ok(dev->net) != link)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) usbnet_defer_kevent(dev, EVENT_LINK_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) static void aqc111_configure_rx(struct usbnet *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) struct aqc111_data *aqc111_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) enum usb_device_speed usb_speed = dev->udev->speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) u16 link_speed = 0, usb_host = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) u8 buf[5] = { 0 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) u8 queue_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) buf[0] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) buf[1] = 0xF8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) buf[2] = 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) switch (aqc111_data->link_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) case AQ_INT_SPEED_5G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) link_speed = 5000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) reg8 = 0x05;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) reg16 = 0x001F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) case AQ_INT_SPEED_2_5G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) link_speed = 2500;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) reg16 = 0x003F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) case AQ_INT_SPEED_1G:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) link_speed = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) reg16 = 0x009F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) case AQ_INT_SPEED_100M:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) link_speed = 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) queue_num = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) reg16 = 0x063F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) buf[1] = 0xFB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) buf[2] = 0x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) switch (usb_speed) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) case USB_SPEED_SUPER:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) usb_host = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) case USB_SPEED_HIGH:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) usb_host = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) case USB_SPEED_FULL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) case USB_SPEED_LOW:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) usb_host = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) queue_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) usb_host = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) if (dev->net->mtu > 12500 && dev->net->mtu <= 16334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) queue_num = 2; /* For Jumbo packet 16KB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) memcpy(buf, &AQC111_BULKIN_SIZE[queue_num], 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) /* RX bulk configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /* Set high low water level */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) if (dev->net->mtu <= 4500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) reg16 = 0x0810;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) else if (dev->net->mtu <= 9500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) reg16 = 0x1020;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) else if (dev->net->mtu <= 12500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) reg16 = 0x1420;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) else if (dev->net->mtu <= 16334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) reg16 = 0x1A20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) netdev_info(dev->net, "Link Speed %d, USB %d", link_speed, usb_host);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) static void aqc111_configure_csum_offload(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) if (dev->net->features & NETIF_F_RXCSUM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (dev->net->features & NETIF_F_IP_CSUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) reg8 |= SFR_TXCOE_IP | SFR_TXCOE_TCP | SFR_TXCOE_UDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) if (dev->net->features & NETIF_F_IPV6_CSUM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) reg8 |= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) static int aqc111_link_reset(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) if (aqc111_data->link == 1) { /* Link up */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) aqc111_configure_rx(dev, aqc111_data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) /* Vlan Tag Filter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) reg8 = SFR_VLAN_CONTROL_VSO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) if (dev->net->features & NETIF_F_HW_VLAN_CTAG_FILTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) reg8 |= SFR_VLAN_CONTROL_VFE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) reg8 = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMTX_DMA_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) reg16 = SFR_RX_CTL_IPE | SFR_RX_CTL_AB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) aqc111_data->rxctl = reg16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) reg8 = SFR_RX_PATH_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) reg8 = SFR_BULK_OUT_EFF_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) reg16 = SFR_MEDIUM_XGMIIMODE | SFR_MEDIUM_FULL_DUPLEX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) aqc111_configure_csum_offload(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) aqc111_set_rx_mode(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) if (dev->net->mtu > 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) reg16 |= SFR_MEDIUM_JUMBO_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) reg16 |= SFR_MEDIUM_RECEIVE_EN | SFR_MEDIUM_RXFLOW_CTRLEN |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) SFR_MEDIUM_TXFLOW_CTRLEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) aqc111_data->rxctl |= SFR_RX_CTL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) 2, &aqc111_data->rxctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) netif_carrier_on(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) aqc111_data->rxctl &= ~SFR_RX_CTL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) 2, &aqc111_data->rxctl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) reg8 = SFR_BULK_OUT_FLUSH_EN | SFR_BULK_OUT_EFF_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) reg8 = SFR_BULK_OUT_EFF_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) netif_carrier_off(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) static int aqc111_reset(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) u8 reg8 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) dev->rx_urb_size = URB_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) if (usb_device_no_sg_constraint(dev->udev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) dev->can_dma_sg = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) dev->net->features |= AQ_SUPPORT_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) /* Power up ethernet PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) aqc111_data->phy_cfg = AQ_PHY_POWER_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) /* Set the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) ETH_ALEN, dev->net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) reg8 = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) reg8 = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) reg8 &= ~(SFR_MONITOR_MODE_EPHYRW | SFR_MONITOR_MODE_RWLC |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) SFR_MONITOR_MODE_RWMP | SFR_MONITOR_MODE_RWWF |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) SFR_MONITOR_MODE_RW_FLAG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) netif_carrier_off(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) /* Phy advertise */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) aqc111_set_phy_speed(dev, aqc111_data->autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) aqc111_data->advertised_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) static int aqc111_stop(struct usbnet *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) u16 reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) reg16 = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) /* Put PHY to low power*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) aqc111_data->phy_cfg |= AQ_LOW_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) netif_carrier_off(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) static void aqc111_rx_checksum(struct sk_buff *skb, u64 pkt_desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) u32 pkt_type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) skb->ip_summed = CHECKSUM_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) /* checksum error bit is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (pkt_desc & AQ_RX_PD_L4_ERR || pkt_desc & AQ_RX_PD_L3_ERR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) pkt_type = pkt_desc & AQ_RX_PD_L4_TYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) /* It must be a TCP or UDP packet with a valid checksum */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) if (pkt_type == AQ_RX_PD_L4_TCP || pkt_type == AQ_RX_PD_L4_UDP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) skb->ip_summed = CHECKSUM_UNNECESSARY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) static int aqc111_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) struct sk_buff *new_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) u32 pkt_total_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) u64 *pkt_desc_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) u32 start_of_descs = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) u32 desc_offset = 0; /*RX Header Offset*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) u16 pkt_count = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) u64 desc_hdr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) u16 vlan_tag = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) u32 skb_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) if (skb->len == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) skb_len = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) /* RX Descriptor Header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) skb_trim(skb, skb->len - sizeof(desc_hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) desc_hdr = le64_to_cpup((u64 *)skb_tail_pointer(skb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) /* Check these packets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) desc_offset = (desc_hdr & AQ_RX_DH_DESC_OFFSET_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) AQ_RX_DH_DESC_OFFSET_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) pkt_count = desc_hdr & AQ_RX_DH_PKT_CNT_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) start_of_descs = skb_len - ((pkt_count + 1) * sizeof(desc_hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) /* self check descs position */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) if (start_of_descs != desc_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) /* self check desc_offset from header*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) if (desc_offset >= skb_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) if (pkt_count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) /* Get the first RX packet descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) pkt_desc_ptr = (u64 *)(skb->data + desc_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) while (pkt_count--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) u64 pkt_desc = le64_to_cpup(pkt_desc_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) u32 pkt_len_with_padd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) u32 pkt_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) pkt_len = (u32)((pkt_desc & AQ_RX_PD_LEN_MASK) >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) AQ_RX_PD_LEN_SHIFT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) pkt_len_with_padd = ((pkt_len + 7) & 0x7FFF8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) pkt_total_offset += pkt_len_with_padd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) if (pkt_total_offset > desc_offset ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) (pkt_count == 0 && pkt_total_offset != desc_offset)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) if (pkt_desc & AQ_RX_PD_DROP ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) !(pkt_desc & AQ_RX_PD_RX_OK) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) pkt_len > (dev->hard_mtu + AQ_RX_HW_PAD)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) skb_pull(skb, pkt_len_with_padd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) /* Next RX Packet Descriptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) pkt_desc_ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) /* Clone SKB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) new_skb = skb_clone(skb, GFP_ATOMIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) if (!new_skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) new_skb->len = pkt_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) skb_pull(new_skb, AQ_RX_HW_PAD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) skb_set_tail_pointer(new_skb, new_skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) new_skb->truesize = SKB_TRUESIZE(new_skb->len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) if (aqc111_data->rx_checksum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) aqc111_rx_checksum(new_skb, pkt_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) if (pkt_desc & AQ_RX_PD_VLAN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) vlan_tag = pkt_desc >> AQ_RX_PD_VLAN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) __vlan_hwaccel_put_tag(new_skb, htons(ETH_P_8021Q),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) vlan_tag & VLAN_VID_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) usbnet_skb_return(dev, new_skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) if (pkt_count == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) skb_pull(skb, pkt_len_with_padd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) /* Next RX Packet Header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) pkt_desc_ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) new_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) static struct sk_buff *aqc111_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) gfp_t flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) int frame_size = dev->maxpacket;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) struct sk_buff *new_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) u64 *tx_desc_ptr = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) int padding_size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) int headroom = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) int tailroom = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) u64 tx_desc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) u16 tci = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) /*Length of actual data*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) tx_desc |= skb->len & AQ_TX_DESC_LEN_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) /* TSO MSS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) tx_desc |= ((u64)(skb_shinfo(skb)->gso_size & AQ_TX_DESC_MSS_MASK)) <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) AQ_TX_DESC_MSS_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) headroom = (skb->len + sizeof(tx_desc)) % 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) if (headroom != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) padding_size = 8 - headroom;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) if (((skb->len + sizeof(tx_desc) + padding_size) % frame_size) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) padding_size += 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) tx_desc |= AQ_TX_DESC_DROP_PADD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) /* Vlan Tag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) if (vlan_get_tag(skb, &tci) >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) tx_desc |= AQ_TX_DESC_VLAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) tx_desc |= ((u64)tci & AQ_TX_DESC_VLAN_MASK) <<
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) AQ_TX_DESC_VLAN_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) if (!dev->can_dma_sg && (dev->net->features & NETIF_F_SG) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) skb_linearize(skb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) headroom = skb_headroom(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) tailroom = skb_tailroom(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) if (!(headroom >= sizeof(tx_desc) && tailroom >= padding_size)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) new_skb = skb_copy_expand(skb, sizeof(tx_desc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) padding_size, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) dev_kfree_skb_any(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) skb = new_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) if (!skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) if (padding_size != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) skb_put_zero(skb, padding_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) /* Copy TX header */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) tx_desc_ptr = skb_push(skb, sizeof(tx_desc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) *tx_desc_ptr = cpu_to_le64(tx_desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) usbnet_set_skb_tx_stats(skb, 1, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) return skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) static const struct driver_info aqc111_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) .description = "Aquantia AQtion USB to 5GbE Controller",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) .bind = aqc111_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) .unbind = aqc111_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) .status = aqc111_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) .link_reset = aqc111_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) .reset = aqc111_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) .stop = aqc111_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) .flags = FLAG_ETHER | FLAG_FRAMING_AX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) .rx_fixup = aqc111_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) .tx_fixup = aqc111_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) #define ASIX111_DESC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) "ASIX USB 3.1 Gen1 to 5G Multi-Gigabit Ethernet Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) static const struct driver_info asix111_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) .description = ASIX111_DESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) .bind = aqc111_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) .unbind = aqc111_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) .status = aqc111_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) .link_reset = aqc111_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) .reset = aqc111_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) .stop = aqc111_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) .flags = FLAG_ETHER | FLAG_FRAMING_AX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) .rx_fixup = aqc111_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) .tx_fixup = aqc111_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) #undef ASIX111_DESC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) #define ASIX112_DESC \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) "ASIX USB 3.1 Gen1 to 2.5G Multi-Gigabit Ethernet Adapter"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) static const struct driver_info asix112_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) .description = ASIX112_DESC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) .bind = aqc111_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) .unbind = aqc111_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) .status = aqc111_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) .link_reset = aqc111_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) .reset = aqc111_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) .stop = aqc111_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) .flags = FLAG_ETHER | FLAG_FRAMING_AX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) .rx_fixup = aqc111_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) .tx_fixup = aqc111_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) #undef ASIX112_DESC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) static const struct driver_info trendnet_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) .description = "USB-C 3.1 to 5GBASE-T Ethernet Adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) .bind = aqc111_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) .unbind = aqc111_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) .status = aqc111_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) .link_reset = aqc111_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) .reset = aqc111_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) .stop = aqc111_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) .flags = FLAG_ETHER | FLAG_FRAMING_AX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) .rx_fixup = aqc111_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) .tx_fixup = aqc111_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) static const struct driver_info qnap_info = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) .description = "QNAP QNA-UC5G1T USB to 5GbE Adapter",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) .bind = aqc111_bind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) .unbind = aqc111_unbind,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) .status = aqc111_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) .link_reset = aqc111_link_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) .reset = aqc111_reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) .stop = aqc111_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) .flags = FLAG_ETHER | FLAG_FRAMING_AX |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) .rx_fixup = aqc111_rx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) .tx_fixup = aqc111_tx_fixup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) static int aqc111_suspend(struct usb_interface *intf, pm_message_t message)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) struct usbnet *dev = usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) u16 temp_rx_ctrl = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) u16 reg16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) u8 reg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) usbnet_suspend(intf, message);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) temp_rx_ctrl = reg16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) /* Stop RX operations*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) reg16 &= ~SFR_RX_CTL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) /* Force bz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) reg16 |= SFR_PHYPWR_RSTCTL_BZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) reg8 = SFR_BULK_OUT_EFF_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) temp_rx_ctrl &= ~(SFR_RX_CTL_START | SFR_RX_CTL_RF_WAK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) SFR_RX_CTL_AP | SFR_RX_CTL_AM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) 2, &temp_rx_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) reg8 = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) if (aqc111_data->wol_flags) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) struct aqc111_wol_cfg wol_cfg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) memset(&wol_cfg, 0, sizeof(struct aqc111_wol_cfg));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) aqc111_data->phy_cfg |= AQ_WOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) ether_addr_copy(wol_cfg.hw_addr, dev->net->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) wol_cfg.flags = aqc111_data->wol_flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) temp_rx_ctrl |= (SFR_RX_CTL_AB | SFR_RX_CTL_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) 2, &temp_rx_ctrl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) reg8 = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) reg8 = SFR_BMRX_DMA_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) reg8 = SFR_RX_PATH_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) reg8 = 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) reg8 = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) SFR_RX_BULKIN_QTIMR_LOW, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) SFR_RX_BULKIN_QTIMR_HIGH, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) reg8 = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QSIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QIFG,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) SFR_MEDIUM_STATUS_MODE, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) reg16 |= SFR_MEDIUM_RECEIVE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) SFR_MEDIUM_STATUS_MODE, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) aqc111_write_cmd(dev, AQ_WOL_CFG, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) WOL_CFG_SIZE, &wol_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) aqc111_data->phy_cfg |= AQ_LOW_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) &aqc111_data->phy_cfg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) /* Disable RX path */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) SFR_MEDIUM_STATUS_MODE, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) SFR_MEDIUM_STATUS_MODE, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) static int aqc111_resume(struct usb_interface *intf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) struct usbnet *dev = usb_get_intfdata(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) struct aqc111_data *aqc111_data = dev->driver_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) u16 reg16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) u8 reg8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) netif_carrier_off(dev->net);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) /* Power up ethernet PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) aqc111_data->phy_cfg |= AQ_PHY_POWER_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) aqc111_data->phy_cfg &= ~AQ_LOW_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) aqc111_data->phy_cfg &= ~AQ_WOL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) reg8 = 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) /* Configure RX control register => start operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) reg16 = aqc111_data->rxctl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) reg16 &= ~SFR_RX_CTL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) reg16 |= SFR_RX_CTL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) aqc111_set_phy_speed(dev, aqc111_data->autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) aqc111_data->advertised_speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) reg16 |= SFR_MEDIUM_RECEIVE_EN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) 2, ®16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) reg8 = SFR_RX_PATH_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) reg8 = 0x0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, 1, 1, ®8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453) return usbnet_resume(intf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) #define AQC111_USB_ETH_DEV(vid, pid, table) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) USB_DEVICE_INTERFACE_CLASS((vid), (pid), USB_CLASS_VENDOR_SPEC), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) .driver_info = (unsigned long)&(table) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) }, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) USB_DEVICE_AND_INTERFACE_INFO((vid), (pid), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) USB_CLASS_COMM, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) USB_CDC_SUBCLASS_ETHERNET, \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) USB_CDC_PROTO_NONE), \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) .driver_info = (unsigned long)&(table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) static const struct usb_device_id products[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) {AQC111_USB_ETH_DEV(0x2eca, 0xc101, aqc111_info)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) {AQC111_USB_ETH_DEV(0x0b95, 0x2790, asix111_info)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) {AQC111_USB_ETH_DEV(0x0b95, 0x2791, asix112_info)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) {AQC111_USB_ETH_DEV(0x20f4, 0xe05a, trendnet_info)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) {AQC111_USB_ETH_DEV(0x1c04, 0x0015, qnap_info)},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) { },/* END */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) MODULE_DEVICE_TABLE(usb, products);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) static struct usb_driver aq_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) .name = "aqc111",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) .id_table = products,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) .probe = usbnet_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) .suspend = aqc111_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) .resume = aqc111_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) .disconnect = usbnet_disconnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) module_usb_driver(aq_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) MODULE_DESCRIPTION("Aquantia AQtion USB to 5/2.5GbE Controllers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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