^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for the Renesas PHY uPD60620.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2015 Softing Industrial Automation GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define UPD60620_PHY_ID 0xb8242824
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Extended Registers and values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* PHY Special Control/Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define PHY_PHYSCR 0x1F /* PHY.31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define PHY_PHYSCR_10MB 0x0004 /* PHY speed = 10mb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define PHY_PHYSCR_100MB 0x0008 /* PHY speed = 100mb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define PHY_PHYSCR_DUPLEX 0x0010 /* PHY Duplex */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* PHY Special Modes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define PHY_SPM 0x12 /* PHY.18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* Init PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) static int upd60620_config_init(struct phy_device *phydev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* Enable support for passive HUBs (could be a strap option) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* PHYMODE: All speeds, HD in parallel detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) return phy_write(phydev, PHY_SPM, 0x0180 | phydev->mdio.addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Get PHY status from common registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static int upd60620_read_status(struct phy_device *phydev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) int phy_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* Read negotiated state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) phy_state = phy_read(phydev, MII_BMSR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (phy_state < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return phy_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) phydev->link = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) linkmode_zero(phydev->lp_advertising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) phydev->pause = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) phydev->asym_pause = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) if (phy_state & (BMSR_ANEGCOMPLETE | BMSR_LSTATUS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) phy_state = phy_read(phydev, PHY_PHYSCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (phy_state < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return phy_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) if (phy_state & (PHY_PHYSCR_10MB | PHY_PHYSCR_100MB)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) phydev->link = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) phydev->speed = SPEED_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) phydev->duplex = DUPLEX_HALF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (phy_state & PHY_PHYSCR_100MB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) phydev->speed = SPEED_100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (phy_state & PHY_PHYSCR_DUPLEX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) phydev->duplex = DUPLEX_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) phy_state = phy_read(phydev, MII_LPA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) if (phy_state < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) return phy_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) mii_lpa_to_linkmode_lpa_t(phydev->lp_advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) phy_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) phy_resolve_aneg_pause(phydev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MODULE_DESCRIPTION("Renesas uPD60620 PHY driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MODULE_AUTHOR("Bernd Edlinger <bernd.edlinger@hotmail.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static struct phy_driver upd60620_driver[1] = { {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .phy_id = UPD60620_PHY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .phy_id_mask = 0xfffffffe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .name = "Renesas uPD60620",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* PHY_BASIC_FEATURES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .flags = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .config_init = upd60620_config_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .read_status = upd60620_read_status,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) module_phy_driver(upd60620_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) static struct mdio_device_id __maybe_unused upd60620_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) { UPD60620_PHY_ID, 0xfffffffe },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) MODULE_DEVICE_TABLE(mdio, upd60620_tbl);