^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/net/phy/ste10Xp.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Driver for STMicroelectronics STe10Xp PHYs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (c) 2008 STMicroelectronics Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mii.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MII_XCIIS 0x11 /* Configuration Info IRQ & Status Reg */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MII_XIE 0x12 /* Interrupt Enable Register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MII_XIE_DEFAULT_MASK 0x0070 /* ANE complete, Remote Fault, Link Down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define STE101P_PHY_ID 0x00061c50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define STE100P_PHY_ID 0x1c040011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static int ste10Xp_config_init(struct phy_device *phydev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int value, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* Software Reset PHY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) value = phy_read(phydev, MII_BMCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) return value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) value |= BMCR_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) err = phy_write(phydev, MII_BMCR, value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) value = phy_read(phydev, MII_BMCR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) } while (value & BMCR_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int ste10Xp_config_intr(struct phy_device *phydev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int err, value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* Enable all STe101P interrupts (PR12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) err = phy_write(phydev, MII_XIE, MII_XIE_DEFAULT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* clear any pending interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (err == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) value = phy_read(phydev, MII_XCIIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (value < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) err = value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) err = phy_write(phydev, MII_XIE, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static int ste10Xp_ack_interrupt(struct phy_device *phydev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) int err = phy_read(phydev, MII_XCIIS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static struct phy_driver ste10xp_pdriver[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .phy_id = STE101P_PHY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .phy_id_mask = 0xfffffff0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .name = "STe101p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* PHY_BASIC_FEATURES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .config_init = ste10Xp_config_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .ack_interrupt = ste10Xp_ack_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .config_intr = ste10Xp_config_intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .suspend = genphy_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .resume = genphy_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .phy_id = STE100P_PHY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .phy_id_mask = 0xffffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .name = "STe100p",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* PHY_BASIC_FEATURES */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) .config_init = ste10Xp_config_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .ack_interrupt = ste10Xp_ack_interrupt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .config_intr = ste10Xp_config_intr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .suspend = genphy_suspend,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .resume = genphy_resume,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) } };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) module_phy_driver(ste10xp_pdriver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static struct mdio_device_id __maybe_unused ste10Xp_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) { STE101P_PHY_ID, 0xfffffff0 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) { STE100P_PHY_ID, 0xffffffff },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) { }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MODULE_DEVICE_TABLE(mdio, ste10Xp_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MODULE_DESCRIPTION("STMicroelectronics STe10Xp PHY driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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