^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /* Copyright (C) 2019 IBM Corp. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) #include <linux/bitfield.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/iopoll.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/mdio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of_mdio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define DRV_NAME "mdio-aspeed"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define ASPEED_MDIO_CTRL 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define ASPEED_MDIO_CTRL_FIRE BIT(31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define ASPEED_MDIO_CTRL_ST BIT(28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define ASPEED_MDIO_CTRL_ST_C45 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define ASPEED_MDIO_CTRL_ST_C22 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define ASPEED_MDIO_CTRL_OP GENMASK(27, 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MDIO_C22_OP_WRITE 0b01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MDIO_C22_OP_READ 0b10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define ASPEED_MDIO_CTRL_PHYAD GENMASK(25, 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define ASPEED_MDIO_CTRL_REGAD GENMASK(20, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define ASPEED_MDIO_CTRL_MIIWDATA GENMASK(15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ASPEED_MDIO_DATA 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define ASPEED_MDIO_DATA_MDC_THRES GENMASK(31, 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ASPEED_MDIO_DATA_MDIO_EDGE BIT(23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define ASPEED_MDIO_DATA_MDIO_LATCH GENMASK(22, 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define ASPEED_MDIO_DATA_IDLE BIT(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define ASPEED_MDIO_DATA_MIIRDATA GENMASK(15, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define ASPEED_MDIO_INTERVAL_US 100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ASPEED_MDIO_TIMEOUT_US (ASPEED_MDIO_INTERVAL_US * 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct aspeed_mdio {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int aspeed_mdio_read(struct mii_bus *bus, int addr, int regnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct aspeed_mdio *ctx = bus->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d\n", __func__, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) regnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* Just clause 22 for the moment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) if (regnum & MII_ADDR_C45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ctrl = ASPEED_MDIO_CTRL_FIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) | FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) | FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_READ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) !(ctrl & ASPEED_MDIO_CTRL_FIRE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) ASPEED_MDIO_INTERVAL_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) ASPEED_MDIO_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) rc = readl_poll_timeout(ctx->base + ASPEED_MDIO_DATA, data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) data & ASPEED_MDIO_DATA_IDLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ASPEED_MDIO_INTERVAL_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) ASPEED_MDIO_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) return FIELD_GET(ASPEED_MDIO_DATA_MIIRDATA, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static int aspeed_mdio_write(struct mii_bus *bus, int addr, int regnum, u16 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) struct aspeed_mdio *ctx = bus->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u32 ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) dev_dbg(&bus->dev, "%s: addr: %d, regnum: %d, val: 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) __func__, addr, regnum, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Just clause 22 for the moment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (regnum & MII_ADDR_C45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) ctrl = ASPEED_MDIO_CTRL_FIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) | FIELD_PREP(ASPEED_MDIO_CTRL_ST, ASPEED_MDIO_CTRL_ST_C22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) | FIELD_PREP(ASPEED_MDIO_CTRL_OP, MDIO_C22_OP_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) | FIELD_PREP(ASPEED_MDIO_CTRL_PHYAD, addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) | FIELD_PREP(ASPEED_MDIO_CTRL_REGAD, regnum)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) | FIELD_PREP(ASPEED_MDIO_CTRL_MIIWDATA, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) iowrite32(ctrl, ctx->base + ASPEED_MDIO_CTRL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return readl_poll_timeout(ctx->base + ASPEED_MDIO_CTRL, ctrl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) !(ctrl & ASPEED_MDIO_CTRL_FIRE),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ASPEED_MDIO_INTERVAL_US,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ASPEED_MDIO_TIMEOUT_US);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) static int aspeed_mdio_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) struct aspeed_mdio *ctx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) struct mii_bus *bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) bus = devm_mdiobus_alloc_size(&pdev->dev, sizeof(*ctx));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) if (!bus)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ctx = bus->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ctx->base = devm_platform_ioremap_resource(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (IS_ERR(ctx->base))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) return PTR_ERR(ctx->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) bus->name = DRV_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) snprintf(bus->id, MII_BUS_ID_SIZE, "%s%d", pdev->name, pdev->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) bus->parent = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) bus->read = aspeed_mdio_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) bus->write = aspeed_mdio_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) rc = of_mdiobus_register(bus, pdev->dev.of_node);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (rc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) platform_set_drvdata(pdev, bus);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int aspeed_mdio_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) mdiobus_unregister(platform_get_drvdata(pdev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) static const struct of_device_id aspeed_mdio_of_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { .compatible = "aspeed,ast2600-mdio", },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) MODULE_DEVICE_TABLE(of, aspeed_mdio_of_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static struct platform_driver aspeed_mdio_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .of_match_table = aspeed_mdio_of_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) .probe = aspeed_mdio_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) .remove = aspeed_mdio_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) module_platform_driver(aspeed_mdio_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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