^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * mdio.c: Generic support for MDIO-compatible transceivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2006-2009 Solarflare Communications Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/capability.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mdio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) MODULE_DESCRIPTION("Generic support for MDIO-compatible transceivers");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) MODULE_AUTHOR("Copyright 2006-2009 Solarflare Communications Inc.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * mdio45_probe - probe for an MDIO (clause 45) device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * @prtad: Expected PHY address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * This sets @prtad and @mmds in the MDIO interface if successful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Returns 0 on success, negative on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) int mdio45_probe(struct mdio_if_info *mdio, int prtad)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) int mmd, stat2, devs1, devs2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Assume PHY must have at least one of PMA/PMD, WIS, PCS, PHY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * XS or DTE XS; give up if none is present. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) for (mmd = 1; mmd <= 5; mmd++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Is this MMD present? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) stat2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_STAT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) if (stat2 < 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) (stat2 & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /* It should tell us about all the other MMDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) devs1 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) devs2 = mdio->mdio_read(mdio->dev, prtad, mmd, MDIO_DEVS2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) if (devs1 < 0 || devs2 < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) mdio->prtad = prtad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) mdio->mmds = devs1 | (devs2 << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) EXPORT_SYMBOL(mdio45_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * mdio_set_flag - set or clear flag in an MDIO register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @prtad: PHY address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @devad: MMD address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @addr: Register address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * @mask: Mask for flag (single bit set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * @sense: New value of flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * This debounces changes: it does not write the register if the flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * already has the proper value. Returns 0 on success, negative on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) int mdio_set_flag(const struct mdio_if_info *mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int prtad, int devad, u16 addr, int mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) bool sense)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) int old_val = mdio->mdio_read(mdio->dev, prtad, devad, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) int new_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (old_val < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) return old_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (sense)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) new_val = old_val | mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) new_val = old_val & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (old_val == new_val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return mdio->mdio_write(mdio->dev, prtad, devad, addr, new_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) EXPORT_SYMBOL(mdio_set_flag);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * mdio_link_ok - is link status up/OK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * @mmd_mask: Mask for MMDs to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * Returns 1 if the PHY reports link status up/OK, 0 otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * @mmd_mask is normally @mdio->mmds, but if loopback is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * the MMDs being bypassed should be excluded from the mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) int mdio45_links_ok(const struct mdio_if_info *mdio, u32 mmd_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) int devad, reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (!mmd_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Use absence of XGMII faults in lieu of link state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) reg = mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MDIO_MMD_PHYXS, MDIO_STAT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return reg >= 0 && !(reg & MDIO_STAT2_RXFAULT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) for (devad = 0; mmd_mask; devad++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (mmd_mask & (1 << devad)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mmd_mask &= ~(1 << devad);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Reset the latched status and fault flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) devad, MDIO_STAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (devad == MDIO_MMD_PMAPMD || devad == MDIO_MMD_PCS ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) devad == MDIO_MMD_PHYXS || devad == MDIO_MMD_DTEXS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) devad, MDIO_STAT2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* Check the current status and fault flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) reg = mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) devad, MDIO_STAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) if (reg < 0 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) (reg & (MDIO_STAT1_FAULT | MDIO_STAT1_LSTATUS)) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) MDIO_STAT1_LSTATUS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) EXPORT_SYMBOL(mdio45_links_ok);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * mdio45_nway_restart - restart auto-negotiation for this interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * Returns 0 on success, negative on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) int mdio45_nway_restart(const struct mdio_if_info *mdio)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!(mdio->mmds & MDIO_DEVS_AN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) mdio_set_flag(mdio, mdio->prtad, MDIO_MMD_AN, MDIO_CTRL1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) MDIO_AN_CTRL1_RESTART, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) EXPORT_SYMBOL(mdio45_nway_restart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static u32 mdio45_get_an(const struct mdio_if_info *mdio, u16 addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) u32 result = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) if (reg & ADVERTISE_10HALF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) result |= ADVERTISED_10baseT_Half;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) if (reg & ADVERTISE_10FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) result |= ADVERTISED_10baseT_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (reg & ADVERTISE_100HALF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) result |= ADVERTISED_100baseT_Half;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (reg & ADVERTISE_100FULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) result |= ADVERTISED_100baseT_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (reg & ADVERTISE_PAUSE_CAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) result |= ADVERTISED_Pause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (reg & ADVERTISE_PAUSE_ASYM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) result |= ADVERTISED_Asym_Pause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * mdio45_ethtool_gset_npage - get settings for ETHTOOL_GSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * @ecmd: Ethtool request structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * @npage_adv: Modes currently advertised on next pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * @npage_lpa: Modes advertised by link partner on next pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * The @ecmd parameter is expected to have been cleared before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * mdio45_ethtool_gset_npage().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * Since the CSRs for auto-negotiation using next pages are not fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * standardised, this function does not attempt to decode them. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * caller must pass them in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) void mdio45_ethtool_gset_npage(const struct mdio_if_info *mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct ethtool_cmd *ecmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) u32 npage_adv, u32 npage_lpa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) u32 speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) BUILD_BUG_ON(MDIO_SUPPORTS_C22 != ETH_MDIO_SUPPORTS_C22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) BUILD_BUG_ON(MDIO_SUPPORTS_C45 != ETH_MDIO_SUPPORTS_C45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ecmd->transceiver = XCVR_INTERNAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ecmd->phy_address = mdio->prtad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) ecmd->mdio_support =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) mdio->mode_support & (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) MDIO_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) switch (reg & MDIO_PMA_CTRL2_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) case MDIO_PMA_CTRL2_10GBT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) case MDIO_PMA_CTRL2_1000BT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) case MDIO_PMA_CTRL2_100BTX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case MDIO_PMA_CTRL2_10BT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) ecmd->port = PORT_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) ecmd->supported = SUPPORTED_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) MDIO_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (reg & MDIO_SPEED_10G)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ecmd->supported |= SUPPORTED_10000baseT_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (reg & MDIO_PMA_SPEED_1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) ecmd->supported |= (SUPPORTED_1000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) SUPPORTED_1000baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (reg & MDIO_PMA_SPEED_100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ecmd->supported |= (SUPPORTED_100baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) SUPPORTED_100baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (reg & MDIO_PMA_SPEED_10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ecmd->supported |= (SUPPORTED_10baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) SUPPORTED_10baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) ecmd->advertising = ADVERTISED_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) case MDIO_PMA_CTRL2_10GBCX4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ecmd->port = PORT_OTHER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ecmd->supported = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) ecmd->advertising = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case MDIO_PMA_CTRL2_10GBKX4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) case MDIO_PMA_CTRL2_10GBKR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) case MDIO_PMA_CTRL2_1000BKX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ecmd->port = PORT_OTHER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ecmd->supported = SUPPORTED_Backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) MDIO_PMA_EXTABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) if (reg & MDIO_PMA_EXTABLE_10GBKX4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ecmd->supported |= SUPPORTED_10000baseKX4_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (reg & MDIO_PMA_EXTABLE_10GBKR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ecmd->supported |= SUPPORTED_10000baseKR_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (reg & MDIO_PMA_EXTABLE_1000BKX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) ecmd->supported |= SUPPORTED_1000baseKX_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) MDIO_PMA_10GBR_FECABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (reg & MDIO_PMA_10GBR_FECABLE_ABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ecmd->supported |= SUPPORTED_10000baseR_FEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) ecmd->advertising = ADVERTISED_Backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* All the other defined modes are flavours of optical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ecmd->port = PORT_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ecmd->supported = SUPPORTED_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) ecmd->advertising = ADVERTISED_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (mdio->mmds & MDIO_DEVS_AN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ecmd->supported |= SUPPORTED_Autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MDIO_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) if (reg & MDIO_AN_CTRL1_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ecmd->autoneg = AUTONEG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) ecmd->advertising |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ADVERTISED_Autoneg |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) mdio45_get_an(mdio, MDIO_AN_ADVERTISE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) npage_adv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ecmd->autoneg = AUTONEG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) ecmd->autoneg = AUTONEG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) if (ecmd->autoneg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) u32 modes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int an_stat = mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) MDIO_MMD_AN, MDIO_STAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* If AN is complete and successful, report best common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) * mode, otherwise report best advertised mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (an_stat & MDIO_AN_STAT1_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ecmd->lp_advertising =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) mdio45_get_an(mdio, MDIO_AN_LPA) | npage_lpa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (an_stat & MDIO_AN_STAT1_LPABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ecmd->lp_advertising |= ADVERTISED_Autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) modes = ecmd->advertising & ecmd->lp_advertising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if ((modes & ~ADVERTISED_Autoneg) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) modes = ecmd->advertising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (modes & (ADVERTISED_10000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) ADVERTISED_10000baseKX4_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ADVERTISED_10000baseKR_Full)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) speed = SPEED_10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) ecmd->duplex = DUPLEX_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) } else if (modes & (ADVERTISED_1000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ADVERTISED_1000baseT_Half |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ADVERTISED_1000baseKX_Full)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) speed = SPEED_1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ecmd->duplex = !(modes & ADVERTISED_1000baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) } else if (modes & (ADVERTISED_100baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ADVERTISED_100baseT_Half)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) speed = SPEED_100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) ecmd->duplex = !!(modes & ADVERTISED_100baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) speed = SPEED_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) ecmd->duplex = !!(modes & ADVERTISED_10baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* Report forced settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) MDIO_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) speed = (((reg & MDIO_PMA_CTRL1_SPEED1000) ? 100 : 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * ((reg & MDIO_PMA_CTRL1_SPEED100) ? 100 : 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) ecmd->duplex = (reg & MDIO_CTRL1_FULLDPLX ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) speed == SPEED_10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) ethtool_cmd_speed_set(ecmd, speed);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* 10GBASE-T MDI/MDI-X */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) if (ecmd->port == PORT_TP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) && (ethtool_cmd_speed(ecmd) == SPEED_10000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) switch (mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) MDIO_PMA_10GBT_SWAPPOL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ecmd->eth_tp_mdix = ETH_TP_MDI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ecmd->eth_tp_mdix = ETH_TP_MDI_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /* It's complicated... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) ecmd->eth_tp_mdix = ETH_TP_MDI_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) EXPORT_SYMBOL(mdio45_ethtool_gset_npage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * mdio45_ethtool_ksettings_get_npage - get settings for ETHTOOL_GLINKSETTINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * @cmd: Ethtool request structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * @npage_adv: Modes currently advertised on next pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) * @npage_lpa: Modes advertised by link partner on next pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * The @cmd parameter is expected to have been cleared before calling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) * mdio45_ethtool_ksettings_get_npage().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) * Since the CSRs for auto-negotiation using next pages are not fully
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) * standardised, this function does not attempt to decode them. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) * caller must pass them in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) void mdio45_ethtool_ksettings_get_npage(const struct mdio_if_info *mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct ethtool_link_ksettings *cmd,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) u32 npage_adv, u32 npage_lpa)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) int reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) u32 speed, supported = 0, advertising = 0, lp_advertising = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) BUILD_BUG_ON(MDIO_SUPPORTS_C22 != ETH_MDIO_SUPPORTS_C22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) BUILD_BUG_ON(MDIO_SUPPORTS_C45 != ETH_MDIO_SUPPORTS_C45);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) cmd->base.phy_address = mdio->prtad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) cmd->base.mdio_support =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) mdio->mode_support & (MDIO_SUPPORTS_C45 | MDIO_SUPPORTS_C22);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) MDIO_CTRL2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) switch (reg & MDIO_PMA_CTRL2_TYPE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) case MDIO_PMA_CTRL2_10GBT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) case MDIO_PMA_CTRL2_1000BT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case MDIO_PMA_CTRL2_100BTX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) case MDIO_PMA_CTRL2_10BT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) cmd->base.port = PORT_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) supported = SUPPORTED_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) MDIO_SPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) if (reg & MDIO_SPEED_10G)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) supported |= SUPPORTED_10000baseT_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) if (reg & MDIO_PMA_SPEED_1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) supported |= (SUPPORTED_1000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) SUPPORTED_1000baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) if (reg & MDIO_PMA_SPEED_100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) supported |= (SUPPORTED_100baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) SUPPORTED_100baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) if (reg & MDIO_PMA_SPEED_10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) supported |= (SUPPORTED_10baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) SUPPORTED_10baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) advertising = ADVERTISED_TP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) case MDIO_PMA_CTRL2_10GBCX4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) cmd->base.port = PORT_OTHER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) supported = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) advertising = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) case MDIO_PMA_CTRL2_10GBKX4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) case MDIO_PMA_CTRL2_10GBKR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) case MDIO_PMA_CTRL2_1000BKX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) cmd->base.port = PORT_OTHER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) supported = SUPPORTED_Backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) MDIO_PMA_EXTABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (reg & MDIO_PMA_EXTABLE_10GBKX4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) supported |= SUPPORTED_10000baseKX4_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (reg & MDIO_PMA_EXTABLE_10GBKR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) supported |= SUPPORTED_10000baseKR_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (reg & MDIO_PMA_EXTABLE_1000BKX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) supported |= SUPPORTED_1000baseKX_Full;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) MDIO_PMA_10GBR_FECABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) if (reg & MDIO_PMA_10GBR_FECABLE_ABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) supported |= SUPPORTED_10000baseR_FEC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) advertising = ADVERTISED_Backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) /* All the other defined modes are flavours of optical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) cmd->base.port = PORT_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) supported = SUPPORTED_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) advertising = ADVERTISED_FIBRE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (mdio->mmds & MDIO_DEVS_AN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) supported |= SUPPORTED_Autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_AN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) MDIO_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (reg & MDIO_AN_CTRL1_ENABLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) cmd->base.autoneg = AUTONEG_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) advertising |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) ADVERTISED_Autoneg |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) mdio45_get_an(mdio, MDIO_AN_ADVERTISE) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) npage_adv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) cmd->base.autoneg = AUTONEG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) cmd->base.autoneg = AUTONEG_DISABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) if (cmd->base.autoneg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) u32 modes = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) int an_stat = mdio->mdio_read(mdio->dev, mdio->prtad,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) MDIO_MMD_AN, MDIO_STAT1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) /* If AN is complete and successful, report best common
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) * mode, otherwise report best advertised mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) if (an_stat & MDIO_AN_STAT1_COMPLETE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) lp_advertising =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) mdio45_get_an(mdio, MDIO_AN_LPA) | npage_lpa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) if (an_stat & MDIO_AN_STAT1_LPABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) lp_advertising |= ADVERTISED_Autoneg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) modes = advertising & lp_advertising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if ((modes & ~ADVERTISED_Autoneg) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) modes = advertising;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (modes & (ADVERTISED_10000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ADVERTISED_10000baseKX4_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) ADVERTISED_10000baseKR_Full)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) speed = SPEED_10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) cmd->base.duplex = DUPLEX_FULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) } else if (modes & (ADVERTISED_1000baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) ADVERTISED_1000baseT_Half |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) ADVERTISED_1000baseKX_Full)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) speed = SPEED_1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) cmd->base.duplex = !(modes & ADVERTISED_1000baseT_Half);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) } else if (modes & (ADVERTISED_100baseT_Full |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) ADVERTISED_100baseT_Half)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) speed = SPEED_100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) cmd->base.duplex = !!(modes & ADVERTISED_100baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) speed = SPEED_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) cmd->base.duplex = !!(modes & ADVERTISED_10baseT_Full);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* Report forced settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) reg = mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MDIO_CTRL1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) speed = (((reg & MDIO_PMA_CTRL1_SPEED1000) ? 100 : 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * ((reg & MDIO_PMA_CTRL1_SPEED100) ? 100 : 10));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) cmd->base.duplex = (reg & MDIO_CTRL1_FULLDPLX ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) speed == SPEED_10000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) cmd->base.speed = speed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) advertising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.lp_advertising,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) lp_advertising);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* 10GBASE-T MDI/MDI-X */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) if (cmd->base.port == PORT_TP && (cmd->base.speed == SPEED_10000)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) switch (mdio->mdio_read(mdio->dev, mdio->prtad, MDIO_MMD_PMAPMD,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) MDIO_PMA_10GBT_SWAPPOL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) case MDIO_PMA_10GBT_SWAPPOL_ABNX | MDIO_PMA_10GBT_SWAPPOL_CDNX:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) cmd->base.eth_tp_mdix = ETH_TP_MDI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) case 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) cmd->base.eth_tp_mdix = ETH_TP_MDI_X;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) /* It's complicated... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) EXPORT_SYMBOL(mdio45_ethtool_ksettings_get_npage);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) * mdio_mii_ioctl - MII ioctl interface for MDIO (clause 22 or 45) PHYs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * @mdio: MDIO interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) * @mii_data: MII ioctl data structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) * @cmd: MII ioctl command
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) * Returns 0 on success, negative on error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) int mdio_mii_ioctl(const struct mdio_if_info *mdio,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) struct mii_ioctl_data *mii_data, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) int prtad, devad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) u16 addr = mii_data->reg_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /* Validate/convert cmd to one of SIOC{G,S}MIIREG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) switch (cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case SIOCGMIIPHY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) if (mdio->prtad == MDIO_PRTAD_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) mii_data->phy_id = mdio->prtad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) cmd = SIOCGMIIREG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) case SIOCGMIIREG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) case SIOCSMIIREG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* Validate/convert phy_id */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) if ((mdio->mode_support & MDIO_SUPPORTS_C45) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) mdio_phy_id_is_c45(mii_data->phy_id)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) prtad = mdio_phy_id_prtad(mii_data->phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) devad = mdio_phy_id_devad(mii_data->phy_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) } else if ((mdio->mode_support & MDIO_SUPPORTS_C22) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) mii_data->phy_id < 0x20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) prtad = mii_data->phy_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) devad = MDIO_DEVAD_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) addr &= 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) } else if ((mdio->mode_support & MDIO_EMULATE_C22) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) mdio->prtad != MDIO_PRTAD_NONE &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) mii_data->phy_id == mdio->prtad) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) /* Remap commonly-used MII registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) prtad = mdio->prtad;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) switch (addr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) case MII_BMCR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) case MII_BMSR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) case MII_PHYSID1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) case MII_PHYSID2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) devad = __ffs(mdio->mmds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) case MII_ADVERTISE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) case MII_LPA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (!(mdio->mmds & MDIO_DEVS_AN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) devad = MDIO_MMD_AN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) if (addr == MII_ADVERTISE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) addr = MDIO_AN_ADVERTISE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) addr = MDIO_AN_LPA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) if (cmd == SIOCGMIIREG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) int rc = mdio->mdio_read(mdio->dev, prtad, devad, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if (rc < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) mii_data->val_out = rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) return mdio->mdio_write(mdio->dev, prtad, devad, addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) mii_data->val_in);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) EXPORT_SYMBOL(mdio_mii_ioctl);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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