^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * baycom_par.c -- baycom par96 and picpar radio modem driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 1996-2000 Thomas Sailer (sailer@ife.ee.ethz.ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Please note that the GPL allows you to use the driver, NOT the radio.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * In order to use the radio, you need a license from the communications
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * authority of your country.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Supported modems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * par96: This is a modem for 9600 baud FSK compatible to the G3RUH standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The modem does all the filtering and regenerates the receiver clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Data is transferred from and to the PC via a shift register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * The shift register is filled with 16 bits and an interrupt is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * signalled. The PC then empties the shift register in a burst. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * modem connects to the parallel port, hence the name. The modem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * leaves the implementation of the HDLC protocol and the scrambler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * polynomial to the PC. This modem is no longer available (at least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * from Baycom) and has been replaced by the PICPAR modem (see below).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * You may however still build one from the schematics published in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * cq-DL :-).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * picpar: This is a redesign of the par96 modem by Henning Rech, DF9IC. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * modem is protocol compatible to par96, but uses only three low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * power ICs and can therefore be fed from the parallel port and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * does not require an additional power supply. It features
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * built in DCD circuitry. The driver should therefore be configured
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * for hardware DCD.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Command line options (insmod command line)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * mode driver mode string. Valid choices are par96 and picpar.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * iobase base address of the port; common values are 0x378, 0x278, 0x3bc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * 0.1 26.06.1996 Adapted from baycom.c and made network driver interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * 18.10.1996 Changed to new user space access routines (copy_{to,from}_user)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * 0.3 26.04.1997 init code/data tagged
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * 0.4 08.07.1997 alternative ser12 decoding algorithm (uses delta CTS ints)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * 0.5 11.11.1997 split into separate files for ser12/par96
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * 0.6 03.08.1999 adapt to Linus' new __setup/__initcall
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * removed some pre-2.2 kernel compatibility cruft
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * 0.7 10.08.1999 Check if parport can do SPP and is safe to access during interrupt contexts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * 0.8 12.02.2000 adapted to softnet driver interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * removed direct parport access, uses parport driver methods
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * 0.9 03.07.2000 fix interface name handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include <linux/hdlcdrv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include <linux/baycom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #include <linux/parport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define BAYCOM_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * modem options; bit mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define BAYCOM_OPTIONS_SOFTDCD 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const char bc_drvname[] = "baycom_par";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) static const char bc_drvinfo[] = KERN_INFO "baycom_par: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "baycom_par: version 0.9\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define NR_PORTS 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static struct net_device *baycom_device[NR_PORTS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define PAR96_BURSTBITS 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define PAR96_BURST 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define PAR96_PTT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define PAR96_TXBIT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define PAR96_ACK 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define PAR96_RXBIT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define PAR96_DCD 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define PAR97_POWER 0xf8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /* ---------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * Information that need to be kept for each board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) struct baycom_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) struct hdlcdrv_state hdrv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) struct pardevice *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) unsigned int options;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) struct modem_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) short arb_divider;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) unsigned char flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned int shreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct modem_state_par96 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int dcd_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned int dcd_shreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) unsigned long descram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) unsigned long scram;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) } par96;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } modem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #ifdef BAYCOM_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) struct debug_vals {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) unsigned long last_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) unsigned cur_intcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) unsigned last_intcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) int cur_pllcorr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) int last_pllcorr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) } debug_vals;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) #endif /* BAYCOM_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static inline void baycom_int_freq(struct baycom_state *bc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #ifdef BAYCOM_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) unsigned long cur_jiffies = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * measure the interrupt frequency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) bc->debug_vals.cur_intcnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (time_after_eq(cur_jiffies, bc->debug_vals.last_jiffies + HZ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) bc->debug_vals.last_jiffies = cur_jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) bc->debug_vals.last_intcnt = bc->debug_vals.cur_intcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) bc->debug_vals.cur_intcnt = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) bc->debug_vals.last_pllcorr = bc->debug_vals.cur_pllcorr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) bc->debug_vals.cur_pllcorr = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #endif /* BAYCOM_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * ===================== PAR96 specific routines =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define PAR96_DESCRAM_TAP1 0x20000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define PAR96_DESCRAM_TAP2 0x01000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define PAR96_DESCRAM_TAP3 0x00001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define PAR96_DESCRAM_TAPSH1 17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define PAR96_DESCRAM_TAPSH2 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define PAR96_DESCRAM_TAPSH3 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define PAR96_SCRAM_TAP1 0x20000 /* X^17 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define PAR96_SCRAM_TAPN 0x00021 /* X^0+X^5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) static inline void par96_tx(struct net_device *dev, struct baycom_state *bc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) unsigned int data = hdlcdrv_getbits(&bc->hdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct parport *pp = bc->pdev->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) for(i = 0; i < PAR96_BURSTBITS; i++, data >>= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) unsigned char val = PAR97_POWER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) bc->modem.par96.scram = ((bc->modem.par96.scram << 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) (bc->modem.par96.scram & 1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (!(data & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) bc->modem.par96.scram ^= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (bc->modem.par96.scram & (PAR96_SCRAM_TAP1 << 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) bc->modem.par96.scram ^=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) (PAR96_SCRAM_TAPN << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (bc->modem.par96.scram & (PAR96_SCRAM_TAP1 << 2))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) val |= PAR96_TXBIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) pp->ops->write_data(pp, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) pp->ops->write_data(pp, val | PAR96_BURST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) static inline void par96_rx(struct net_device *dev, struct baycom_state *bc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) unsigned int data, mask, mask2, descx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) struct parport *pp = bc->pdev->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * do receiver; differential decode and descramble on the fly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) for(data = i = 0; i < PAR96_BURSTBITS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) bc->modem.par96.descram = (bc->modem.par96.descram << 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (pp->ops->read_status(pp) & PAR96_RXBIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) bc->modem.par96.descram |= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) descx = bc->modem.par96.descram ^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) (bc->modem.par96.descram >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* now the diff decoded data is inverted in descram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) pp->ops->write_data(pp, PAR97_POWER | PAR96_PTT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) descx ^= ((descx >> PAR96_DESCRAM_TAPSH1) ^
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) (descx >> PAR96_DESCRAM_TAPSH2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) data >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (!(descx & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) data |= 0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) pp->ops->write_data(pp, PAR97_POWER | PAR96_PTT | PAR96_BURST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) hdlcdrv_putbits(&bc->hdrv, data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * do DCD algorithm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (bc->options & BAYCOM_OPTIONS_SOFTDCD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) bc->modem.par96.dcd_shreg = (bc->modem.par96.dcd_shreg >> 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) | (data << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* search for flags and set the dcd counter appropriately */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) for(mask = 0x1fe00, mask2 = 0xfc00, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if ((bc->modem.par96.dcd_shreg & mask) == mask2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) bc->modem.par96.dcd_count = HDLCDRV_MAXFLEN+4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* check for abort/noise sequences */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) for(mask = 0x1fe00, mask2 = 0x1fe00, i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) i < PAR96_BURSTBITS; i++, mask <<= 1, mask2 <<= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (((bc->modem.par96.dcd_shreg & mask) == mask2) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) (bc->modem.par96.dcd_count >= 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) bc->modem.par96.dcd_count -= HDLCDRV_MAXFLEN-10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* decrement and set the dcd variable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (bc->modem.par96.dcd_count >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) bc->modem.par96.dcd_count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) hdlcdrv_setdcd(&bc->hdrv, bc->modem.par96.dcd_count > 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) hdlcdrv_setdcd(&bc->hdrv, !!(pp->ops->read_status(pp) & PAR96_DCD));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) static void par96_interrupt(void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) struct net_device *dev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) struct baycom_state *bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) baycom_int_freq(bc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) * check if transmitter active
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) if (hdlcdrv_ptt(&bc->hdrv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) par96_tx(dev, bc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) par96_rx(dev, bc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (--bc->modem.arb_divider <= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) bc->modem.arb_divider = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) hdlcdrv_arbitrate(dev, &bc->hdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) local_irq_enable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) hdlcdrv_transmitter(dev, &bc->hdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) hdlcdrv_receiver(dev, &bc->hdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void par96_wakeup(void *handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct net_device *dev = (struct net_device *)handle;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) struct baycom_state *bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) printk(KERN_DEBUG "baycom_par: %s: why am I being woken up?\n", dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (!parport_claim(bc->pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) printk(KERN_DEBUG "baycom_par: %s: I'm broken.\n", dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) static int par96_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct baycom_state *bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct pardev_cb par_cb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct parport *pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if (!dev || !bc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) pp = parport_find_base(dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (!pp) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) printk(KERN_ERR "baycom_par: parport at 0x%lx unknown\n", dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if (pp->irq < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) printk(KERN_ERR "baycom_par: parport at 0x%lx has no irq\n", pp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) parport_put_port(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if ((~pp->modes) & (PARPORT_MODE_PCSPP | PARPORT_MODE_SAFEININT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) printk(KERN_ERR "baycom_par: parport at 0x%lx cannot be used\n", pp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) parport_put_port(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) memset(&bc->modem, 0, sizeof(bc->modem));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) bc->hdrv.par.bitrate = 9600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) memset(&par_cb, 0, sizeof(par_cb));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) par_cb.wakeup = par96_wakeup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) par_cb.irq_func = par96_interrupt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) par_cb.private = (void *)dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) par_cb.flags = PARPORT_DEV_EXCL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) for (i = 0; i < NR_PORTS; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (baycom_device[i] == dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (i == NR_PORTS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) pr_err("%s: no device found\n", bc_drvname);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) parport_put_port(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) bc->pdev = parport_register_dev_model(pp, dev->name, &par_cb, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) parport_put_port(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) if (!bc->pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) printk(KERN_ERR "baycom_par: cannot register parport at 0x%lx\n", dev->base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (parport_claim(bc->pdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) printk(KERN_ERR "baycom_par: parport at 0x%lx busy\n", pp->base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) parport_unregister_device(bc->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) pp = bc->pdev->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev->irq = pp->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) pp->ops->data_forward(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) bc->hdrv.par.bitrate = 9600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) pp->ops->write_data(pp, PAR96_PTT | PAR97_POWER); /* switch off PTT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) pp->ops->enable_irq(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) printk(KERN_INFO "%s: par96 at iobase 0x%lx irq %u options 0x%x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) bc_drvname, dev->base_addr, dev->irq, bc->options);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static int par96_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) struct baycom_state *bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) struct parport *pp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) if (!dev || !bc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) pp = bc->pdev->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* disable interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) pp->ops->disable_irq(pp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) /* switch off PTT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) pp->ops->write_data(pp, PAR96_PTT | PAR97_POWER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) parport_release(bc->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) parport_unregister_device(bc->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) printk(KERN_INFO "%s: close par96 at iobase 0x%lx irq %u\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) bc_drvname, dev->base_addr, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * ===================== hdlcdrv driver interface =========================
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) struct hdlcdrv_ioctl *hi, int cmd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) static const struct hdlcdrv_ops par96_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .drvname = bc_drvname,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .drvinfo = bc_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .open = par96_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .close = par96_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) .ioctl = baycom_ioctl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static int baycom_setmode(struct baycom_state *bc, const char *modestr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (!strncmp(modestr, "picpar", 6))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) bc->options = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) else if (!strncmp(modestr, "par96", 5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) bc->options = BAYCOM_OPTIONS_SOFTDCD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) bc->options = !!strchr(modestr, '*');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) static int baycom_ioctl(struct net_device *dev, struct ifreq *ifr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct hdlcdrv_ioctl *hi, int cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) struct baycom_state *bc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) struct baycom_ioctl bi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) BUG_ON(bc->hdrv.magic != HDLCDRV_MAGIC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (cmd != SIOCDEVPRIVATE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) switch (hi->cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) case HDLCDRVCTL_GETMODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) strcpy(hi->data.modename, bc->options ? "par96" : "picpar");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) case HDLCDRVCTL_SETMODE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) if (netif_running(dev) || !capable(CAP_NET_ADMIN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return -EACCES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) hi->data.modename[sizeof(hi->data.modename)-1] = '\0';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return baycom_setmode(bc, hi->data.modename);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) case HDLCDRVCTL_MODELIST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) strcpy(hi->data.modename, "par96,picpar");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (copy_to_user(ifr->ifr_data, hi, sizeof(struct hdlcdrv_ioctl)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) case HDLCDRVCTL_MODEMPARMASK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) return HDLCDRV_PARMASK_IOBASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) if (copy_from_user(&bi, ifr->ifr_data, sizeof(bi)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) switch (bi.cmd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return -ENOIOCTLCMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) #ifdef BAYCOM_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case BAYCOMCTL_GETDEBUG:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) bi.data.dbg.debug1 = bc->hdrv.ptt_keyed;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) bi.data.dbg.debug2 = bc->debug_vals.last_intcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) bi.data.dbg.debug3 = bc->debug_vals.last_pllcorr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) #endif /* BAYCOM_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (copy_to_user(ifr->ifr_data, &bi, sizeof(bi)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * command line settable parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) static char *mode[NR_PORTS] = { "picpar", };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) static int iobase[NR_PORTS] = { 0x378, };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) module_param_array(mode, charp, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) MODULE_PARM_DESC(mode, "baycom operating mode; eg. par96 or picpar");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) module_param_hw_array(iobase, int, ioport, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) MODULE_PARM_DESC(iobase, "baycom io base address");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) MODULE_DESCRIPTION("Baycom par96 and picpar amateur radio modem driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static int baycom_par_probe(struct pardevice *par_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) struct device_driver *drv = par_dev->dev.driver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) int len = strlen(drv->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (strncmp(par_dev->name, drv->name, len))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static struct parport_driver baycom_par_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .name = "bcp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .probe = baycom_par_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .devmodel = true,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) static int __init init_baycompar(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) int i, found = 0, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) char set_hw = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) printk(bc_drvinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ret = parport_register_driver(&baycom_par_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) * register net devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) for (i = 0; i < NR_PORTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) struct baycom_state *bc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) char ifname[IFNAMSIZ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) sprintf(ifname, "bcp%d", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (!mode[i])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) set_hw = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (!set_hw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) iobase[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) dev = hdlcdrv_register(&par96_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) sizeof(struct baycom_state),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) ifname, iobase[i], 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) if (IS_ERR(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) bc = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (set_hw && baycom_setmode(bc, mode[i]))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) set_hw = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) found++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) baycom_device[i] = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (!found) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) parport_unregister_driver(&baycom_par_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) static void __exit cleanup_baycompar(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) for(i = 0; i < NR_PORTS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) struct net_device *dev = baycom_device[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) if (dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) hdlcdrv_unregister(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) parport_unregister_driver(&baycom_par_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) module_init(init_baycompar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) module_exit(cleanup_baycompar);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) /* --------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) #ifndef MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) * format: baycom_par=io,mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) * mode: par96,picpar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) static int __init baycom_par_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) static unsigned nr_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) int ints[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (nr_dev >= NR_PORTS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) str = get_options(str, 2, ints);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (ints[0] < 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) mode[nr_dev] = str;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) iobase[nr_dev] = ints[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) nr_dev++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) __setup("baycom_par=", baycom_par_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) #endif /* MODULE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* --------------------------------------------------------------------- */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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