^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C)Copyright 1998,1999 SysKonnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * See the file "skfddi.c" for further information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * The information in this file is provided "AS IS" without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) SMT 7.2 Status Response Frame Implementation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) SRF state machine and frame generation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "h/types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "h/fddi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "h/smc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "h/smt_p.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "h/smtstate.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #ifndef SLIM_SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifndef BOOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #ifndef lint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static const char ID_sccs[] = "@(#)srf.c 1.18 97/08/04 (C) SK " ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * function declarations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static void clear_all_rep(struct s_smc *smc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static void clear_reported(struct s_smc *smc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static void smt_send_srf(struct s_smc *smc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static struct s_srf_evc *smt_get_evc(struct s_smc *smc, int code, int index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MAX_EVCS ARRAY_SIZE(smc->evcs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct evc_init {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u_char code ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u_char index ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u_char n ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u_short para ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) } ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static const struct evc_init evc_inits[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) { SMT_COND_SMT_PEER_WRAP, 0,1,SMT_P1048 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) { SMT_COND_MAC_DUP_ADDR, INDEX_MAC, NUMMACS,SMT_P208C } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) { SMT_COND_MAC_FRAME_ERROR, INDEX_MAC, NUMMACS,SMT_P208D } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) { SMT_COND_MAC_NOT_COPIED, INDEX_MAC, NUMMACS,SMT_P208E } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) { SMT_EVENT_MAC_NEIGHBOR_CHANGE, INDEX_MAC, NUMMACS,SMT_P208F } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) { SMT_EVENT_MAC_PATH_CHANGE, INDEX_MAC, NUMMACS,SMT_P2090 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) { SMT_COND_PORT_LER, INDEX_PORT,NUMPHYS,SMT_P4050 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) { SMT_COND_PORT_EB_ERROR, INDEX_PORT,NUMPHYS,SMT_P4052 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) { SMT_EVENT_PORT_CONNECTION, INDEX_PORT,NUMPHYS,SMT_P4051 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) { SMT_EVENT_PORT_PATH_CHANGE, INDEX_PORT,NUMPHYS,SMT_P4053 } ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) } ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MAX_INIT_EVC ARRAY_SIZE(evc_inits)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void smt_init_evc(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) const struct evc_init *init ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) unsigned int i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int index ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) int offset ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static u_char fail_safe = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) memset((char *)smc->evcs,0,sizeof(smc->evcs)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) evc = smc->evcs ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) init = evc_inits ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) for (i = 0 ; i < MAX_INIT_EVC ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) for (index = 0 ; index < init->n ; index++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) evc->evc_code = init->code ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) evc->evc_para = init->para ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) evc->evc_index = init->index + index ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #ifndef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) evc->evc_multiple = &fail_safe ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) evc->evc_cond_state = &fail_safe ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) evc++ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) init++ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if ((unsigned int) (evc - smc->evcs) > MAX_EVCS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) SMT_PANIC(smc,SMT_E0127, SMT_E0127_MSG) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) smc->evcs[0].evc_cond_state = &smc->mib.fddiSMTPeerWrapFlag ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) smc->evcs[1].evc_cond_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) &smc->mib.m[MAC0].fddiMACDuplicateAddressCond ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) smc->evcs[2].evc_cond_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) &smc->mib.m[MAC0].fddiMACFrameErrorFlag ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) smc->evcs[3].evc_cond_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) &smc->mib.m[MAC0].fddiMACNotCopiedFlag ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) smc->evcs[4].evc_multiple = &smc->mib.m[MAC0].fddiMACMultiple_N ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) smc->evcs[5].evc_multiple = &smc->mib.m[MAC0].fddiMACMultiple_P ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) offset = 6 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) for (i = 0 ; i < NUMPHYS ; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) smc->evcs[offset + 0*NUMPHYS].evc_cond_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) &smc->mib.p[i].fddiPORTLerFlag ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) smc->evcs[offset + 1*NUMPHYS].evc_cond_state =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) &smc->mib.p[i].fddiPORTEB_Condition ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * events
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) smc->evcs[offset + 2*NUMPHYS].evc_multiple =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) &smc->mib.p[i].fddiPORTMultiple_U ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) smc->evcs[offset + 3*NUMPHYS].evc_multiple =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) &smc->mib.p[i].fddiPORTMultiple_P ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) offset++ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) for (i = 0, evc = smc->evcs ; i < MAX_EVCS ; i++, evc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (SMT_IS_CONDITION(evc->evc_code)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (!evc->evc_cond_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) SMT_PANIC(smc,SMT_E0128, SMT_E0128_MSG) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) evc->evc_multiple = &fail_safe ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (!evc->evc_multiple) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) SMT_PANIC(smc,SMT_E0129, SMT_E0129_MSG) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) evc->evc_cond_state = &fail_safe ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) smc->srf.sr_state = SR0_WAIT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static struct s_srf_evc *smt_get_evc(struct s_smc *smc, int code, int index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) unsigned int i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) for (i = 0, evc = smc->evcs ; i < MAX_EVCS ; i++, evc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (evc->evc_code == code && evc->evc_index == index)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) return evc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define THRESHOLD_2 (2*TICKS_PER_SECOND)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define THRESHOLD_32 (32*TICKS_PER_SECOND)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static const char * const srf_names[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) "None","MACPathChangeEvent", "MACNeighborChangeEvent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) "PORTPathChangeEvent", "PORTUndesiredConnectionAttemptEvent",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) "SMTPeerWrapCondition", "SMTHoldCondition",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) "MACFrameErrorCondition", "MACDuplicateAddressCondition",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) "MACNotCopiedCondition", "PORTEBErrorCondition",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) "PORTLerCondition"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) } ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) void smt_srf_event(struct s_smc *smc, int code, int index, int cond)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) int cond_asserted = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) int cond_deasserted = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int event_occurred = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) int tsr ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int T_Limit = 2*TICKS_PER_SECOND ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) if (code == SMT_COND_MAC_DUP_ADDR && cond) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) RS_SET(smc,RS_DUPADDR) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (code) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) DB_SMT("SRF: %s index %d", srf_names[code], index);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!(evc = smt_get_evc(smc,code,index))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) DB_SMT("SRF : smt_get_evc() failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * ignore condition if no change
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) if (SMT_IS_CONDITION(code)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (*evc->evc_cond_state == cond)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * set transition time stamp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) smt_set_timestamp(smc,smc->mib.fddiSMTTransitionTimeStamp) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (SMT_IS_CONDITION(code)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) DB_SMT("SRF: condition is %s", cond ? "ON" : "OFF");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (cond) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *evc->evc_cond_state = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) evc->evc_rep_required = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) smc->srf.any_report = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) cond_asserted = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) *evc->evc_cond_state = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) cond_deasserted = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (evc->evc_rep_required) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) *evc->evc_multiple = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) evc->evc_rep_required = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) *evc->evc_multiple = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) smc->srf.any_report = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) event_occurred = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #ifdef FDDI_MIB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) snmp_srf_event(smc,evc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) #endif /* FDDI_MIB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) tsr = smt_get_time() - smc->srf.TSR ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) switch (smc->srf.sr_state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) case SR0_WAIT :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /* SR01a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) if (cond_asserted && tsr < T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) smc->srf.SRThreshold = THRESHOLD_2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) smc->srf.sr_state = SR1_HOLDOFF ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* SR01b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (cond_deasserted && tsr < T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) smc->srf.sr_state = SR1_HOLDOFF ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /* SR01c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (event_occurred && tsr < T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) smc->srf.sr_state = SR1_HOLDOFF ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) /* SR00b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (cond_asserted && tsr >= T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) smc->srf.SRThreshold = THRESHOLD_2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) smt_send_srf(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* SR00c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (cond_deasserted && tsr >= T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) smt_send_srf(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* SR00d */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (event_occurred && tsr >= T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) smt_send_srf(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* SR00e */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (smc->srf.any_report && (u_long) tsr >=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) smc->srf.SRThreshold) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) smc->srf.SRThreshold *= 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (smc->srf.SRThreshold > THRESHOLD_32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) smc->srf.SRThreshold = THRESHOLD_32 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) smt_send_srf(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /* SR02 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) if (!smc->mib.fddiSMTStatRptPolicy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) smc->srf.sr_state = SR2_DISABLED ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) case SR1_HOLDOFF :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) /* SR10b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) if (tsr >= T_Limit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) smc->srf.sr_state = SR0_WAIT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) smt_send_srf(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* SR11a */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) if (cond_asserted) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) smc->srf.SRThreshold = THRESHOLD_2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* SR11b */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) /* SR11c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* handled above */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* SR12 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (!smc->mib.fddiSMTStatRptPolicy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) smc->srf.sr_state = SR2_DISABLED ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) case SR2_DISABLED :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) if (smc->mib.fddiSMTStatRptPolicy) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) smc->srf.sr_state = SR0_WAIT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) smc->srf.TSR = smt_get_time() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) smc->srf.SRThreshold = THRESHOLD_2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) clear_all_rep(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) static void clear_all_rep(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) unsigned int i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) for (i = 0, evc = smc->evcs ; i < MAX_EVCS ; i++, evc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) evc->evc_rep_required = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) if (SMT_IS_CONDITION(evc->evc_code))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) *evc->evc_cond_state = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) smc->srf.any_report = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) static void clear_reported(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) unsigned int i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) smc->srf.any_report = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) for (i = 0, evc = smc->evcs ; i < MAX_EVCS ; i++, evc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) if (SMT_IS_CONDITION(evc->evc_code)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (*evc->evc_cond_state == FALSE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) evc->evc_rep_required = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) smc->srf.any_report = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) evc->evc_rep_required = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) *evc->evc_multiple = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) * build and send SMT SRF frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) static void smt_send_srf(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) struct smt_header *smt ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) struct s_srf_evc *evc ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) SK_LOC_DECL(struct s_pcon,pcon) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) SMbuf *mb ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) unsigned int i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) static const struct fddi_addr SMT_SRF_DA = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) { 0x80, 0x01, 0x43, 0x00, 0x80, 0x08 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) } ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * build SMT header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (!smc->r.sm_ma_avail)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) return ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (!(mb = smt_build_frame(smc,SMT_SRF,SMT_ANNOUNCE,0)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) return ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) RS_SET(smc,RS_SOFTERROR) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) smt = smtod(mb, struct smt_header *) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) smt->smt_dest = SMT_SRF_DA ; /* DA == SRF multicast */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * setup parameter status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) pcon.pc_len = SMT_MAX_INFO_LEN ; /* max para length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) pcon.pc_err = 0 ; /* no error */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) pcon.pc_badset = 0 ; /* no bad set count */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) pcon.pc_p = (void *) (smt + 1) ; /* paras start here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) smt_add_para(smc,&pcon,(u_short) SMT_P1033,0,0) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) smt_add_para(smc,&pcon,(u_short) SMT_P1034,0,0) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) for (i = 0, evc = smc->evcs ; i < MAX_EVCS ; i++, evc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) if (evc->evc_rep_required) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) smt_add_para(smc,&pcon,evc->evc_para,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) (int)evc->evc_index,0) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) smt->smt_len = SMT_MAX_INFO_LEN - pcon.pc_len ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) mb->sm_len = smt->smt_len + sizeof(struct smt_header) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) DB_SMT("SRF: sending SRF at %p, len %d", smt, mb->sm_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) DB_SMT("SRF: state SR%d Threshold %lu",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) smc->srf.sr_state, smc->srf.SRThreshold / TICKS_PER_SECOND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) dump_smt(smc,smt,"SRF Send") ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) smt_send_frame(smc,mb,FC_SMT_INFO,0) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) clear_reported(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) #endif /* no BOOT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) #endif /* no SLIM_SMT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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