^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C)Copyright 1998,1999 SysKonnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * See the file "skfddi.c" for further information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * The information in this file is provided "AS IS" without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) Init SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) call all module level initialization routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "h/types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "h/fddi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "h/smc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #ifndef lint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static const char ID_sccs[] = "@(#)smtinit.c 1.15 97/05/06 (C) SK " ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) void init_fddi_driver(struct s_smc *smc, u_char *mac_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /* define global debug variable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #if defined(DEBUG) && !defined(DEBUG_BRD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct smt_debug debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifndef MULT_OEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define OEMID(smc,i) oem_id[i]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) extern u_char oem_id[] ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #else /* MULT_OEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define OEMID(smc,i) smc->hw.oem_id->oi_mark[i]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern struct s_oem_ids oem_ids[] ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #endif /* MULT_OEM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Set OEM specific values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Can not be called in smt_reset_defaults, because it is not sure that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * the OEM ID is already defined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static void set_oem_spec_val(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) struct fddi_mib *mib ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) mib = &smc->mib ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * set IBM specific values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (OEMID(smc,0) == 'I') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) mib->fddiSMTConnectionPolicy = POLICY_MM ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Init SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) int init_smt(struct s_smc *smc, u_char *mac_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* u_char *mac_addr; canonical address or NULL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int p ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #if defined(DEBUG) && !defined(DEBUG_BRD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) debug.d_smt = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) debug.d_smtf = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) debug.d_rmt = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) debug.d_ecm = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) debug.d_pcm = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) debug.d_cfm = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) debug.d_plc = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #ifdef ESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) debug.d_ess = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #ifdef SBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) debug.d_sba = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif /* DEBUG && !DEBUG_BRD */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) /* First initialize the ports mib->pointers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) for ( p = 0; p < NUMPHYS; p ++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) smc->y[p].mib = & smc->mib.p[p] ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) set_oem_spec_val(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) (void) smt_set_mac_opvalues(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) init_fddi_driver(smc,mac_addr) ; /* HW driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) smt_fixup_mib(smc) ; /* update values that depend on s.sas */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ev_init(smc) ; /* event queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #ifndef SLIM_SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) smt_init_evc(smc) ; /* evcs in MIB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #endif /* no SLIM_SMT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) smt_timer_init(smc) ; /* timer package */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) smt_agent_init(smc) ; /* SMT frame manager */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) pcm_init(smc) ; /* PCM state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) ecm_init(smc) ; /* ECM state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) cfm_init(smc) ; /* CFM state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) rmt_init(smc) ; /* RMT state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) for (p = 0 ; p < NUMPHYS ; p++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) pcm(smc,p,0) ; /* PCM A state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) ecm(smc,0) ; /* ECM state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) cfm(smc,0) ; /* CFM state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) rmt(smc,0) ; /* RMT state machine */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) smt_agent_task(smc) ; /* NIF FSM etc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) PNMI_INIT(smc) ; /* PNMI initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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