Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *	(C)Copyright 1998,1999 SysKonnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *	a business unit of Schneider & Koch & Co. Datensysteme GmbH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *	See the file "skfddi.c" for further information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *	The information in this file is provided "AS IS" without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	SMT/CMT defaults
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include "h/types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include "h/fddi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include "h/smc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #ifndef OEM_USER_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define OEM_USER_DATA	"SK-NET FDDI V2.0 Userdata"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #ifndef	lint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) static const char ID_sccs[] = "@(#)smtdef.c	2.53 99/08/11 (C) SK " ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * defaults
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define TTMS(x)	((u_long)(x)*1000L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define TTS(x)	((u_long)(x)*1000000L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define TTUS(x)	((u_long)(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define DEFAULT_TB_MIN		TTMS(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define DEFAULT_TB_MAX		TTMS(50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define DEFAULT_C_MIN		TTUS(1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define DEFAULT_T_OUT		TTMS(100+5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define DEFAULT_TL_MIN		TTUS(30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define DEFAULT_LC_SHORT	TTMS(50+5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) #define DEFAULT_LC_MEDIUM	TTMS(500+20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) #define DEFAULT_LC_LONG		TTS(5)+TTMS(50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define DEFAULT_LC_EXTENDED	TTS(50)+TTMS(50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define DEFAULT_T_NEXT_9	TTMS(200+10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define DEFAULT_NS_MAX		TTUS(1310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define DEFAULT_I_MAX		TTMS(25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define DEFAULT_IN_MAX		TTMS(40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define DEFAULT_TD_MIN		TTMS(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define DEFAULT_T_NON_OP	TTS(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define DEFAULT_T_STUCK		TTS(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define DEFAULT_T_DIRECT	TTMS(370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define DEFAULT_T_JAM		TTMS(370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define DEFAULT_T_ANNOUNCE	TTMS(2500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define DEFAULT_D_MAX		TTUS(1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define DEFAULT_LEM_ALARM	(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define DEFAULT_LEM_CUTOFF	(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define DEFAULT_TEST_DONE	TTS(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define DEFAULT_CHECK_POLL	TTS(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define DEFAULT_POLL		TTMS(50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63)  * LCT errors threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define DEFAULT_LCT_SHORT	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define DEFAULT_LCT_MEDIUM	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define DEFAULT_LCT_LONG	5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define DEFAULT_LCT_EXTEND	50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) /* Forward declarations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) void smt_reset_defaults(struct s_smc *smc, int level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) static void smt_init_mib(struct s_smc *smc, int level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) static int set_min_max(int maxflag, u_long mib, u_long limit, u_long *oper);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define MS2BCLK(x)	((x)*12500L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define US2BCLK(x)	((x)*1250L)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) void smt_reset_defaults(struct s_smc *smc, int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	struct smt_config	*smt ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	int			i ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	u_long			smt_boot_time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	smt_init_mib(smc,level) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	smc->os.smc_version = SMC_VERSION ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	smt_boot_time = smt_get_time();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	for( i = 0; i < NUMMACS; i++ )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 		smc->sm.last_tok_time[i] = smt_boot_time ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	smt = &smc->s ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	smt->attach_s = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	smt->build_ring_map = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	smt->sas = SMT_DAS ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	smt->numphys = NUMPHYS ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	smt->pcm_tb_min = DEFAULT_TB_MIN ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	smt->pcm_tb_max = DEFAULT_TB_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	smt->pcm_c_min = DEFAULT_C_MIN ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	smt->pcm_t_out = DEFAULT_T_OUT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	smt->pcm_tl_min = DEFAULT_TL_MIN ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	smt->pcm_lc_short = DEFAULT_LC_SHORT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	smt->pcm_lc_medium = DEFAULT_LC_MEDIUM ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	smt->pcm_lc_long = DEFAULT_LC_LONG ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	smt->pcm_lc_extended = DEFAULT_LC_EXTENDED ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	smt->pcm_t_next_9 = DEFAULT_T_NEXT_9 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	smt->pcm_ns_max = DEFAULT_NS_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	smt->ecm_i_max = DEFAULT_I_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	smt->ecm_in_max = DEFAULT_IN_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	smt->ecm_td_min = DEFAULT_TD_MIN ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	smt->ecm_test_done = DEFAULT_TEST_DONE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	smt->ecm_check_poll = DEFAULT_CHECK_POLL ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	smt->rmt_t_non_op = DEFAULT_T_NON_OP ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	smt->rmt_t_stuck = DEFAULT_T_STUCK ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	smt->rmt_t_direct = DEFAULT_T_DIRECT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	smt->rmt_t_jam = DEFAULT_T_JAM ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	smt->rmt_t_announce = DEFAULT_T_ANNOUNCE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	smt->rmt_t_poll = DEFAULT_POLL ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)         smt->rmt_dup_mac_behavior = FALSE ;  /* See Struct smt_config */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	smt->mac_d_max = DEFAULT_D_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	smt->lct_short = DEFAULT_LCT_SHORT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	smt->lct_medium = DEFAULT_LCT_MEDIUM ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	smt->lct_long = DEFAULT_LCT_LONG ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	smt->lct_extended = DEFAULT_LCT_EXTEND ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #ifndef	SLIM_SMT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #ifdef	ESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		smc->ess.sync_bw_available = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 		smc->mib.fddiESSPayload = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		smc->mib.fddiESSOverhead = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		smc->mib.fddiESSMaxTNeg = (u_long)(- MS2BCLK(25)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		smc->mib.fddiESSMinSegmentSize = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 		smc->mib.fddiESSCategory = SB_STATIC ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		smc->mib.fddiESSSynchTxMode = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 		smc->ess.raf_act_timer_poll = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		smc->ess.timer_count = 7 ; 	/* first RAF alc req after 3s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	smc->ess.local_sba_active = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	smc->ess.sba_reply_pend = NULL ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #ifdef	SBA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	smt_init_sba(smc,level) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #endif	/* no SLIM_SMT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #ifdef	TAG_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 		smc->hw.pci_fix_value = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)  * manufacturer data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) static const char man_data[32] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*	 01234567890123456789012345678901	*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	"xxxSK-NET FDDI SMT 7.3 - V2.8.8" ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static void smt_init_mib(struct s_smc *smc, int level)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	struct fddi_mib		*mib ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	struct fddi_mib_p	*pm ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	int			port ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	int			path ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	mib = &smc->mib ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		 * set EVERYTHING to ZERO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 		 * EXCEPT hw and os
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 		memset(((char *)smc)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 			sizeof(struct s_smt_os)+sizeof(struct s_smt_hw), 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 			sizeof(struct s_smc) -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 			sizeof(struct s_smt_os) - sizeof(struct s_smt_hw)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 		mib->fddiSMTRemoteDisconnectFlag = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 		mib->fddiSMTPeerWrapFlag = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	mib->fddiSMTOpVersionId = 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	mib->fddiSMTHiVersionId = 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	mib->fddiSMTLoVersionId = 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	memcpy((char *) mib->fddiSMTManufacturerData,man_data,32) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		strcpy(mib->fddiSMTUserData,OEM_USER_DATA) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	mib->fddiSMTMIBVersionId = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	mib->fddiSMTMac_Ct = NUMMACS ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	mib->fddiSMTConnectionPolicy = POLICY_MM | POLICY_AA | POLICY_BB ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	 * fddiSMTNonMaster_Ct and fddiSMTMaster_Ct are set in smt_fixup_mib
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	 * s.sas is not set yet (is set in init driver)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	mib->fddiSMTAvailablePaths = MIB_PATH_P | MIB_PATH_S ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	mib->fddiSMTConfigCapabilities = 0 ;	/* no hold,no wrap_ab*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	mib->fddiSMTTT_Notify = 10 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	mib->fddiSMTStatRptPolicy = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	mib->fddiSMTTrace_MaxExpiration = SEC2MIB(7) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	mib->fddiSMTMACIndexes = INDEX_MAC ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	mib->fddiSMTStationStatus = MIB_SMT_STASTA_SEPA ;	/* separated */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	mib->m[MAC0].fddiMACIndex = INDEX_MAC ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	mib->m[MAC0].fddiMACFrameStatusFunctions = FSC_TYPE0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	mib->m[MAC0].fddiMACRequestedPaths =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		MIB_P_PATH_LOCAL |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 		MIB_P_PATH_SEC_ALTER |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		MIB_P_PATH_PRIM_ALTER ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	mib->m[MAC0].fddiMACAvailablePaths = MIB_PATH_P ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	mib->m[MAC0].fddiMACCurrentPath = MIB_PATH_PRIMARY ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	mib->m[MAC0].fddiMACT_MaxCapabilitiy = (u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	mib->m[MAC0].fddiMACTVXCapabilitiy = (u_long)(- US2BCLK(52)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 		mib->m[MAC0].fddiMACTvxValue = (u_long)(- US2BCLK(27)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 		mib->m[MAC0].fddiMACTvxValueMIB = (u_long)(- US2BCLK(27)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 		mib->m[MAC0].fddiMACT_Req = (u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 		mib->m[MAC0].fddiMACT_ReqMIB = (u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 		mib->m[MAC0].fddiMACT_Max = (u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 		mib->m[MAC0].fddiMACT_MaxMIB = (u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 		mib->m[MAC0].fddiMACT_Min = (u_long)(- MS2BCLK(4)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	mib->m[MAC0].fddiMACHardwarePresent = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	mib->m[MAC0].fddiMACMA_UnitdataEnable = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	mib->m[MAC0].fddiMACFrameErrorThreshold = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	mib->m[MAC0].fddiMACNotCopiedThreshold = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	 * Path attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	for (path = 0 ; path < NUMPATHS ; path++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 		mib->a[path].fddiPATHIndex = INDEX_PATH + path ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 		if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 			mib->a[path].fddiPATHTVXLowerBound =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 				(u_long)(- US2BCLK(27)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 			mib->a[path].fddiPATHT_MaxLowerBound =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 				(u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			mib->a[path].fddiPATHMaxT_Req =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 				(u_long)(- MS2BCLK(165)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	 * Port attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	pm = mib->p ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	for (port = 0 ; port <  NUMPHYS ; port++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 		 * set MIB pointer in phy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		/* Attention: don't initialize mib pointer here! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 		/*  It must be initialized during phase 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		smc->y[port].mib = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		mib->fddiSMTPORTIndexes[port] = port+INDEX_PORT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		pm->fddiPORTIndex = port+INDEX_PORT ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		pm->fddiPORTHardwarePresent = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 		if (level == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 			pm->fddiPORTLer_Alarm = DEFAULT_LEM_ALARM ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 			pm->fddiPORTLer_Cutoff = DEFAULT_LEM_CUTOFF ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		 * fddiPORTRequestedPaths are set in pcmplc.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 		 * we don't know the port type yet !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 		pm->fddiPORTRequestedPaths[1] = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		pm->fddiPORTRequestedPaths[2] = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 		pm->fddiPORTRequestedPaths[3] = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 		pm->fddiPORTAvailablePaths = MIB_PATH_P ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		pm->fddiPORTPMDClass = MIB_PMDCLASS_MULTI ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		pm++ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	(void) smt_set_mac_opvalues(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) int smt_set_mac_opvalues(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	int	st ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	int	st2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	st = set_min_max(1,smc->mib.m[MAC0].fddiMACTvxValueMIB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		smc->mib.a[PATH0].fddiPATHTVXLowerBound,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		&smc->mib.m[MAC0].fddiMACTvxValue) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	st |= set_min_max(0,smc->mib.m[MAC0].fddiMACT_MaxMIB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 		smc->mib.a[PATH0].fddiPATHT_MaxLowerBound,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 		&smc->mib.m[MAC0].fddiMACT_Max) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	st |= (st2 = set_min_max(0,smc->mib.m[MAC0].fddiMACT_ReqMIB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 		smc->mib.a[PATH0].fddiPATHMaxT_Req,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 		&smc->mib.m[MAC0].fddiMACT_Req)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	if (st2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 		/* Treq attribute changed remotely. So send an AIX_EVENT to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 		 * user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 		AIX_EVENT(smc, (u_long) FDDI_RING_STATUS, (u_long)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 			FDDI_SMT_EVENT, (u_long) FDDI_REMOTE_T_REQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 			smt_get_event_word(smc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	return st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) void smt_fixup_mib(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) #ifdef	CONCENTRATOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	switch (smc->s.sas) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	case SMT_SAS :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 		smc->mib.fddiSMTNonMaster_Ct = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 		break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	case SMT_DAS :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 		smc->mib.fddiSMTNonMaster_Ct = 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 		break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	case SMT_NAC :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 		smc->mib.fddiSMTNonMaster_Ct = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 		break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	smc->mib.fddiSMTMaster_Ct = NUMPHYS - smc->mib.fddiSMTNonMaster_Ct ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	switch (smc->s.sas) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	case SMT_SAS :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		smc->mib.fddiSMTNonMaster_Ct = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	case SMT_DAS :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		smc->mib.fddiSMTNonMaster_Ct = 2 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		break ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	smc->mib.fddiSMTMaster_Ct = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)  * determine new setting for operational value
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)  * if limit is lower than mib
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)  *	use limit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)  * else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)  *	use mib
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)  * NOTE : numbers are negative, negate comparison !
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static int set_min_max(int maxflag, u_long mib, u_long limit, u_long *oper)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	u_long	old ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	old = *oper ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	if ((limit > mib) ^ maxflag)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 		*oper = limit ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 		*oper = mib ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	return old != *oper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)