^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /******************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C)Copyright 1998,1999 SysKonnect,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * a business unit of Schneider & Koch & Co. Datensysteme GmbH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * See the file "skfddi.c" for further information.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * The information in this file is provided "AS IS" without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ******************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Timer Driver for FBI board (timer chip 82C54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Modifications:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 28-Jun-1994 sw Edit v1.6.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * MCA: Added support for the SK-NET FDDI-FM2 adapter. The
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * following functions have been added(+) or modified(*):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * hwt_start(*), hwt_stop(*), hwt_restart(*), hwt_read(*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "h/types.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include "h/fddi.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include "h/smc.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #ifndef lint
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static const char ID_sccs[] = "@(#)hwt.c 1.13 97/04/23 (C) SK " ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Prototypes of local functions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /* 28-Jun-1994 sw - Note: hwt_restart() is also used in module 'drvfbi.c'. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /*static void hwt_restart() ; */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * hwt_start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * Start hardware timer (clock ticks are 16us).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * void hwt_start(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * struct s_smc *smc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * u_long time) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * time - The time in units of 16us to load the timer with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * Nothing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define HWT_MAX (65000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) void hwt_start(struct s_smc *smc, u_long time)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u_short cnt ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (time > HWT_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) time = HWT_MAX ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) smc->hw.t_start = time ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) smc->hw.t_stop = 0L ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) cnt = (u_short)time ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * if time < 16 us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * time = 16 us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (!cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) cnt++ ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) outpd(ADDR(B2_TI_INI), (u_long) cnt * 200) ; /* Load timer value. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) outpw(ADDR(B2_TI_CRTL), TIM_START) ; /* Start timer. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) smc->hw.timer_activ = TRUE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * hwt_stop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * Stop hardware timer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * void hwt_stop(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * struct s_smc *smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Nothing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) void hwt_stop(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) outpw(ADDR(B2_TI_CRTL), TIM_CL_IRQ) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) smc->hw.timer_activ = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * hwt_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * Initialize hardware timer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * void hwt_init(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * struct s_smc *smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Nothing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) void hwt_init(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) smc->hw.t_start = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) smc->hw.t_stop = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) smc->hw.timer_activ = FALSE ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) hwt_restart(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * hwt_restart
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * Clear timer interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * void hwt_restart(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * struct s_smc *smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * Nothing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void hwt_restart(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) hwt_stop(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * hwt_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * Stop hardware timer and read time elapsed since last start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * u_long hwt_read(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * The elapsed time since last start in units of 16us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) u_long hwt_read(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) u_short tr ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u_long is ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (smc->hw.timer_activ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) hwt_stop(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) tr = (u_short)((inpd(ADDR(B2_TI_VAL))/200) & 0xffff) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) is = GET_ISR() ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* Check if timer expired (or wraparound). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if ((tr > smc->hw.t_start) || (is & IS_TIMINT)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) hwt_restart(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) smc->hw.t_stop = smc->hw.t_start ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) smc->hw.t_stop = smc->hw.t_start - tr ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) return smc->hw.t_stop;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #ifdef PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * hwt_quick_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * Stop hardware timer and read timer value and start the timer again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * u_long hwt_read(smc) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * In
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * smc - A pointer to the SMT Context structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * current timer value in units of 80ns.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) u_long hwt_quick_read(struct s_smc *smc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) u_long interval ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u_long time ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) interval = inpd(ADDR(B2_TI_INI)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) outpw(ADDR(B2_TI_CRTL), TIM_STOP) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) time = inpd(ADDR(B2_TI_VAL)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) outpd(ADDR(B2_TI_INI),time) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) outpw(ADDR(B2_TI_CRTL), TIM_START) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) outpd(ADDR(B2_TI_INI),interval) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) return time;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * hwt_wait_time(smc,start,duration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * This function returnes after the amount of time is elapsed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * since the start time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * para start start time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * duration time to wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * NOTE: The function will return immediately, if the timer is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * started
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) ************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) void hwt_wait_time(struct s_smc *smc, u_long start, long int duration)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) long diff ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) long interval ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) int wrapped ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * check if timer is running
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (smc->hw.timer_activ == FALSE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) hwt_quick_read(smc) == hwt_quick_read(smc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) return ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) interval = inpd(ADDR(B2_TI_INI)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) if (interval > duration) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) diff = (long)(start - hwt_quick_read(smc)) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (diff < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) diff += interval ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) } while (diff <= duration) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) diff = interval ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) wrapped = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (!wrapped) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (hwt_quick_read(smc) >= start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) diff += interval ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) wrapped = 1 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) if (hwt_quick_read(smc) < start) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) wrapped = 0 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) } while (diff <= duration) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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