Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* Synopsys DesignWare Core Enterprise Ethernet (XLGMAC) Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (c) 2017 Synopsys, Inc. (www.synopsys.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * This program is dual-licensed; you may select either version 2 of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * the GNU General Public License ("GPL") or BSD license ("BSD").
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * This Synopsys DWC XLGMAC software driver and associated documentation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * (hereinafter the "Software") is an unsupported proprietary work of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Synopsys, Inc. unless otherwise expressly agreed to in writing between
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Synopsys and you. The Software IS NOT an item of Licensed Software or a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * Licensed Product under any End User Software License Agreement or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * Agreement for Licensed Products with Synopsys or any supplement thereto.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * Synopsys is a registered trademark of Synopsys, Inc. Other names included
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * in the SOFTWARE may be the trademarks of their respective owners.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "dwc-xlgmac.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "dwc-xlgmac-reg.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static int xlgmac_probe(struct pci_dev *pcidev, const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	struct device *dev = &pcidev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	struct xlgmac_resources res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 	int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	ret = pcim_enable_device(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	if (ret) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		dev_err(dev, "ERROR: failed to enable device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	for (i = 0; i < PCI_STD_NUM_BARS; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 		if (pci_resource_len(pcidev, i) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 		ret = pcim_iomap_regions(pcidev, BIT(i), XLGMAC_DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 			return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	pci_set_master(pcidev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	memset(&res, 0, sizeof(res));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	res.irq = pcidev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	res.addr = pcim_iomap_table(pcidev)[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	return xlgmac_drv_probe(&pcidev->dev, &res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static void xlgmac_remove(struct pci_dev *pcidev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	xlgmac_drv_remove(&pcidev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static const struct pci_device_id xlgmac_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	{ PCI_DEVICE(PCI_VENDOR_ID_SYNOPSYS, 0x7302) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	{ 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MODULE_DEVICE_TABLE(pci, xlgmac_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static struct pci_driver xlgmac_pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	.name		= XLGMAC_DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	.id_table	= xlgmac_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	.probe		= xlgmac_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	.remove		= xlgmac_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) module_pci_driver(xlgmac_pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MODULE_DESCRIPTION(XLGMAC_DRV_DESC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MODULE_VERSION(XLGMAC_DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MODULE_AUTHOR("Jie Deng <jiedeng@synopsys.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MODULE_LICENSE("Dual BSD/GPL");