^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) . smc9194.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) . This is a driver for SMC's 9000 series of Ethernet cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) . Copyright (C) 1996 by Erik Stahlman
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) . This software may be used and distributed according to the terms
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) . of the GNU General Public License, incorporated herein by reference.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) . "Features" of the SMC chip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) . 4608 byte packet memory. ( for the 91C92. Others have more )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) . EEPROM for configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) . AUI/TP selection ( mine has 10Base2/10BaseT select )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) . Arguments:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) . io = for the base address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) . irq = for the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) . ifport = 0 for autodetect, 1 for TP, 2 for AUI ( or 10base2 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) . author:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) . Erik Stahlman ( erik@vt.edu )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) . contributors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) . Arnaldo Carvalho de Melo <acme@conectiva.com.br>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) . Hardware multicast code from Peter Cammaert ( pc@denkart.be )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) . Sources:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) . o SMC databook
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) . o skeleton.c by Donald Becker ( becker@scyld.com )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) . o ( a LOT of advice from Becker as well )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) . History:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) . 12/07/95 Erik Stahlman written, got receive/xmit handled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) . 01/03/96 Erik Stahlman worked out some bugs, actually usable!!! :-)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) . 01/06/96 Erik Stahlman cleaned up some, better testing, etc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) . 01/29/96 Erik Stahlman fixed autoirq, added multicast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) . 02/01/96 Erik Stahlman 1. disabled all interrupts in smc_reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) . 2. got rid of post-decrementing bug -- UGH.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) . 02/13/96 Erik Stahlman Tried to fix autoirq failure. Added more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) . descriptive error messages.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) . 02/15/96 Erik Stahlman Fixed typo that caused detection failure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) . 02/23/96 Erik Stahlman Modified it to fit into kernel tree
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) . Added support to change hardware address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) . Cleared stats on opens
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) . 02/26/96 Erik Stahlman Trial support for Kernel 1.2.13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) . Kludge for automatic IRQ detection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) . 03/04/96 Erik Stahlman Fixed kernel 1.3.70 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) . Fixed bug reported by Gardner Buchanan in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) . smc_enable, with outw instead of outb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) . 03/06/96 Erik Stahlman Added hardware multicast from Peter Cammaert
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) . 04/14/00 Heiko Pruessing (SMA Regelsysteme) Fixed bug in chip memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) . allocation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) . 08/20/00 Arnaldo Melo fix kfree(skb) in smc_hardware_send_packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) . 12/15/00 Christian Jullien fix "Warning: kfree_skb on hard IRQ"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) . 11/08/01 Matt Domsch Use common crc32 function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) ----------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) static const char version[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) "smc9194.c:v0.14 12/15/00 by Erik Stahlman (erik@vt.edu)";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #include "smc9194.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define DRV_NAME "smc9194"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /*------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) . Configuration options, for the experienced user to change.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) -------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) . Do you want to use 32 bit xfers? This should work on all chips, as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) . the chipset is designed to accommodate them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #ifdef __sh__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #undef USE_32_BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define USE_32_BIT 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .the SMC9194 can be at any of the following port addresses. To change,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .for a slightly different card, you can add it to the array. Keep in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .mind that the array must end in zero.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) struct devlist {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned int port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static struct devlist smc_devlist[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {.port = 0x200, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {.port = 0x220, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {.port = 0x240, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) {.port = 0x260, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) {.port = 0x280, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {.port = 0x2A0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {.port = 0x2C0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {.port = 0x2E0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {.port = 0x300, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) {.port = 0x320, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {.port = 0x340, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {.port = 0x360, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {.port = 0x380, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {.port = 0x3A0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {.port = 0x3C0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) {.port = 0x3E0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) {.port = 0, .irq = 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) . Wait time for memory to be free. This probably shouldn't be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) . tuned that much, as waiting for this means nothing else happens
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) . in the system
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define MEMORY_WAIT_TIME 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) . DEBUGGING LEVELS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) . 0 for normal operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) . 1 for slightly more details
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) . >2 for various levels of increasingly useless information
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) . 2 for interrupt tracking, status flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) . 3 for packet dumps, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define SMC_DEBUG 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #if (SMC_DEBUG > 2 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define PRINTK3(x) printk x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define PRINTK3(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #if SMC_DEBUG > 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define PRINTK2(x) printk x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define PRINTK2(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #ifdef SMC_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define PRINTK(x) printk x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define PRINTK(x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) . The internal workings of the driver. If you are changing anything
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) . here with the SMC stuff, you should have the datasheet and known
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) . what you are doing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) -------------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define CARDNAME "SMC9194"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /* store this information for the driver.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct smc_local {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) If I have to wait until memory is available to send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) a packet, I will store the skbuff here, until I get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) desired memory. Then, I'll send it out and free it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) struct sk_buff * saved_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) . This keeps track of how many packets that I have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) . sent out. When an TX_EMPTY interrupt comes, I know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) . that all of these have been sent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) int packets_waiting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /*-----------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) . The driver can be entered at any of the following entry points.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) .------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) . This is called by register_netdev(). It is responsible for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) . checking the portlist for the SMC9000 series chipset. If it finds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) . one, then it will initialize the device, find the hardware information,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) . and sets up the appropriate device parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) . NOTE: Interrupts are *OFF* when this procedure is called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) . NB:This shouldn't be static since it is referred to externally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) struct net_device *smc_init(int unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) . The kernel calls this function when someone wants to use the device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) . typically 'ifconfig ethX up'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) static int smc_open(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) . Our watchdog timed out. Called by the networking layer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) static void smc_timeout(struct net_device *dev, unsigned int txqueue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) . This is called by the kernel in response to 'ifconfig ethX down'. It
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) . is responsible for cleaning up everything that the open routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) . does, and maybe putting the card into a powerdown state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) static int smc_close(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) . Finally, a call to set promiscuous mode ( for TCPDUMP and related
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) . programs ) and multicast modes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static void smc_set_multicast_list(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /*---------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) . Interrupt level calls..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ----------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) . Handles the actual interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static irqreturn_t smc_interrupt(int irq, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) . This is a separate procedure to handle the receipt of a packet, to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) . leave the interrupt code looking slightly cleaner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static inline void smc_rcv( struct net_device *dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) . This handles a TX interrupt, which is only called when an error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) . relating to a packet is sent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) static inline void smc_tx( struct net_device * dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) . Internal routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) . Test if a given location contains a chip, trying to cause as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) . little damage as possible if it's not a SMC chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) static int smc_probe(struct net_device *dev, int ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) . A rather simple routine to print out a packet for debugging purposes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) #if SMC_DEBUG > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) static void print_packet( byte *, int );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) #define tx_done(dev) 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) /* this is called to actually send the packet to the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) static void smc_hardware_send_packet( struct net_device * dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) /* Since I am not sure if I will have enough room in the chip's ram
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) . to store the packet, I call this routine, which either sends it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) . now, or generates an interrupt when the card is ready for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) . packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) static netdev_tx_t smc_wait_to_send_packet( struct sk_buff * skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct net_device *dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* this does a soft reset on the device */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static void smc_reset( int ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* Enable Interrupts, Receive, and Transmit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static void smc_enable( int ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* this puts the device in an inactive state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void smc_shutdown( int ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* This routine will find the IRQ of the driver if one is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) . specified in the input to the device. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static int smc_findirq( int ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) . Function: smc_reset( int ioaddr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) . Purpose:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) . This sets the SMC91xx chip to its normal state, hopefully from whatever
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) . mess that any other DOS driver has put it in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) . Maybe I should reset more registers to defaults in here? SOFTRESET should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) . do that for me.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) . Method:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) . 1. send a SOFT RESET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) . 2. wait for it to finish
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) . 3. enable autorelease mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) . 4. reset the memory management unit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) . 5. clear all interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) static void smc_reset( int ioaddr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) /* This resets the registers mostly to defaults, but doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) affect EEPROM. That seems unnecessary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) outw( RCR_SOFTRESET, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* this should pause enough for the chip to be happy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SMC_DELAY( );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* Set the transmit and receive configuration registers to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) default values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) outw( RCR_CLEAR, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) outw( TCR_CLEAR, ioaddr + TCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) /* set the control register to automatically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) release successfully transmitted packets, to make the best
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) use out of our limited memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) SMC_SELECT_BANK( 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) /* Reset the MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) outw( MC_RESET, ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) /* Note: It doesn't seem that waiting for the MMU busy is needed here,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) but this is a place where future chipsets _COULD_ break. Be wary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) of issuing another MMU command right after this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) outb( 0, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) . Function: smc_enable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) . Purpose: let the chip talk to the outside work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) . Method:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) . 1. Enable the transmitter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) . 2. Enable the receiver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) . 3. Enable interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) static void smc_enable( int ioaddr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* see the header file for options in TCR/RCR NORMAL*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) outw( TCR_NORMAL, ioaddr + TCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) outw( RCR_NORMAL, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* now, enable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) outb( SMC_INTERRUPT_MASK, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) . Function: smc_shutdown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) . Purpose: closes down the SMC91xxx chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) . Method:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) . 1. zero the interrupt mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) . 2. clear the enable receive flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) . 3. clear the enable xmit flags
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) . TODO:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) . (1) maybe utilize power down mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) . Why not yet? Because while the chip will go into power down mode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) . the manual says that it will wake up in response to any I/O requests
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) . in the register space. Empirical results do not show this working.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) static void smc_shutdown( int ioaddr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) /* no more interrupts for me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) outb( 0, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* and tell the card to stay away from that nasty outside world */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) outb( RCR_CLEAR, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) outb( TCR_CLEAR, ioaddr + TCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* finally, shut the chip down */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) SMC_SELECT_BANK( 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) outw( inw( ioaddr + CONTROL ), CTL_POWERDOWN, ioaddr + CONTROL );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) . Function: smc_setmulticast( int ioaddr, struct net_device *dev )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) . Purpose:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) . This sets the internal hardware table to filter out unwanted multicast
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) . packets before they take up memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) . The SMC chip uses a hash table where the high 6 bits of the CRC of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) . address are the offset into the table. If that bit is 1, then the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) . multicast packet is accepted. Otherwise, it's dropped silently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) . To use the 6 bits as an offset into the table, the high 3 bits are the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) . number of the 8 bit register, while the low 3 bits are the bit within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) . that register.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) . This routine is based very heavily on the one provided by Peter Cammaert.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) static void smc_setmulticast(int ioaddr, struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) unsigned char multicast_table[ 8 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) struct netdev_hw_addr *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) /* table for flipping the order of 3 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) unsigned char invert3[] = { 0, 4, 2, 6, 1, 5, 3, 7 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* start with a table of all zeros: reject all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) memset( multicast_table, 0, sizeof( multicast_table ) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) netdev_for_each_mc_addr(ha, dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) int position;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* only use the low order bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) position = ether_crc_le(6, ha->addr) & 0x3f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* do some messy swapping to put the bit in the right spot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) multicast_table[invert3[position&7]] |=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) (1<<invert3[(position>>3)&7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /* now, the table can be loaded into the chipset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) SMC_SELECT_BANK( 3 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) for ( i = 0; i < 8 ; i++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) outb( multicast_table[i], ioaddr + MULTICAST1 + i );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) . Function: smc_wait_to_send_packet( struct sk_buff * skb, struct net_device * )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) . Purpose:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) . Attempt to allocate memory for a packet, if chip-memory is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) . available, then tell the card to generate an interrupt when it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) . is available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) . Algorithm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) . o if the saved_skb is not currently null, then drop this packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) . on the floor. This should never happen, because of TBUSY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) . o if the saved_skb is null, then replace it with the current packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) . o See if I can sending it now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) . o (NO): Enable interrupts and let the interrupt handler deal with it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) . o (YES):Send it now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) static netdev_tx_t smc_wait_to_send_packet(struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) struct smc_local *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) unsigned int ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) word length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) unsigned short numPages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) word time_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) /* Well, I want to send the packet.. but I don't know
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if I can send it right now... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if ( lp->saved_skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* THIS SHOULD NEVER HAPPEN. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) dev->stats.tx_aborted_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) printk(CARDNAME": Bad Craziness - sent packet while busy.\n" );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) return NETDEV_TX_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) lp->saved_skb = skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) length = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) if (length < ETH_ZLEN) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (skb_padto(skb, ETH_ZLEN)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) length = ETH_ZLEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) ** The MMU wants the number of pages to be the number of 256 bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) ** 'pages', minus 1 ( since a packet can't ever have 0 pages :) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) ** Pkt size for allocating is data length +6 (for additional status words,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) ** length and ctl!) If odd size last byte is included in this header.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) numPages = ((length & 0xfffe) + 6) / 256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (numPages > 7 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) printk(CARDNAME": Far too big packet error.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* freeing the packet is a good thing here... but should
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) . any packets of this size get down here? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev_kfree_skb (skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) lp->saved_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* this IS an error, but, i don't want the skb saved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* either way, a packet is waiting now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) lp->packets_waiting++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) /* now, try to allocate the memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) outw( MC_ALLOC | numPages, ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) . Performance Hack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) . wait a short amount of time.. if I can send a packet now, I send
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) . it now. Otherwise, I enable an interrupt and wait for one to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) . available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) . I could have handled this a slightly different way, by checking to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) . see if any memory was available in the FREE MEMORY register. However,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) . either way, I need to generate an allocation, and the allocation works
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) . no matter what, so I saw no point in checking free memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) time_out = MEMORY_WAIT_TIME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) word status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) status = inb( ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if ( status & IM_ALLOC_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* acknowledge the interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) outb( IM_ALLOC_INT, ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) } while ( -- time_out );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if ( !time_out ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) /* oh well, wait until the chip finds memory later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) SMC_ENABLE_INT( IM_ALLOC_INT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) PRINTK2((CARDNAME": memory allocation deferred.\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* it's deferred, but I'll handle it later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) /* or YES! I can send the packet now.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) smc_hardware_send_packet(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) . Function: smc_hardware_send_packet(struct net_device * )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) . Purpose:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) . This sends the actual packet to the SMC9xxx chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) . Algorithm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) . First, see if a saved_skb is available.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) . ( this should NOT be called if there is no 'saved_skb'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) . Now, find the packet number that the chip allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) . Point the data pointers at it in memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) . Set the length word in the chip's memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) . Dump the packet to chip memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) . Check if a last byte is needed ( odd length packet )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) . if so, set the control flag right
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) . Tell the card to send it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) . Enable the transmit interrupt, so I know if it failed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) . Free the kernel data if I actually sent it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) static void smc_hardware_send_packet( struct net_device * dev )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) struct smc_local *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) byte packet_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) struct sk_buff * skb = lp->saved_skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) word length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) unsigned int ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) byte * buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) if ( !skb ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) PRINTK((CARDNAME": In XMIT with no packet to send\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) buf = skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /* If I get here, I _know_ there is a packet slot waiting for me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) packet_no = inb( ioaddr + PNR_ARR + 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if ( packet_no & 0x80 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* or isn't there? BAD CHIP! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) netdev_dbg(dev, CARDNAME": Memory allocation failed.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) dev_kfree_skb_any(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) lp->saved_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) /* we have a packet address, so tell the card to use it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) outb( packet_no, ioaddr + PNR_ARR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* point to the beginning of the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) outw( PTR_AUTOINC , ioaddr + POINTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) PRINTK3((CARDNAME": Trying to xmit packet of length %x\n", length));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) #if SMC_DEBUG > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) print_packet( buf, length );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* send the packet length ( +6 for status, length and ctl byte )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) and the status word ( set to zeros ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) #ifdef USE_32_BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) outl( (length +6 ) << 16 , ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) outw( 0, ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) /* send the packet length ( +6 for status words, length, and ctl*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) outb( (length+6) & 0xFF,ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) outb( (length+6) >> 8 , ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* send the actual data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) . I _think_ it's faster to send the longs first, and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) . mop up by sending the last word. It depends heavily
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) . on alignment, at least on the 486. Maybe it would be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) . a good idea to check which is optimal? But that could take
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) . almost as much time as is saved?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) #ifdef USE_32_BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if ( length & 0x2 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) outsl(ioaddr + DATA_1, buf, length >> 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) outw( *((word *)(buf + (length & 0xFFFFFFFC))),ioaddr +DATA_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) outsl(ioaddr + DATA_1, buf, length >> 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) outsw(ioaddr + DATA_1 , buf, (length ) >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) /* Send the last byte, if there is one. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) if ( (length & 1) == 0 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) outw( 0, ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) outb( buf[length -1 ], ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) outb( 0x20, ioaddr + DATA_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) /* enable the interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) SMC_ENABLE_INT( (IM_TX_INT | IM_TX_EMPTY_INT) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* and let the chipset deal with it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) outw( MC_ENQUEUE , ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) PRINTK2((CARDNAME": Sent packet of length %d\n", length));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) lp->saved_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev_kfree_skb_any (skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) netif_trans_update(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* we can send another packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) /*-------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) | smc_init(int unit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) | Input parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) | dev->base_addr == 0, try to find all possible locations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) | dev->base_addr == 1, return failure code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) | dev->base_addr == 2, always allocate space, and return success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) | dev->base_addr == <anything else> this is the address to check
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) | Output:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) | pointer to net_device or ERR_PTR(error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) ---------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) static int io;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) static int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static int ifport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) struct net_device * __init smc_init(int unit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) struct net_device *dev = alloc_etherdev(sizeof(struct smc_local));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct devlist *smcdev = smc_devlist;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return ERR_PTR(-ENODEV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) if (unit >= 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) sprintf(dev->name, "eth%d", unit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) netdev_boot_setup_check(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) io = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) irq = dev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) if (io > 0x1ff) { /* Check a single specified location. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) err = smc_probe(dev, io);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) } else if (io != 0) { /* Don't probe at all. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) err = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) for (;smcdev->port; smcdev++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) if (smc_probe(dev, smcdev->port) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (!smcdev->port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) err = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) goto out1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) return dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) out1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) release_region(dev->base_addr, SMC_IO_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) return ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) /*----------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) . smc_findirq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) . This routine has a simple purpose -- make the SMC chip generate an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) . interrupt, so an auto-detect routine can detect it, and find the IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static int __init smc_findirq(int ioaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) #ifndef NO_AUTOPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) int timeout = 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) unsigned long cookie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) cookie = probe_irq_on();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) * What I try to do here is trigger an ALLOC_INT. This is done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * by allocating a small chunk of memory, which will give an interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * when done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) SMC_SELECT_BANK(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) /* enable ALLOCation interrupts ONLY */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) outb( IM_ALLOC_INT, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) . Allocate 512 bytes of memory. Note that the chip was just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) . reset so all the memory is available
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) outw( MC_ALLOC | 1, ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) . Wait until positive that the interrupt has been generated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) while ( timeout ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) byte int_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) int_status = inb( ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) if ( int_status & IM_ALLOC_INT )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) break; /* got the interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) timeout--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) /* there is really nothing that I can do here if timeout fails,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) as probe_irq_off will return a 0 anyway, which is what I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) want in this case. Plus, the clean up is needed in both
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) cases. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /* DELAY HERE!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) On a fast machine, the status might change before the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) is given to the processor. This means that the interrupt was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) never detected, and probe_irq_off fails to report anything.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) This should fix probe_irq_* problems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) SMC_DELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) SMC_DELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) /* and disable all interrupts again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) outb( 0, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) /* and return what I found */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) return probe_irq_off(cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) #else /* NO_AUTOPROBE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) struct devlist *smcdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) for (smcdev = smc_devlist; smcdev->port; smcdev++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) if (smcdev->port == ioaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) return smcdev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) static const struct net_device_ops smc_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .ndo_open = smc_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .ndo_stop = smc_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .ndo_start_xmit = smc_wait_to_send_packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .ndo_tx_timeout = smc_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) .ndo_set_rx_mode = smc_set_multicast_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) /*----------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) . Function: smc_probe( int ioaddr )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) . Purpose:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) . Tests to see if a given ioaddr points to an SMC9xxx chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) . Returns a 0 on success
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) . Algorithm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) . (1) see if the high byte of BANK_SELECT is 0x33
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) . (2) compare the ioaddr with the base register's address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) . (3) see if I recognize the chip ID in the appropriate register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) .---------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /*---------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) . Here I do typical initialization tasks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) . o Initialize the structure if needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) . o print out my vanity message if not done so already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) . o print out what type of hardware is detected
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) . o print out the ethernet address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) . o find the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) . o set up my private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) . o configure the dev structure with my subroutines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) . o actually GRAB the irq.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) . o GRAB the region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .-----------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) static int __init smc_probe(struct net_device *dev, int ioaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) int i, memory, retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) unsigned int bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) const char *version_string;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) const char *if_string;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) /* registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) word revision_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) word base_address_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) word configuration_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) word memory_info_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) word memory_cfg_register;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /* Grab the region so that no one else tries to probe our ioports. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) if (!request_region(ioaddr, SMC_IO_EXTENT, DRV_NAME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) dev->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) dev->if_port = ifport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) /* First, see if the high byte is 0x33 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) bank = inw( ioaddr + BANK_SELECT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) if ( (bank & 0xFF00) != 0x3300 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) /* The above MIGHT indicate a device, but I need to write to further
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) test this. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) outw( 0x0, ioaddr + BANK_SELECT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) bank = inw( ioaddr + BANK_SELECT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) if ( (bank & 0xFF00 ) != 0x3300 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) /* well, we've already written once, so hopefully another time won't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) hurt. This time, I need to switch the bank register to bank 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) so I can access the base address register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) SMC_SELECT_BANK(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) base_address_register = inw( ioaddr + BASE );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if ( ioaddr != ( base_address_register >> 3 & 0x3E0 ) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) printk(CARDNAME ": IOADDR %x doesn't match configuration (%x). "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) "Probably not a SMC chip\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) ioaddr, base_address_register >> 3 & 0x3E0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) /* well, the base address register didn't match. Must not have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) been a SMC chip after all. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) /* check if the revision register is something that I recognize.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) These might need to be added to later, as future revisions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) could be added. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) SMC_SELECT_BANK(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) revision_register = inw( ioaddr + REVISION );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) if ( !chip_ids[ ( revision_register >> 4 ) & 0xF ] ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) /* I don't recognize this chip, so... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) printk(CARDNAME ": IO %x: Unrecognized revision register:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) " %x, Contact author.\n", ioaddr, revision_register);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) /* at this point I'll assume that the chip is an SMC9xxx.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) It might be prudent to check a listing of MAC addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) against the hardware address, or do some other tests. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) pr_info_once("%s\n", version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) /* fill in some of the fields */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) dev->base_addr = ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) . Get the MAC address ( bank 1, regs 4 - 9 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) SMC_SELECT_BANK( 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) for ( i = 0; i < 6; i += 2 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) word address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) address = inw( ioaddr + ADDR0 + i );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) dev->dev_addr[ i + 1] = address >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) dev->dev_addr[ i ] = address & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) /* get the memory information */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) memory_info_register = inw( ioaddr + MIR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) memory_cfg_register = inw( ioaddr + MCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) memory = ( memory_cfg_register >> 9 ) & 0x7; /* multiplier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) memory *= 256 * ( memory_info_register & 0xFF );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) Now, I want to find out more about the chip. This is sort of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) redundant, but it's cleaner to have it in both, rather than having
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) one VERY long probe procedure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) SMC_SELECT_BANK(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) revision_register = inw( ioaddr + REVISION );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) version_string = chip_ids[ ( revision_register >> 4 ) & 0xF ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) if ( !version_string ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /* I shouldn't get here because this call was done before.... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) /* is it using AUI or 10BaseT ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) if ( dev->if_port == 0 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) SMC_SELECT_BANK(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) configuration_register = inw( ioaddr + CONFIG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if ( configuration_register & CFG_AUI_SELECT )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) dev->if_port = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) dev->if_port = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) if_string = interfaces[ dev->if_port - 1 ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* now, reset the chip, and put it into a known state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) smc_reset( ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) . If dev->irq is 0, then the device has to be banged on to see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) . what the IRQ is.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) . This banging doesn't always detect the IRQ, for unknown reasons.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) . a workaround is to reset the chip and try again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) . Interestingly, the DOS packet driver *SETS* the IRQ on the card to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) . be what is requested on the command line. I don't do that, mostly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) . because the card that I have uses a non-standard method of accessing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) . the IRQs, and because this _should_ work in most configurations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) . Specifying an IRQ is done with the assumption that the user knows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) . what (s)he is doing. No checking is done!!!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) if ( dev->irq < 2 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) int trials;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) trials = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) while ( trials-- ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) dev->irq = smc_findirq( ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) if ( dev->irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) /* kick the card and try again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) smc_reset( ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) if (dev->irq == 0 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) printk(CARDNAME": Couldn't autodetect your IRQ. Use irq=xx.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) retval = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) /* now, print out the card info, in a short format.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) netdev_info(dev, "%s(r:%d) at %#3x IRQ:%d INTF:%s MEM:%db ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) version_string, revision_register & 0xF, ioaddr, dev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) if_string, memory);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) . Print the Ethernet address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) netdev_info(dev, "ADDR: %pM\n", dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) /* Grab the IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) retval = request_irq(dev->irq, smc_interrupt, 0, DRV_NAME, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) netdev_warn(dev, "%s: unable to get IRQ %d (irqval=%d).\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) DRV_NAME, dev->irq, retval);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) dev->netdev_ops = &smc_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) dev->watchdog_timeo = HZ/20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) release_region(ioaddr, SMC_IO_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) #if SMC_DEBUG > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) static void print_packet( byte * buf, int length )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) print_hex_dump_debug(DRV_NAME, DUMP_PREFIX_OFFSET, 16, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) buf, length, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) * Open and Initialize the board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * Set up everything, reset the card, etc ..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) static int smc_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) int ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) int i; /* used to set hw ethernet address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) /* clear out all the junk that was put here before... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) memset(netdev_priv(dev), 0, sizeof(struct smc_local));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) /* reset the hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) smc_reset( ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) smc_enable( ioaddr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) /* Select which interface to use */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) SMC_SELECT_BANK( 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) if ( dev->if_port == 1 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) outw( inw( ioaddr + CONFIG ) & ~CFG_AUI_SELECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) ioaddr + CONFIG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) else if ( dev->if_port == 2 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) outw( inw( ioaddr + CONFIG ) | CFG_AUI_SELECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) ioaddr + CONFIG );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) According to Becker, I have to set the hardware address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) at this point, because the (l)user can set it with an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) ioctl. Easily done...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) SMC_SELECT_BANK( 1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) for ( i = 0; i < 6; i += 2 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) word address;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) address = dev->dev_addr[ i + 1 ] << 8 ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) address |= dev->dev_addr[ i ];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) outw( address, ioaddr + ADDR0 + i );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) /*--------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) . Called by the kernel to send a packet out into the void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) . of the net. This routine is largely based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) . skeleton.c, from Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) .--------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) static void smc_timeout(struct net_device *dev, unsigned int txqueue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) /* If we get here, some higher level has decided we are broken.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) There should really be a "kick me" function call instead. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) netdev_warn(dev, CARDNAME": transmit timed out, %s?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) tx_done(dev) ? "IRQ conflict" : "network cable problem");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) /* "kick" the adaptor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) smc_reset( dev->base_addr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) smc_enable( dev->base_addr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) netif_trans_update(dev); /* prevent tx timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) /* clear anything saved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108) ((struct smc_local *)netdev_priv(dev))->saved_skb = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) /*-------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) . smc_rcv - receive a packet from the card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) . There is ( at least ) a packet waiting to be read from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) . chip-memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) . o Read the status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) . o If an error, record it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) . o otherwise, read in the packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) --------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) static void smc_rcv(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) int ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) int packet_number;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) word status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) word packet_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) /* assume bank 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) packet_number = inw( ioaddr + FIFO_PORTS );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) if ( packet_number & FP_RXEMPTY ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) /* we got called , but nothing was on the FIFO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) PRINTK((CARDNAME ": WARNING: smc_rcv with nothing on FIFO.\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) /* don't need to restore anything */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) /* start reading from the start of the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) outw( PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) /* First two words are status and packet_length */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) status = inw( ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) packet_length = inw( ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) packet_length &= 0x07ff; /* mask off top bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) PRINTK2(("RCV: STATUS %4x LENGTH %4x\n", status, packet_length ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) . the packet length contains 3 extra words :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) . status, length, and an extra word with an odd byte .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) packet_length -= 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) if ( !(status & RS_ERRORS ) ){
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) /* do stuff to make a new packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160) struct sk_buff * skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) byte * data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) /* read one extra byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) if ( status & RS_ODDFRAME )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) packet_length++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) /* set multicast stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) if ( status & RS_MULTICAST )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) dev->stats.multicast++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) skb = netdev_alloc_skb(dev, packet_length + 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) if ( skb == NULL ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) dev->stats.rx_dropped++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) ! This should work without alignment, but it could be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) ! in the worse case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) skb_reserve( skb, 2 ); /* 16 bit alignment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) data = skb_put( skb, packet_length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) #ifdef USE_32_BIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) /* QUESTION: Like in the TX routine, do I want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) to send the DWORDs or the bytes first, or some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189) mixture. A mixture might improve already slow PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) performance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) PRINTK3((" Reading %d dwords (and %d bytes)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) packet_length >> 2, packet_length & 3 ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) insl(ioaddr + DATA_1 , data, packet_length >> 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) /* read the left over bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) insb( ioaddr + DATA_1, data + (packet_length & 0xFFFFFC),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) packet_length & 0x3 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) PRINTK3((" Reading %d words and %d byte(s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) (packet_length >> 1 ), packet_length & 1 ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) insw(ioaddr + DATA_1 , data, packet_length >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) if ( packet_length & 1 ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) data += packet_length & ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) *(data++) = inb( ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) #if SMC_DEBUG > 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) print_packet( data, packet_length );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) skb->protocol = eth_type_trans(skb, dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) netif_rx(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212) dev->stats.rx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) dev->stats.rx_bytes += packet_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) /* error ... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) dev->stats.rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218) if ( status & RS_ALGNERR ) dev->stats.rx_frame_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) if ( status & (RS_TOOSHORT | RS_TOOLONG ) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) dev->stats.rx_length_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) if ( status & RS_BADCRC) dev->stats.rx_crc_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) /* error or good, tell the card to get rid of this packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) outw( MC_RELEASE, ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230) /*************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) . smc_tx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) . Purpose: Handle a transmit error message. This will only be called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) . when an error, because of the AUTO_RELEASE mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236) . Algorithm:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) . Save pointer and packet no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) . Get the packet no from the top of the queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239) . check if it's valid ( if not, is this an error??? )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) . read the status word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) . record the error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242) . ( resend? Not really, since we don't want old packets around )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) . Restore saved values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) ************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245) static void smc_tx( struct net_device * dev )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) int ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) struct smc_local *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249) byte saved_packet;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) byte packet_no;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251) word tx_status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254) /* assume bank 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) saved_packet = inb( ioaddr + PNR_ARR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) packet_no = inw( ioaddr + FIFO_PORTS );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) packet_no &= 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) /* select this as the packet to read from */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) outb( packet_no, ioaddr + PNR_ARR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) /* read the first word from this packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) outw( PTR_AUTOINC | PTR_READ, ioaddr + POINTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) tx_status = inw( ioaddr + DATA_1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) PRINTK3((CARDNAME": TX DONE STATUS: %4x\n", tx_status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269) dev->stats.tx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) if ( tx_status & TS_LOSTCAR ) dev->stats.tx_carrier_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271) if ( tx_status & TS_LATCOL ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) netdev_dbg(dev, CARDNAME": Late collision occurred on last xmit.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) dev->stats.tx_window_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) if ( tx_status & TS_16COL ) { ... }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) if ( tx_status & TS_SUCCESS ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) netdev_info(dev, CARDNAME": Successful packet caused interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) /* re-enable transmit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284) outw( inw( ioaddr + TCR ) | TCR_ENABLE, ioaddr + TCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) /* kill the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) outw( MC_FREEPKT, ioaddr + MMU_CMD );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) /* one less packet waiting for me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) lp->packets_waiting--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) outb( saved_packet, ioaddr + PNR_ARR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296) /*--------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298) . This is the main routine of the driver, to handle the device when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) . it needs some attention.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) . So:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302) . first, save state of the chipset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) . branch off into routines to handle each case, and acknowledge
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) . each to the interrupt register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) . and finally restore state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) ---------------------------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) static irqreturn_t smc_interrupt(int irq, void * dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) struct net_device *dev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) int ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) struct smc_local *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) byte status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) word card_stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) byte mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) int timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) /* state registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) word saved_bank;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) word saved_pointer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) int handled = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) PRINTK3((CARDNAME": SMC interrupt started\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) saved_bank = inw( ioaddr + BANK_SELECT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) SMC_SELECT_BANK(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) saved_pointer = inw( ioaddr + POINTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) mask = inb( ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) /* clear all interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) outb( 0, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) /* set a timeout value, so I don't stay here forever */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) timeout = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) PRINTK2((KERN_WARNING CARDNAME ": MASK IS %x\n", mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) /* read the status flag, and mask it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) status = inb( ioaddr + INTERRUPT ) & mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) if (!status )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) handled = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) PRINTK3((KERN_WARNING CARDNAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) ": Handling interrupt status %x\n", status));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) if (status & IM_RCV_INT) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) /* Got a packet(s). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) PRINTK2((KERN_WARNING CARDNAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) ": Receive Interrupt\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) smc_rcv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) } else if (status & IM_TX_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) PRINTK2((KERN_WARNING CARDNAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) ": TX ERROR handled\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) smc_tx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) outb(IM_TX_INT, ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) } else if (status & IM_TX_EMPTY_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) /* update stats */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364) SMC_SELECT_BANK( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) card_stats = inw( ioaddr + COUNTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366) /* single collisions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) dev->stats.collisions += card_stats & 0xF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368) card_stats >>= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) /* multiple collisions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) dev->stats.collisions += card_stats & 0xF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) /* these are for when linux supports these statistics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) PRINTK2((KERN_WARNING CARDNAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376) ": TX_BUFFER_EMPTY handled\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) outb( IM_TX_EMPTY_INT, ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) mask &= ~IM_TX_EMPTY_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) dev->stats.tx_packets += lp->packets_waiting;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) lp->packets_waiting = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) } else if (status & IM_ALLOC_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383) PRINTK2((KERN_DEBUG CARDNAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) ": Allocation interrupt\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) /* clear this interrupt so it doesn't happen again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) mask &= ~IM_ALLOC_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) smc_hardware_send_packet( dev );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390) /* enable xmit interrupts based on this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) mask |= ( IM_TX_EMPTY_INT | IM_TX_INT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) /* and let the card send more packets to me */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) PRINTK2((CARDNAME": Handoff done successfully.\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) } else if (status & IM_RX_OVRN_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) dev->stats.rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) dev->stats.rx_fifo_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) outb( IM_RX_OVRN_INT, ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) } else if (status & IM_EPH_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) PRINTK((CARDNAME ": UNSUPPORTED: EPH INTERRUPT\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) } else if (status & IM_ERCV_INT ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) PRINTK((CARDNAME ": UNSUPPORTED: ERCV INTERRUPT\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) outb( IM_ERCV_INT, ioaddr + INTERRUPT );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) } while ( timeout -- );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) /* restore state register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) SMC_SELECT_BANK( 2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) outb( mask, ioaddr + INT_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) PRINTK3((KERN_WARNING CARDNAME ": MASK is now %x\n", mask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) outw( saved_pointer, ioaddr + POINTER );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) SMC_SELECT_BANK( saved_bank );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) PRINTK3((CARDNAME ": Interrupt done\n"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420) return IRQ_RETVAL(handled);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) /*----------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) . smc_close
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) . this makes the board clean up everything that it can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428) . and not talk to the outside world. Caused by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) . an 'ifconfig ethX down'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431) -----------------------------------------------------*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) static int smc_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) /* clear everything */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436) smc_shutdown( dev->base_addr );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) /* Update the statistics here. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) /*-----------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) . smc_set_multicast_list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) . This routine will, depending on the values passed to it,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446) . either make it accept multicast packets, go into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) . promiscuous mode ( for TCPDUMP and cousins ) or accept
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) . a select set of multicast packets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) static void smc_set_multicast_list(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) short ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) SMC_SELECT_BANK(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455) if ( dev->flags & IFF_PROMISC )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) outw( inw(ioaddr + RCR ) | RCR_PROMISC, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) /* BUG? I never disable promiscuous mode if multicasting was turned on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) Now, I turn off promiscuous mode, but I don't do anything to multicasting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) when promiscuous mode is turned on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463) /* Here, I am setting this to accept all multicast packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) I don't need to zero the multicast table, because the flag is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) checked before the table is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) else if (dev->flags & IFF_ALLMULTI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468) outw( inw(ioaddr + RCR ) | RCR_ALMUL, ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) /* We just get all multicast packets even if we only want them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) . from one source. This will be changed at some future
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) . point. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) else if (!netdev_mc_empty(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) /* support hardware multicasting */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) /* be sure I get rid of flags I might have set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477) outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) /* NOTE: this has to set the bank, so make sure it is the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) last thing called. The bank is set to zero at the top */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) smc_setmulticast(ioaddr, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484) outw( inw( ioaddr + RCR ) & ~(RCR_PROMISC | RCR_ALMUL),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) ioaddr + RCR );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488) since I'm disabling all multicast entirely, I need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) clear the multicast list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) SMC_SELECT_BANK( 3 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) outw( 0, ioaddr + MULTICAST1 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) outw( 0, ioaddr + MULTICAST2 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) outw( 0, ioaddr + MULTICAST3 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) outw( 0, ioaddr + MULTICAST4 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) #ifdef MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) static struct net_device *devSMC9194;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) module_param_hw(io, int, ioport, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505) module_param_hw(irq, int, irq, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) module_param(ifport, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507) MODULE_PARM_DESC(io, "SMC 99194 I/O base address");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) MODULE_PARM_DESC(irq, "SMC 99194 IRQ number");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) MODULE_PARM_DESC(ifport, "SMC 99194 interface port (0-default, 1-TP, 2-AUI)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) int __init init_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) if (io == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) printk(KERN_WARNING
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) CARDNAME": You shouldn't use auto-probing with insmod!\n" );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) /* copy the parameters from insmod into the device structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) devSMC9194 = smc_init(-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) return PTR_ERR_OR_ZERO(devSMC9194);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) void __exit cleanup_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) unregister_netdev(devSMC9194);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) free_irq(devSMC9194->irq, devSMC9194);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) release_region(devSMC9194->base_addr, SMC_IO_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) free_netdev(devSMC9194);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) #endif /* MODULE */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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