^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Driver for Solarflare network controllers and boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright 2005-2006 Fen Systems Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2005-2013 Solarflare Communications Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/tcp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/ip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/ipv6.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <net/ipv6.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/if_ether.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/highmem.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include "net_driver.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include "efx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "io.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include "nic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include "tx.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include "tx_common.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include "workarounds.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "ef10_regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifdef EFX_USE_PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define EFX_PIOBUF_SIZE_DEF ALIGN(256, L1_CACHE_BYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) unsigned int efx_piobuf_size __read_mostly = EFX_PIOBUF_SIZE_DEF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif /* EFX_USE_PIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline u8 *efx_tx_get_copy_buffer(struct efx_tx_queue *tx_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct efx_tx_buffer *buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned int index = efx_tx_queue_get_insert_index(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct efx_buffer *page_buf =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) &tx_queue->cb_page[index >> (PAGE_SHIFT - EFX_TX_CB_ORDER)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) unsigned int offset =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ((index << EFX_TX_CB_ORDER) + NET_IP_ALIGN) & (PAGE_SIZE - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) if (unlikely(!page_buf->addr) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) efx_nic_alloc_buffer(tx_queue->efx, page_buf, PAGE_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) GFP_ATOMIC))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) buffer->dma_addr = page_buf->dma_addr + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) buffer->unmap_len = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) return (u8 *)page_buf->addr + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u8 *efx_tx_get_copy_buffer_limited(struct efx_tx_queue *tx_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) struct efx_tx_buffer *buffer, size_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (len > EFX_TX_CB_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return efx_tx_get_copy_buffer(tx_queue, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void efx_tx_maybe_stop_queue(struct efx_tx_queue *txq1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) /* We need to consider all queues that the net core sees as one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) struct efx_nic *efx = txq1->efx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct efx_tx_queue *txq2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) unsigned int fill_level;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) fill_level = efx_channel_tx_old_fill_level(txq1->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if (likely(fill_level < efx->txq_stop_thresh))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* We used the stale old_read_count above, which gives us a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * pessimistic estimate of the fill level (which may even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * validly be >= efx->txq_entries). Now try again using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * read_count (more likely to be a cache miss).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * If we read read_count and then conditionally stop the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * queue, it is possible for the completion path to race with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * us and complete all outstanding descriptors in the middle,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * after which there will be no more completions to wake it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * Therefore we stop the queue first, then read read_count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * (with a memory barrier to ensure the ordering), then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * restart the queue if the fill level turns out to be low
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * enough.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) netif_tx_stop_queue(txq1->core_txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) smp_mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) efx_for_each_channel_tx_queue(txq2, txq1->channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) txq2->old_read_count = READ_ONCE(txq2->read_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) fill_level = efx_channel_tx_old_fill_level(txq1->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) EFX_WARN_ON_ONCE_PARANOID(fill_level >= efx->txq_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (likely(fill_level < efx->txq_stop_thresh)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) smp_mb();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (likely(!efx->loopback_selftest))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) netif_tx_start_queue(txq1->core_txq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int efx_enqueue_skb_copy(struct efx_tx_queue *tx_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned int copy_len = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) struct efx_tx_buffer *buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u8 *copy_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) EFX_WARN_ON_ONCE_PARANOID(copy_len > EFX_TX_CB_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) buffer = efx_tx_queue_get_insert_buffer(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) copy_buffer = efx_tx_get_copy_buffer(tx_queue, buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (unlikely(!copy_buffer))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) rc = skb_copy_bits(skb, 0, copy_buffer, copy_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) EFX_WARN_ON_PARANOID(rc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) buffer->len = copy_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) buffer->skb = skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) buffer->flags = EFX_TX_BUF_SKB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ++tx_queue->insert_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #ifdef EFX_USE_PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct efx_short_copy_buffer {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int used;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) u8 buf[L1_CACHE_BYTES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* Copy to PIO, respecting that writes to PIO buffers must be dword aligned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Advances piobuf pointer. Leaves additional data in the copy buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static void efx_memcpy_toio_aligned(struct efx_nic *efx, u8 __iomem **piobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u8 *data, int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct efx_short_copy_buffer *copy_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) int block_len = len & ~(sizeof(copy_buf->buf) - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) __iowrite64_copy(*piobuf, data, block_len >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *piobuf += block_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) len -= block_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) data += block_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) BUG_ON(copy_buf->used);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) BUG_ON(len > sizeof(copy_buf->buf));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) memcpy(copy_buf->buf, data, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) copy_buf->used = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Copy to PIO, respecting dword alignment, popping data from copy buffer first.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Advances piobuf pointer. Leaves additional data in the copy buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) static void efx_memcpy_toio_aligned_cb(struct efx_nic *efx, u8 __iomem **piobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) u8 *data, int len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct efx_short_copy_buffer *copy_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (copy_buf->used) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) /* if the copy buffer is partially full, fill it up and write */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int copy_to_buf =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) min_t(int, sizeof(copy_buf->buf) - copy_buf->used, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) memcpy(copy_buf->buf + copy_buf->used, data, copy_to_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) copy_buf->used += copy_to_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /* if we didn't fill it up then we're done for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) if (copy_buf->used < sizeof(copy_buf->buf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) __iowrite64_copy(*piobuf, copy_buf->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) sizeof(copy_buf->buf) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) *piobuf += sizeof(copy_buf->buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) data += copy_to_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) len -= copy_to_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) copy_buf->used = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) efx_memcpy_toio_aligned(efx, piobuf, data, len, copy_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static void efx_flush_copy_buffer(struct efx_nic *efx, u8 __iomem *piobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) struct efx_short_copy_buffer *copy_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) /* if there's anything in it, write the whole buffer, including junk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) if (copy_buf->used)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) __iowrite64_copy(piobuf, copy_buf->buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) sizeof(copy_buf->buf) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* Traverse skb structure and copy fragments in to PIO buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * Advances piobuf pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void efx_skb_copy_bits_to_pio(struct efx_nic *efx, struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) u8 __iomem **piobuf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) struct efx_short_copy_buffer *copy_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) efx_memcpy_toio_aligned(efx, piobuf, skb->data, skb_headlen(skb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) copy_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) for (i = 0; i < skb_shinfo(skb)->nr_frags; ++i) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) skb_frag_t *f = &skb_shinfo(skb)->frags[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) u8 *vaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) vaddr = kmap_atomic(skb_frag_page(f));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) efx_memcpy_toio_aligned_cb(efx, piobuf, vaddr + skb_frag_off(f),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) skb_frag_size(f), copy_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) kunmap_atomic(vaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) EFX_WARN_ON_ONCE_PARANOID(skb_shinfo(skb)->frag_list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int efx_enqueue_skb_pio(struct efx_tx_queue *tx_queue,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) struct efx_tx_buffer *buffer =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) efx_tx_queue_get_insert_buffer(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) u8 __iomem *piobuf = tx_queue->piobuf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /* Copy to PIO buffer. Ensure the writes are padded to the end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * of a cache line, as this is required for write-combining to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * effective on at least x86.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (skb_shinfo(skb)->nr_frags) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) /* The size of the copy buffer will ensure all writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) * are the size of a cache line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct efx_short_copy_buffer copy_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) copy_buf.used = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) efx_skb_copy_bits_to_pio(tx_queue->efx, skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) &piobuf, ©_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) efx_flush_copy_buffer(tx_queue->efx, piobuf, ©_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Pad the write to the size of a cache line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * We can do this because we know the skb_shared_info struct is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * after the source, and the destination buffer is big enough.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) BUILD_BUG_ON(L1_CACHE_BYTES >
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SKB_DATA_ALIGN(sizeof(struct skb_shared_info)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) __iowrite64_copy(tx_queue->piobuf, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) ALIGN(skb->len, L1_CACHE_BYTES) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) buffer->skb = skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) buffer->flags = EFX_TX_BUF_SKB | EFX_TX_BUF_OPTION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) EFX_POPULATE_QWORD_5(buffer->option,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) ESF_DZ_TX_DESC_IS_OPT, 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) ESF_DZ_TX_OPTION_TYPE, ESE_DZ_TX_OPTION_DESC_PIO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ESF_DZ_TX_PIO_CONT, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ESF_DZ_TX_PIO_BYTE_CNT, skb->len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) ESF_DZ_TX_PIO_BUF_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) tx_queue->piobuf_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ++tx_queue->insert_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* Decide whether we can use TX PIO, ie. write packet data directly into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) * a buffer on the device. This can reduce latency at the expense of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) * throughput, so we only do this if both hardware and software TX rings
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * are empty, including all queues for the channel. This also ensures that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * only one packet at a time can be using the PIO buffer. If the xmit_more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * flag is set then we don't use this - there'll be another packet along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * shortly and we want to hold off the doorbell.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static bool efx_tx_may_pio(struct efx_tx_queue *tx_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) struct efx_channel *channel = tx_queue->channel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) if (!tx_queue->piobuf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) EFX_WARN_ON_ONCE_PARANOID(!channel->efx->type->option_descriptors);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) efx_for_each_channel_tx_queue(tx_queue, channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) if (!efx_nic_tx_is_empty(tx_queue, tx_queue->packet_write_count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) #endif /* EFX_USE_PIO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* Send any pending traffic for a channel. xmit_more is shared across all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * queues for a channel, so we must check all of them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) static void efx_tx_send_pending(struct efx_channel *channel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct efx_tx_queue *q;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) efx_for_each_channel_tx_queue(q, channel) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (q->xmit_pending)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) efx_nic_push_buffers(q);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * Add a socket buffer to a TX queue
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * This maps all fragments of a socket buffer for DMA and adds them to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * the TX queue. The queue's insert pointer will be incremented by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) * the number of fragments in the socket buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * If any DMA mapping fails, any mapped fragments will be unmapped,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * the queue's insert pointer will be restored to its original value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * This function is split out from efx_hard_start_xmit to allow the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) * loopback test to direct packets via specific TX queues.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * Returns NETDEV_TX_OK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) * You must hold netif_tx_lock() to call this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) netdev_tx_t __efx_enqueue_skb(struct efx_tx_queue *tx_queue, struct sk_buff *skb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) unsigned int old_insert_count = tx_queue->insert_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) bool xmit_more = netdev_xmit_more();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) bool data_mapped = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) unsigned int segments;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) unsigned int skb_len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) int rc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) skb_len = skb->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) segments = skb_is_gso(skb) ? skb_shinfo(skb)->gso_segs : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (segments == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) segments = 0; /* Don't use TSO for a single segment. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* Handle TSO first - it's *possible* (although unlikely) that we might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * be passed a packet to segment that's smaller than the copybreak/PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * size limit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if (segments) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) switch (tx_queue->tso_version) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) rc = efx_enqueue_skb_tso(tx_queue, skb, &data_mapped);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) rc = efx_ef10_tx_tso_desc(tx_queue, skb, &data_mapped);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case 0: /* No TSO on this queue, SW fallback needed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) rc = -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) if (rc == -EINVAL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) rc = efx_tx_tso_fallback(tx_queue, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) tx_queue->tso_fallbacks++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (rc == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) if (rc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) #ifdef EFX_USE_PIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) } else if (skb_len <= efx_piobuf_size && !xmit_more &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) efx_tx_may_pio(tx_queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /* Use PIO for short packets with an empty queue. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) if (efx_enqueue_skb_pio(tx_queue, skb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) tx_queue->pio_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) data_mapped = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) } else if (skb->data_len && skb_len <= EFX_TX_CB_SIZE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) /* Pad short packets or coalesce short fragmented packets. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (efx_enqueue_skb_copy(tx_queue, skb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) tx_queue->cb_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) data_mapped = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* Map for DMA and create descriptors if we haven't done so already. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) if (!data_mapped && (efx_tx_map_data(tx_queue, skb, segments)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) efx_tx_maybe_stop_queue(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) tx_queue->xmit_pending = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Pass off to hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (__netdev_tx_sent_queue(tx_queue->core_txq, skb_len, xmit_more))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) efx_tx_send_pending(tx_queue->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (segments) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) tx_queue->tso_bursts++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) tx_queue->tso_packets += segments;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) tx_queue->tx_packets += segments;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) tx_queue->tx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) efx_enqueue_unwind(tx_queue, old_insert_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) dev_kfree_skb_any(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /* If we're not expecting another transmit and we had something to push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * on this queue or a partner queue then we need to push here to get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * previous packets out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (!xmit_more)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) efx_tx_send_pending(tx_queue->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) static void efx_xdp_return_frames(int n, struct xdp_frame **xdpfs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) for (i = 0; i < n; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) xdp_return_frame_rx_napi(xdpfs[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /* Transmit a packet from an XDP buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * Returns number of packets sent on success, error code otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) * Runs in NAPI context, either in our poll (for XDP TX) or a different NIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) * (for XDP redirect).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) int efx_xdp_tx_buffers(struct efx_nic *efx, int n, struct xdp_frame **xdpfs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) bool flush)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct efx_tx_buffer *tx_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct efx_tx_queue *tx_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) struct xdp_frame *xdpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) dma_addr_t dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) unsigned int len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) int space;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) int cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) cpu = raw_smp_processor_id();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (!efx->xdp_tx_queue_count ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) unlikely(cpu >= efx->xdp_tx_queue_count))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) tx_queue = efx->xdp_tx_queues[cpu];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) if (unlikely(!tx_queue))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (unlikely(n && !xdpfs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (!n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* Check for available space. We should never need multiple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) * descriptors per frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) space = efx->txq_entries +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) tx_queue->read_count - tx_queue->insert_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) for (i = 0; i < n; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) xdpf = xdpfs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) if (i >= space)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* We'll want a descriptor for this tx. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) prefetchw(__efx_tx_queue_get_insert_buffer(tx_queue));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) len = xdpf->len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) /* Map for DMA. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) dma_addr = dma_map_single(&efx->pci_dev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) xdpf->data, len,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) DMA_TO_DEVICE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) if (dma_mapping_error(&efx->pci_dev->dev, dma_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) /* Create descriptor and set up for unmapping DMA. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) tx_buffer = efx_tx_map_chunk(tx_queue, dma_addr, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) tx_buffer->xdpf = xdpf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) tx_buffer->flags = EFX_TX_BUF_XDP |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) EFX_TX_BUF_MAP_SINGLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) tx_buffer->dma_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) tx_buffer->unmap_len = len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) tx_queue->tx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* Pass mapped frames to hardware. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) if (flush && i > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) efx_nic_push_buffers(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (i == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) efx_xdp_return_frames(n - i, xdpfs + i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) /* Initiate a packet transmission. We use one channel per CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) * (sharing when we have more CPUs than channels).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) * Context: non-blocking.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) * Should always return NETDEV_TX_OK and consume the skb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) netdev_tx_t efx_hard_start_xmit(struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) struct net_device *net_dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) struct efx_nic *efx = netdev_priv(net_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) struct efx_tx_queue *tx_queue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) unsigned index, type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) EFX_WARN_ON_PARANOID(!netif_device_present(net_dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) index = skb_get_queue_mapping(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) type = efx_tx_csum_type_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (index >= efx->n_tx_channels) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) index -= efx->n_tx_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) type |= EFX_TXQ_TYPE_HIGHPRI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /* PTP "event" packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (unlikely(efx_xmit_with_hwtstamp(skb)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) unlikely(efx_ptp_is_ptp_tx(efx, skb))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* There may be existing transmits on the channel that are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) * waiting for this packet to trigger the doorbell write.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) * We need to send the packets at this point.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) efx_tx_send_pending(efx_get_tx_channel(efx, index));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) return efx_ptp_tx(efx, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) tx_queue = efx_get_tx_queue(efx, index, type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) if (WARN_ON_ONCE(!tx_queue)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /* We don't have a TXQ of the right type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * This should never happen, as we don't advertise offload
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * features unless we can support them.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) dev_kfree_skb_any(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* If we're not expecting another transmit and we had something to push
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) * on this queue or a partner queue then we need to push here to get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) * previous packets out.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (!netdev_xmit_more())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) efx_tx_send_pending(tx_queue->channel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) return __efx_enqueue_skb(tx_queue, skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) void efx_xmit_done_single(struct efx_tx_queue *tx_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) unsigned int pkts_compl = 0, bytes_compl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) unsigned int read_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) bool finished = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) while (!finished) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) struct efx_tx_buffer *buffer = &tx_queue->buffer[read_ptr];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) if (!efx_tx_buffer_in_use(buffer)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) struct efx_nic *efx = tx_queue->efx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) netif_err(efx, hw, efx->net_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) "TX queue %d spurious single TX completion\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) tx_queue->queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) efx_schedule_reset(efx, RESET_TYPE_TX_SKIP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* Need to check the flag before dequeueing. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (buffer->flags & EFX_TX_BUF_SKB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) finished = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) efx_dequeue_buffer(tx_queue, buffer, &pkts_compl, &bytes_compl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ++tx_queue->read_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) read_ptr = tx_queue->read_count & tx_queue->ptr_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) tx_queue->pkts_compl += pkts_compl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) tx_queue->bytes_compl += bytes_compl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) EFX_WARN_ON_PARANOID(pkts_compl != 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) efx_xmit_done_check_empty(tx_queue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) void efx_init_tx_queue_core_txq(struct efx_tx_queue *tx_queue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) struct efx_nic *efx = tx_queue->efx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* Must be inverse of queue lookup in efx_hard_start_xmit() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) tx_queue->core_txq =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) netdev_get_tx_queue(efx->net_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) tx_queue->channel->channel +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ((tx_queue->type & EFX_TXQ_TYPE_HIGHPRI) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) efx->n_tx_channels : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) int efx_setup_tc(struct net_device *net_dev, enum tc_setup_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) void *type_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct efx_nic *efx = netdev_priv(net_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) struct tc_mqprio_qopt *mqprio = type_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) unsigned tc, num_tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (type != TC_SETUP_QDISC_MQPRIO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* Only Siena supported highpri queues */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (efx_nic_rev(efx) > EFX_REV_SIENA_A0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) num_tc = mqprio->num_tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) if (num_tc > EFX_MAX_TX_TC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (num_tc == net_dev->num_tc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) for (tc = 0; tc < num_tc; tc++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) net_dev->tc_to_txq[tc].offset = tc * efx->n_tx_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) net_dev->tc_to_txq[tc].count = efx->n_tx_channels;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) net_dev->num_tc = num_tc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) return netif_set_real_num_tx_queues(net_dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) max_t(int, num_tc, 1) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) efx->n_tx_channels);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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