^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/drivers/acorn/net/ether3.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1995-2000 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * SEEQ nq8005 ethernet driver for Acorn/ANT Ether3 card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for Acorn machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * By Russell King, with some suggestions from borris@ant.co.uk
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Changelog:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * 1.04 RMK 29/02/1996 Won't pass packets that are from our ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * address up to the higher levels - they're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * silently ignored. I/F can now be put into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * multicast mode. Receiver routine optimised.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 1.05 RMK 30/02/1996 Now claims interrupt at open when part of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * the kernel rather than when a module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 1.06 RMK 02/03/1996 Various code cleanups
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 1.07 RMK 13/10/1996 Optimised interrupt routine and transmit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * 1.08 RMK 14/10/1996 Fixed problem with too many packets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * prevented the kernel message about dropped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * packets appearing too many times a second.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Now does not disable all IRQs, only the IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * used by this card.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * 1.09 RMK 10/11/1996 Only enables TX irq when buffer space is low,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * but we still service the TX queue if we get a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * RX interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * 1.10 RMK 15/07/1997 Fixed autoprobing of NQ8004.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 1.11 RMK 16/11/1997 Fixed autoprobing of NQ8005A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 1.12 RMK 31/12/1997 Removed reference to dev_tint for Linux 2.1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * RMK 27/06/1998 Changed asm/delay.h to linux/delay.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * 1.13 RMK 29/06/1998 Fixed problem with transmission of packets.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Chip seems to have a bug in, whereby if the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * packet starts two bytes from the end of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * buffer, it corrupts the receiver chain, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * never updates the transmit status correctly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * 1.14 RMK 07/01/1998 Added initial code for ETHERB addressing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * 1.15 RMK 30/04/1999 More fixes to the transmit routine for buggy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * 1.16 RMK 10/02/2000 Updated for 2.3.43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * 1.17 RMK 13/05/2000 Updated for 2.3.99-pre8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #include <asm/ecard.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static char version[] = "ether3 ethernet driver (c) 1995-2000 R.M.King v1.17\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #include "ether3.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static unsigned int net_debug = NET_DEBUG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void ether3_setmulticastlist(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static int ether3_rx(struct net_device *dev, unsigned int maxcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void ether3_tx(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static int ether3_open (struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static netdev_tx_t ether3_sendpacket(struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static irqreturn_t ether3_interrupt (int irq, void *dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static int ether3_close (struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void ether3_setmulticastlist (struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void ether3_timeout(struct net_device *dev, unsigned int txqueue);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define BUS_16 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BUS_8 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define BUS_UNKNOWN 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* --------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) typedef enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) buffer_write,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) buffer_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) } buffer_rw_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * ether3 read/write. Slow things down a bit...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * The SEEQ8005 doesn't like us writing to its registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * too quickly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline void ether3_outb(int v, void __iomem *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) writeb(v, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) static inline void ether3_outw(int v, void __iomem *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) writew(v, r);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define ether3_inb(r) ({ unsigned int __v = readb((r)); udelay(1); __v; })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define ether3_inw(r) ({ unsigned int __v = readw((r)); udelay(1); __v; })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) ether3_setbuffer(struct net_device *dev, buffer_rw_t read, int start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int timeout = 1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) while ((ether3_inw(REG_STATUS) & STAT_FIFOEMPTY) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (!timeout--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) printk("%s: setbuffer broken\n", dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) priv(dev)->broken = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) udelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (read == buffer_read) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ether3_outw(start, REG_DMAADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) ether3_outw(priv(dev)->regs.command | CMD_FIFOREAD, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ether3_outw(priv(dev)->regs.command | CMD_FIFOWRITE, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ether3_outw(start, REG_DMAADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * write data to the buffer memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define ether3_writebuffer(dev,data,length) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) writesw(REG_BUFWIN, (data), (length) >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define ether3_writeword(dev,data) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) writew((data), REG_BUFWIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define ether3_writelong(dev,data) { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) void __iomem *reg_bufwin = REG_BUFWIN; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) writew((data), reg_bufwin); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) writew((data) >> 16, reg_bufwin); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * read data from the buffer memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define ether3_readbuffer(dev,data,length) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) readsw(REG_BUFWIN, (data), (length) >> 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define ether3_readword(dev) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) readw(REG_BUFWIN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define ether3_readlong(dev) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) readw(REG_BUFWIN) | (readw(REG_BUFWIN) << 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Switch LED off...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static void ether3_ledoff(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) struct dev_priv *private = from_timer(private, t, timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) struct net_device *dev = private->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ether3_outw(priv(dev)->regs.config2 |= CFG2_CTRLO, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * switch LED on...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static inline void ether3_ledon(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) del_timer(&priv(dev)->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) priv(dev)->timer.expires = jiffies + HZ / 50; /* leave on for 1/50th second */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) add_timer(&priv(dev)->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (priv(dev)->regs.config2 & CFG2_CTRLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * Read the ethernet address string from the on board rom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * This is an ascii string!!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) ether3_addr(char *addr, struct expansion_card *ec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) struct in_chunk_dir cd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) char *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (ecard_readchunk(&cd, ec, 0xf5, 0) && (s = strchr(cd.d.string, '('))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) for (i = 0; i<6; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) addr[i] = simple_strtoul(s + 1, &s, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (*s != (i==5?')' : ':' ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (i == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* I wonder if we should even let the user continue in this case
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * - no, it would be better to disable the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) printk(KERN_ERR "ether3: Couldn't read a valid MAC address from card.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* --------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ether3_ramtest(struct net_device *dev, unsigned char byte)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) unsigned char *buffer = kmalloc(RX_END, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) int i,ret = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) int max_errors = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) int bad = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) if (!buffer)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) memset(buffer, byte, RX_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ether3_setbuffer(dev, buffer_write, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) ether3_writebuffer(dev, buffer, TX_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) ether3_setbuffer(dev, buffer_write, RX_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ether3_writebuffer(dev, buffer + RX_START, RX_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) memset(buffer, byte ^ 0xff, RX_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ether3_setbuffer(dev, buffer_read, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) ether3_readbuffer(dev, buffer, TX_END);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) ether3_setbuffer(dev, buffer_read, RX_START);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) ether3_readbuffer(dev, buffer + RX_START, RX_LEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) for (i = 0; i < RX_END; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) if (buffer[i] != byte) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) if (max_errors > 0 && bad != buffer[i]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) printk("%s: RAM failed with (%02X instead of %02X) at 0x%04X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev->name, buffer[i], byte, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ret = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) max_errors--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) bad = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (bad != -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (bad != i - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) printk(" - 0x%04X\n", i - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) printk("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) bad = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) if (bad != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) printk(" - 0xffff\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) kfree(buffer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* ------------------------------------------------------------------------------- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) static int ether3_init_2(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0|CFG1_DMABURST8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) priv(dev)->regs.config2 = CFG2_CTRLO|CFG2_RECVCRC|CFG2_ERRENCRC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) priv(dev)->regs.command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * Set up our hardware address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) for (i = 0; i < 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) ether3_outb(dev->dev_addr[i], REG_BUFWIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (dev->flags & IFF_PROMISC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) else if (dev->flags & IFF_MULTICAST)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) * There is a problem with the NQ8005 in that it occasionally loses the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * last two bytes. To get round this problem, we receive the CRC as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * well. That way, if we do lose the last two, then it doesn't matter.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) ether3_outw(0, REG_TRANSMITPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) ether3_outw(priv(dev)->regs.command, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) i = ether3_ramtest(dev, 0x5A);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) if(i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) i = ether3_ramtest(dev, 0x1E);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) if(i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ether3_setbuffer(dev, buffer_write, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ether3_writelong(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) ether3_init_for_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* Reset the chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) ether3_outw(CFG2_RESET, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) udelay(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) priv(dev)->regs.command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ether3_outw(priv(dev)->regs.config1 | CFG1_BUFSELSTAT0, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) for (i = 0; i < 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) ether3_outb(dev->dev_addr[i], REG_BUFWIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) priv(dev)->tx_head = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) priv(dev)->tx_tail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) priv(dev)->regs.config2 |= CFG2_CTRLO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) priv(dev)->rx_head = RX_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) ether3_outw(priv(dev)->regs.config1 | CFG1_TRANSEND, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) ether3_outw((TX_END>>8) - 1, REG_BUFWIN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) ether3_outw(priv(dev)->rx_head, REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) ether3_outw(0, REG_TRANSMITPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) ether3_setbuffer(dev, buffer_write, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) ether3_writelong(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) priv(dev)->regs.command = CMD_ENINTRX | CMD_ENINTTX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) ether3_probe_bus_8(struct net_device *dev, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int write_low, write_high, read_low, read_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) write_low = val & 255;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) write_high = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) printk(KERN_DEBUG "ether3_probe: write8 [%02X:%02X]", write_high, write_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) ether3_outb(write_low, REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) ether3_outb(write_high, REG_RECVPTR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) read_low = ether3_inb(REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) read_high = ether3_inb(REG_RECVPTR + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) printk(", read8 [%02X:%02X]\n", read_high, read_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return read_low == write_low && read_high == write_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) ether3_probe_bus_16(struct net_device *dev, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) int read_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ether3_outw(val, REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) read_val = ether3_inw(REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) printk(KERN_DEBUG "ether3_probe: write16 [%04X], read16 [%04X]\n", val, read_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) return read_val == val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * Open/initialize the board. This is called (in the current kernel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * sometime after booting when the 'ifconfig' program is run.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * This routine should set everything up anew at each open, even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) * registers that "should" only need to be set once at boot, so that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * there is non-reboot way to recover if something goes wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) ether3_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) ether3_init_for_open(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * The inverse routine to ether3_open().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) ether3_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) disable_irq(dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) ether3_outw(CMD_RXOFF|CMD_TXOFF, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) priv(dev)->regs.command = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) while (ether3_inw(REG_STATUS) & (STAT_RXON|STAT_TXON))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ether3_outb(0x80, REG_CONFIG2 + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) ether3_outw(0, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * Set or clear promiscuous/multicast mode filter for this adaptor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * We don't attempt any packet filtering. The card may have a SEEQ 8004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * in which does not have the other ethernet address registers present...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static void ether3_setmulticastlist(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (dev->flags & IFF_PROMISC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) /* promiscuous mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) priv(dev)->regs.config1 |= CFG1_RECVPROMISC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) } else if (dev->flags & IFF_ALLMULTI || !netdev_mc_empty(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) priv(dev)->regs.config1 |= CFG1_RECVSPECBRMULTI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) priv(dev)->regs.config1 |= CFG1_RECVSPECBROAD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) ether3_outw(priv(dev)->regs.config1 | CFG1_LOCBUFMEM, REG_CONFIG1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) static void ether3_timeout(struct net_device *dev, unsigned int txqueue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) del_timer(&priv(dev)->timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) ether3_inw(REG_STATUS), ether3_inw(REG_CONFIG1), ether3_inw(REG_CONFIG2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) ether3_inw(REG_RECVPTR), ether3_inw(REG_RECVEND), ether3_inw(REG_TRANSMITPTR));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) priv(dev)->tx_head, priv(dev)->tx_tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) priv(dev)->regs.config2 |= CFG2_CTRLO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) dev->stats.tx_errors += 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) ether3_outw(priv(dev)->regs.config2, REG_CONFIG2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) priv(dev)->tx_head = priv(dev)->tx_tail = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * Transmit a packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) static netdev_tx_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) ether3_sendpacket(struct sk_buff *skb, struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) unsigned int length = ETH_ZLEN < skb->len ? skb->len : ETH_ZLEN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) unsigned int ptr, next_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) if (priv(dev)->broken) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) dev_kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) dev->stats.tx_dropped++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) length = (length + 1) & ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) if (length != skb->len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) if (skb_padto(skb, length))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) next_ptr = (priv(dev)->tx_head + 1) & 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (priv(dev)->tx_tail == next_ptr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) return NETDEV_TX_BUSY; /* unable to queue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ptr = 0x600 * priv(dev)->tx_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) priv(dev)->tx_head = next_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) next_ptr *= 0x600;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #define TXHDR_FLAGS (TXHDR_TRANSMIT|TXHDR_CHAINCONTINUE|TXHDR_DATAFOLLOWS|TXHDR_ENSUCCESS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ether3_setbuffer(dev, buffer_write, next_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) ether3_writelong(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ether3_setbuffer(dev, buffer_write, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) ether3_writelong(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ether3_writebuffer(dev, skb->data, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ether3_writeword(dev, htons(next_ptr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) ether3_setbuffer(dev, buffer_write, ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ether3_writeword(dev, htons((ptr + length + 4)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ether3_writeword(dev, TXHDR_FLAGS >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ether3_ledon(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) if (!(ether3_inw(REG_STATUS) & STAT_TXON)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) ether3_outw(ptr, REG_TRANSMITPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) ether3_outw(priv(dev)->regs.command | CMD_TXON, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) next_ptr = (priv(dev)->tx_head + 1) & 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) dev_kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) if (priv(dev)->tx_tail == next_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) static irqreturn_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) ether3_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) struct net_device *dev = (struct net_device *)dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) unsigned int status, handled = IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) #if NET_DEBUG > 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) if(net_debug & DEBUG_INT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) printk("eth3irq: %d ", irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) status = ether3_inw(REG_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (status & STAT_INTRX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) ether3_outw(CMD_ACKINTRX | priv(dev)->regs.command, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ether3_rx(dev, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) handled = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (status & STAT_INTTX) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ether3_outw(CMD_ACKINTTX | priv(dev)->regs.command, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ether3_tx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) handled = IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) #if NET_DEBUG > 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if(net_debug & DEBUG_INT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) printk("done\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return handled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) * If we have a good packet(s), get it/them out of the buffers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) static int ether3_rx(struct net_device *dev, unsigned int maxcnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) unsigned int next_ptr = priv(dev)->rx_head, received = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) ether3_ledon(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) unsigned int this_ptr, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) unsigned char addrs[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * read the first 16 bytes from the buffer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * This contains the status bytes etc and ethernet addresses,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * and we also check the source ethernet address to see if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) * it originated from us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) unsigned int temp_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ether3_setbuffer(dev, buffer_read, next_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) temp_ptr = ether3_readword(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) status = ether3_readword(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) if ((status & (RXSTAT_DONE | RXHDR_CHAINCONTINUE | RXHDR_RECEIVE)) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) (RXSTAT_DONE | RXHDR_CHAINCONTINUE) || !temp_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) this_ptr = next_ptr + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) next_ptr = ntohs(temp_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) ether3_setbuffer(dev, buffer_read, this_ptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) ether3_readbuffer(dev, addrs+2, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) if (next_ptr < RX_START || next_ptr >= RX_END) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) printk("%02X %02X %02X %02X ", next_ptr >> 8, next_ptr & 255, status & 255, status >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) printk("%pM %pM\n", addrs + 2, addrs + 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) next_ptr = priv(dev)->rx_head;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) * ignore our own packets...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (!(*(unsigned long *)&dev->dev_addr[0] ^ *(unsigned long *)&addrs[2+6]) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) !(*(unsigned short *)&dev->dev_addr[4] ^ *(unsigned short *)&addrs[2+10])) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) maxcnt ++; /* compensate for loopedback packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) ether3_outw(next_ptr >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) if (!(status & (RXSTAT_OVERSIZE|RXSTAT_CRCERROR|RXSTAT_DRIBBLEERROR|RXSTAT_SHORTPACKET))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) unsigned int length = next_ptr - this_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (next_ptr <= this_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) length += RX_END - RX_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) skb = netdev_alloc_skb(dev, length + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) if (skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) unsigned char *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) skb_reserve(skb, 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) buf = skb_put(skb, length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ether3_readbuffer(dev, buf + 12, length - 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ether3_outw(next_ptr >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) *(unsigned short *)(buf + 0) = *(unsigned short *)(addrs + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) *(unsigned long *)(buf + 2) = *(unsigned long *)(addrs + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) *(unsigned long *)(buf + 6) = *(unsigned long *)(addrs + 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) *(unsigned short *)(buf + 10) = *(unsigned short *)(addrs + 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) skb->protocol = eth_type_trans(skb, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) netif_rx(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) received ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ether3_outw(next_ptr >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) dev->stats.rx_dropped++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) goto done;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) struct net_device_stats *stats = &dev->stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) ether3_outw(next_ptr >> 8, REG_RECVEND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) if (status & RXSTAT_OVERSIZE) stats->rx_over_errors ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) if (status & RXSTAT_CRCERROR) stats->rx_crc_errors ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) if (status & RXSTAT_DRIBBLEERROR) stats->rx_fifo_errors ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) if (status & RXSTAT_SHORTPACKET) stats->rx_length_errors ++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) stats->rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) while (-- maxcnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) dev->stats.rx_packets += received;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) priv(dev)->rx_head = next_ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * If rx went off line, then that means that the buffer may be full. We
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) * have dropped at least one packet.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) if (!(ether3_inw(REG_STATUS) & STAT_RXON)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev->stats.rx_dropped++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) ether3_outw(next_ptr, REG_RECVPTR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) ether3_outw(priv(dev)->regs.command | CMD_RXON, REG_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) return maxcnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) * Update stats for the transmitted packet(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static void ether3_tx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) unsigned int tx_tail = priv(dev)->tx_tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) int max_work = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) unsigned long status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) * Read the packet header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) ether3_setbuffer(dev, buffer_read, tx_tail * 0x600);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) status = ether3_readlong(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) * Check to see if this packet has been transmitted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) if ((status & (TXSTAT_DONE | TXHDR_TRANSMIT)) !=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) (TXSTAT_DONE | TXHDR_TRANSMIT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * Update errors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (!(status & (TXSTAT_BABBLED | TXSTAT_16COLLISIONS)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) dev->stats.tx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) dev->stats.tx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (status & TXSTAT_16COLLISIONS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) dev->stats.collisions += 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) if (status & TXSTAT_BABBLED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) dev->stats.tx_fifo_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) tx_tail = (tx_tail + 1) & 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) } while (--max_work);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) if (priv(dev)->tx_tail != tx_tail) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) priv(dev)->tx_tail = tx_tail;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) static void ether3_banner(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) static unsigned version_printed = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) if (net_debug && version_printed++ == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) printk(KERN_INFO "%s", version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) static const struct net_device_ops ether3_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) .ndo_open = ether3_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) .ndo_stop = ether3_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .ndo_start_xmit = ether3_sendpacket,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .ndo_set_rx_mode = ether3_setmulticastlist,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) .ndo_tx_timeout = ether3_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) ether3_probe(struct expansion_card *ec, const struct ecard_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) const struct ether3_data *data = id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) int bus_type, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) ether3_banner();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) ret = ecard_request_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) dev = alloc_etherdev(sizeof(struct dev_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) SET_NETDEV_DEV(dev, &ec->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) if (!priv(dev)->base) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) ec->irqaddr = priv(dev)->base + data->base_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) ec->irqmask = 0xf0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) priv(dev)->seeq = priv(dev)->base + data->base_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) dev->irq = ec->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) ether3_addr(dev->dev_addr, ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) priv(dev)->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) timer_setup(&priv(dev)->timer, ether3_ledoff, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) /* Reset card...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) ether3_outb(0x80, REG_CONFIG2 + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) bus_type = BUS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) udelay(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) /* Test using Receive Pointer (16-bit register) to find out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) * how the ether3 is connected to the bus...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) if (ether3_probe_bus_8(dev, 0x100) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) ether3_probe_bus_8(dev, 0x201))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) bus_type = BUS_8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) if (bus_type == BUS_UNKNOWN &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) ether3_probe_bus_16(dev, 0x101) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) ether3_probe_bus_16(dev, 0x201))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) bus_type = BUS_16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) switch (bus_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) case BUS_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) printk(KERN_ERR "%s: unable to identify bus width\n", dev->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) case BUS_8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) printk(KERN_ERR "%s: %s found, but is an unsupported "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) "8-bit card\n", dev->name, data->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) if (ether3_init_2(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) ret = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) dev->netdev_ops = ðer3_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) dev->watchdog_timeo = 5 * HZ / 100;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) ret = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) printk("%s: %s in slot %d, %pM\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) dev->name, data->name, ec->slot_no, dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) ecard_set_drvdata(ec, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) ecard_release_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static void ether3_remove(struct expansion_card *ec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) struct net_device *dev = ecard_get_drvdata(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) ecard_set_drvdata(ec, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ecard_release_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) static struct ether3_data ether3 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) .name = "ether3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .base_offset = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) static struct ether3_data etherb = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) .name = "etherb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) .base_offset = 0x800,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) static const struct ecard_id ether3_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) { MANU_ANT2, PROD_ANT_ETHER3, ðer3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) { MANU_ANT, PROD_ANT_ETHER3, ðer3 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) { MANU_ANT, PROD_ANT_ETHERB, ðerb },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) { 0xffff, 0xffff }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) static struct ecard_driver ether3_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) .probe = ether3_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) .remove = ether3_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) .id_table = ether3_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) .drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) .name = "ether3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) static int __init ether3_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) return ecard_register_driver(ðer3_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) static void __exit ether3_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) ecard_remove_driver(ðer3_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) module_init(ether3_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) module_exit(ether3_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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