^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * macsonic.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * (C) 2005 Finn Thain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Converted to DMA API, converted to unified driver model, made it work as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * a module again, and from the mac68k project, introduced more 32-bit cards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * and dhd's support for 16-bit cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * (C) 1998 Alan Cox
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Debugging Andreas Ehliar, Michael Schmitz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * Based on code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * (C) 1996 by Thomas Bogendoerfer (tsbogend@bigbug.franken.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * This driver is based on work from Andreas Busse, but most of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * the code is rewritten.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * A driver for the Mac onboard Sonic ethernet chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * 98/12/21 MSch: judged from tests on Q800, it's basically working,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * but eating up both receive and transmit resources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * and duplicating packets. Needs more testing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * 99/01/03 MSch: upgraded to version 0.92 of the core driver, fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 00/10/31 sammy@oh.verio.com: Updated driver for 2.4 kernels, fixed problems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * on centris.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/gfp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/nubus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/bitrev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <asm/hwtest.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <asm/macintosh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <asm/mac_via.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include "sonic.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* These should basically be bus-size and endian independent (since
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) the SONIC is at least smart enough that it uses the same endianness
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) as the host, unlike certain less enlightened Macintosh NICs) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define SONIC_READ(reg) (nubus_readw(dev->base_addr + (reg * 4) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) + lp->reg_offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SONIC_WRITE(reg,val) (nubus_writew(val, dev->base_addr + (reg * 4) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) + lp->reg_offset))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* For onboard SONIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define ONBOARD_SONIC_REGISTERS 0x50F0A000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define ONBOARD_SONIC_PROM_BASE 0x50f08000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum macsonic_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MACSONIC_DUODOCK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MACSONIC_APPLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MACSONIC_APPLE16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MACSONIC_DAYNA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MACSONIC_DAYNALINK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) /* For the built-in SONIC in the Duo Dock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define DUODOCK_SONIC_REGISTERS 0xe10000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define DUODOCK_SONIC_PROM_BASE 0xe12000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* For Apple-style NuBus SONIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define APPLE_SONIC_REGISTERS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define APPLE_SONIC_PROM_BASE 0x40000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Daynalink LC SONIC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define DAYNALINK_PROM_BASE 0x400000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* For Dayna-style NuBus SONIC (haven't seen one yet) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define DAYNA_SONIC_REGISTERS 0x180000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) /* This is what OpenBSD says. However, this is definitely in NuBus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) ROM space so we should be able to get it by walking the NuBus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) resource directories */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define DAYNA_SONIC_MAC_ADDR 0xffe004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define SONIC_READ_PROM(addr) nubus_readb(prom_addr+addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * For reversing the PROM address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline void bit_reverse_addr(unsigned char addr[6])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) for(i = 0; i < 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) addr[i] = bitrev8(addr[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int macsonic_open(struct net_device* dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) retval = request_irq(dev->irq, sonic_interrupt, 0, "sonic", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) printk(KERN_ERR "%s: unable to get IRQ %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) dev->name, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) goto err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Under the A/UX interrupt scheme, the onboard SONIC interrupt gets
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * moved from level 2 to level 3. Unfortunately we still get some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * level 2 interrupts so register the handler for both.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (dev->irq == IRQ_AUTO_3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) retval = request_irq(IRQ_NUBUS_9, sonic_interrupt, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) "sonic", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (retval) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) printk(KERN_ERR "%s: unable to get IRQ %d.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) dev->name, IRQ_NUBUS_9);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) goto err_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) retval = sonic_open(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (retval)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) goto err_irq_nubus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) err_irq_nubus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (dev->irq == IRQ_AUTO_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) free_irq(IRQ_NUBUS_9, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) err_irq:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) err:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return retval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int macsonic_close(struct net_device* dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) err = sonic_close(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (dev->irq == IRQ_AUTO_3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) free_irq(IRQ_NUBUS_9, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static const struct net_device_ops macsonic_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) .ndo_open = macsonic_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .ndo_stop = macsonic_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .ndo_start_xmit = sonic_send_packet,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) .ndo_set_rx_mode = sonic_multicast_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) .ndo_tx_timeout = sonic_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) .ndo_get_stats = sonic_get_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int macsonic_init(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct sonic_local* lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int err = sonic_alloc_descriptors(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) dev->netdev_ops = &macsonic_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) dev->watchdog_timeo = TX_TIMEOUT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * clear tally counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) SONIC_WRITE(SONIC_CRCT, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SONIC_WRITE(SONIC_FAET, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) SONIC_WRITE(SONIC_MPT, 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) memcmp(mac, "\x00\xA0\x40", 3) && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) memcmp(mac, "\x00\x80\x19", 3) && \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) memcmp(mac, "\x00\x05\x02", 3))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) static void mac_onboard_sonic_ethernet_addr(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) struct sonic_local *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) const int prom_addr = ONBOARD_SONIC_PROM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) unsigned short val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * On NuBus boards we can sometimes look in the ROM resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * No such luck for comm-slot/onboard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * On the PowerBook 520, the PROM base address is a mystery.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) if (hwreg_present((void *)prom_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) for (i = 0; i < 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) dev->dev_addr[i] = SONIC_READ_PROM(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (!INVALID_MAC(dev->dev_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * Most of the time, the address is bit-reversed. The NetBSD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * source has a rather long and detailed historical account of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * why this is so.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) bit_reverse_addr(dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) if (!INVALID_MAC(dev->dev_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) * If we still have what seems to be a bogus address, we'll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * look in the CAM. The top entry should be ours.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) printk(KERN_WARNING "macsonic: MAC address in PROM seems "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) "to be invalid, trying CAM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) printk(KERN_WARNING "macsonic: cannot read MAC address from "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) "PROM, trying CAM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* This only works if MacOS has already initialized the card. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) SONIC_WRITE(SONIC_CEP, 15);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) val = SONIC_READ(SONIC_CAP2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) dev->dev_addr[5] = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) dev->dev_addr[4] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) val = SONIC_READ(SONIC_CAP1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) dev->dev_addr[3] = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) dev->dev_addr[2] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) val = SONIC_READ(SONIC_CAP0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) dev->dev_addr[1] = val >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev->dev_addr[0] = val & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (!INVALID_MAC(dev->dev_addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* Still nonsense ... messed up someplace! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) "seems invalid, will use a random MAC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) eth_hw_addr_random(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) static int mac_onboard_sonic_probe(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct sonic_local* lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) int sr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) bool commslot = macintosh_config->expansion_type == MAC_EXP_PDS_COMM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /* Bogus probing, on the models which may or may not have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) Ethernet (BTW, the Ethernet *is* always at the same
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) address, and nothing else lives there, at least if Apple's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) documentation is to be believed) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (commslot || macintosh_config->ident == MAC_MODEL_C610) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) int card_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) card_present = hwreg_present((void*)ONBOARD_SONIC_REGISTERS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (!card_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) pr_info("Onboard/comm-slot SONIC not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /* Danger! My arms are flailing wildly! You *must* set lp->reg_offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * and dev->base_addr before using SONIC_READ() or SONIC_WRITE() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) dev->base_addr = ONBOARD_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (via_alt_mapping)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) dev->irq = IRQ_AUTO_3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) dev->irq = IRQ_NUBUS_9;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* The PowerBook's SONIC is 16 bit always. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (macintosh_config->ident == MAC_MODEL_PB520) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) lp->reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) lp->dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) } else if (commslot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* Some of the comm-slot cards are 16 bit. But some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) of them are not. The 32-bit cards use offset 2 and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) have known revisions, we try reading the revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) register at offset 2, if we don't get a known revision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) we assume 16 bit at offset 0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) lp->reg_offset = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) lp->dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) sr = SONIC_READ(SONIC_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) if (sr == 0x0004 || sr == 0x0006 || sr == 0x0100 || sr == 0x0101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* 83932 is 0x0004 or 0x0006, 83934 is 0x0100 or 0x0101 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) lp->dma_bitmode = SONIC_BITMODE32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) lp->dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) lp->reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* All onboard cards are at offset 2 with 32 bit DMA. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) lp->reg_offset = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) lp->dma_bitmode = SONIC_BITMODE32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) pr_info("Onboard/comm-slot SONIC, revision 0x%04x, %d bit DMA, register offset %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) SONIC_READ(SONIC_SR), lp->dma_bitmode ? 32 : 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) lp->reg_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* This is sometimes useful to find out how MacOS configured the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) pr_debug("%s: DCR=0x%04x, DCR2=0x%04x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) SONIC_READ(SONIC_DCR) & 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) SONIC_READ(SONIC_DCR2) & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* Software reset, then initialize control registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) SONIC_WRITE(SONIC_DCR, SONIC_DCR_EXBUS | SONIC_DCR_BMS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) SONIC_DCR_RFT1 | SONIC_DCR_TFT0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) (lp->dma_bitmode ? SONIC_DCR_DW : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* This *must* be written back to in order to restore the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) * extended programmable output bits, as it may not have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) * initialised since the hardware reset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) SONIC_WRITE(SONIC_DCR2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /* Clear *and* disable interrupts to be on the safe side */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) SONIC_WRITE(SONIC_IMR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) SONIC_WRITE(SONIC_ISR, 0x7fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) /* Now look for the MAC address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) mac_onboard_sonic_ethernet_addr(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) pr_info("SONIC ethernet @%08lx, MAC %pM, IRQ %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) dev->base_addr, dev->dev_addr, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* Shared init code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) return macsonic_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) static int mac_sonic_nubus_ethernet_addr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) unsigned long prom_addr, int id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) for(i = 0; i < 6; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev->dev_addr[i] = SONIC_READ_PROM(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) /* Some of the addresses are bit-reversed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (id != MACSONIC_DAYNA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) bit_reverse_addr(dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static int macsonic_ident(struct nubus_rsrc *fres)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (fres->dr_hw == NUBUS_DRHW_ASANTE_LC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) fres->dr_sw == NUBUS_DRSW_SONIC_LC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return MACSONIC_DAYNALINK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (fres->dr_hw == NUBUS_DRHW_SONIC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) fres->dr_sw == NUBUS_DRSW_APPLE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) /* There has to be a better way to do this... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (strstr(fres->board->name, "DuoDock"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) return MACSONIC_DUODOCK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return MACSONIC_APPLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if (fres->dr_hw == NUBUS_DRHW_SMC9194 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) fres->dr_sw == NUBUS_DRSW_DAYNA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) return MACSONIC_DAYNA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) if (fres->dr_hw == NUBUS_DRHW_APPLE_SONIC_LC &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) fres->dr_sw == 0) { /* huh? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) return MACSONIC_APPLE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static int mac_sonic_nubus_probe_board(struct nubus_board *board, int id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) struct sonic_local* lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned long base_addr, prom_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) u16 sonic_dcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) int reg_offset, dma_bitmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) switch (id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) case MACSONIC_DUODOCK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) base_addr = board->slot_addr + DUODOCK_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) prom_addr = board->slot_addr + DUODOCK_SONIC_PROM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) sonic_dcr = SONIC_DCR_EXBUS | SONIC_DCR_RFT0 | SONIC_DCR_RFT1 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) SONIC_DCR_TFT0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) reg_offset = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) dma_bitmode = SONIC_BITMODE32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case MACSONIC_APPLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) base_addr = board->slot_addr + APPLE_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) prom_addr = board->slot_addr + APPLE_SONIC_PROM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) sonic_dcr = SONIC_DCR_BMS | SONIC_DCR_RFT1 | SONIC_DCR_TFT0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) dma_bitmode = SONIC_BITMODE32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) case MACSONIC_APPLE16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) base_addr = board->slot_addr + APPLE_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) prom_addr = board->slot_addr + APPLE_SONIC_PROM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) sonic_dcr = SONIC_DCR_EXBUS | SONIC_DCR_RFT1 | SONIC_DCR_TFT0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) SONIC_DCR_PO1 | SONIC_DCR_BMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) case MACSONIC_DAYNALINK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) base_addr = board->slot_addr + APPLE_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) prom_addr = board->slot_addr + DAYNALINK_PROM_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) sonic_dcr = SONIC_DCR_RFT1 | SONIC_DCR_TFT0 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) SONIC_DCR_PO1 | SONIC_DCR_BMS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) case MACSONIC_DAYNA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) base_addr = board->slot_addr + DAYNA_SONIC_REGISTERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) prom_addr = board->slot_addr + DAYNA_SONIC_MAC_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) sonic_dcr = SONIC_DCR_BMS |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) SONIC_DCR_RFT1 | SONIC_DCR_TFT0 | SONIC_DCR_PO1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) reg_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dma_bitmode = SONIC_BITMODE16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) printk(KERN_ERR "macsonic: WTF, id is %d\n", id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) /* Danger! My arms are flailing wildly! You *must* set lp->reg_offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * and dev->base_addr before using SONIC_READ() or SONIC_WRITE() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dev->base_addr = base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) lp->reg_offset = reg_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) lp->dma_bitmode = dma_bitmode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) dev->irq = SLOT2IRQ(board->slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) dev_info(&board->dev, "%s, revision 0x%04x, %d bit DMA, register offset %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) board->name, SONIC_READ(SONIC_SR),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) lp->dma_bitmode ? 32 : 16, lp->reg_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /* This is sometimes useful to find out how MacOS configured the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) dev_dbg(&board->dev, "%s: DCR=0x%04x, DCR2=0x%04x\n", __func__,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) SONIC_READ(SONIC_DCR) & 0xffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) SONIC_READ(SONIC_DCR2) & 0xffff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) /* Software reset, then initialize control registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) SONIC_WRITE(SONIC_DCR, sonic_dcr | (dma_bitmode ? SONIC_DCR_DW : 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) /* This *must* be written back to in order to restore the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * extended programmable output bits, since it may not have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * initialised since the hardware reset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) SONIC_WRITE(SONIC_DCR2, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* Clear *and* disable interrupts to be on the safe side */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) SONIC_WRITE(SONIC_IMR, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) SONIC_WRITE(SONIC_ISR, 0x7fff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) /* Now look for the MAC address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) if (mac_sonic_nubus_ethernet_addr(dev, prom_addr, id) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) dev_info(&board->dev, "SONIC ethernet @%08lx, MAC %pM, IRQ %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) dev->base_addr, dev->dev_addr, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) /* Shared init code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) return macsonic_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int mac_sonic_platform_probe(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) struct sonic_local *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) dev = alloc_etherdev(sizeof(struct sonic_local));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) lp->device = &pdev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) SET_NETDEV_DEV(dev, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) platform_set_drvdata(pdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) err = mac_onboard_sonic_probe(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) sonic_msg_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) err = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) goto undo_probe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) undo_probe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) dma_free_coherent(lp->device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) lp->descriptors, lp->descriptors_laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) MODULE_DESCRIPTION("Macintosh SONIC ethernet driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) MODULE_ALIAS("platform:macsonic");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) #include "sonic.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) static int mac_sonic_platform_remove(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) struct net_device *dev = platform_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) struct sonic_local* lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) dma_free_coherent(lp->device, SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) lp->descriptors, lp->descriptors_laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) static struct platform_driver mac_sonic_platform_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .probe = mac_sonic_platform_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .remove = mac_sonic_platform_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) .name = "macsonic",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static int mac_sonic_nubus_probe(struct nubus_board *board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) struct net_device *ndev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) struct sonic_local *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct nubus_rsrc *fres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) int id = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) /* The platform driver will handle a PDS or Comm Slot card (even if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) * it has a pseudoslot declaration ROM).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (macintosh_config->expansion_type == MAC_EXP_PDS_COMM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) for_each_board_func_rsrc(board, fres) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) if (fres->category != NUBUS_CAT_NETWORK ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) fres->type != NUBUS_TYPE_ETHERNET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) id = macsonic_ident(fres);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (id != -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) if (!fres)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ndev = alloc_etherdev(sizeof(struct sonic_local));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) if (!ndev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) lp = netdev_priv(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) lp->device = &board->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) SET_NETDEV_DEV(ndev, &board->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) err = mac_sonic_nubus_probe_board(board, id, ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) sonic_msg_init(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) err = register_netdev(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) goto undo_probe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) nubus_set_drvdata(board, ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) undo_probe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dma_free_coherent(lp->device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) lp->descriptors, lp->descriptors_laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) free_netdev(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) static int mac_sonic_nubus_remove(struct nubus_board *board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) struct net_device *ndev = nubus_get_drvdata(board);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) struct sonic_local *lp = netdev_priv(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) unregister_netdev(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) dma_free_coherent(lp->device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) SIZEOF_SONIC_DESC * SONIC_BUS_SCALE(lp->dma_bitmode),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) lp->descriptors, lp->descriptors_laddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) free_netdev(ndev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static struct nubus_driver mac_sonic_nubus_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) .probe = mac_sonic_nubus_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .remove = mac_sonic_nubus_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) .name = "macsonic-nubus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) static int perr, nerr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static int __init mac_sonic_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) perr = platform_driver_register(&mac_sonic_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) nerr = nubus_driver_register(&mac_sonic_nubus_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) module_init(mac_sonic_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) static void __exit mac_sonic_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) if (!perr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) platform_driver_unregister(&mac_sonic_platform_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) if (!nerr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) nubus_driver_unregister(&mac_sonic_nubus_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) module_exit(mac_sonic_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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