Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /* Random defines and structures for the HP Lance driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Based on the Sun Lance driver and the NetBSD HP Lance driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) /* Registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define HPLANCE_ID		0x01		/* DIO register: ID byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define HPLANCE_STATUS		0x03		/* DIO register: interrupt enable/status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /* Control and status bits for the status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define LE_IE 0x80                                /* interrupt enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define LE_IR 0x40                                /* interrupt requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define LE_LOCK 0x08                              /* lock status register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define LE_ACK 0x04                               /* ack of lock */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define LE_JAB 0x02                               /* loss of tx clock (???) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* We can also extract the IPL from the status register with the standard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * DIO_IPL(hplance) macro, or using dio_scodetoipl()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* These are the offsets for the DIO regs (hplance_reg), lance_ioreg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * memory and NVRAM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define HPLANCE_IDOFF 0                           /* board baseaddr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define HPLANCE_REGOFF 0x4000                     /* lance registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define HPLANCE_MEMOFF 0x8000                     /* struct lance_init_block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define HPLANCE_NVRAMOFF 0xC008                   /* etheraddress as one *nibble* per byte */