^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Amiga Linux/68k A2065 Ethernet Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * (C) Copyright 1995-2003 by Geert Uytterhoeven <geert@linux-m68k.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Fixes and tips by:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * - Janos Farkas (CHEXUM@sparta.banki.hu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * - Jes Degn Soerensen (jds@kom.auc.dk)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * - Matt Domsch (Matt_Domsch@dell.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * ----------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * This program is based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * ariadne.?: Amiga Linux/68k Ariadne Ethernet Driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * (C) Copyright 1995 by Geert Uytterhoeven,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Peter De Schrijver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * lance.c: An AMD LANCE ethernet driver for linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * Written 1993-94 by Donald Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Am79C960: PCnet(tm)-ISA Single-Chip Ethernet Controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Advanced Micro Devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Publication #16907, Rev. B, Amendment/0, May 1994
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * ----------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * License. See the file COPYING in the main directory of the Linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * distribution for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * ----------------------------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * The A2065 is a Zorro-II board made by Commodore/Ameristar. It contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * - an Am7990 Local Area Network Controller for Ethernet (LANCE) with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * both 10BASE-2 (thin coax) and AUI (DB-15) connectors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*#define DEBUG*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) /*#define TEST_HITS*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/crc32.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/zorro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <asm/amigaints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <asm/amigahw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "a2065.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Transmit/Receive Ring Definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define LANCE_LOG_TX_BUFFERS (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define LANCE_LOG_RX_BUFFERS (4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define TX_RING_SIZE (1 << LANCE_LOG_TX_BUFFERS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define RX_RING_SIZE (1 << LANCE_LOG_RX_BUFFERS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define PKT_BUF_SIZE (1544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define RX_BUFF_SIZE PKT_BUF_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define TX_BUFF_SIZE PKT_BUF_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* Layout of the Lance's RAM Buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct lance_init_block {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned short mode; /* Pre-set mode (reg. 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned char phys_addr[6]; /* Physical ethernet address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned filter[2]; /* Multicast filter. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* Receive and transmit ring base, along with extra bits. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned short rx_ptr; /* receive descriptor addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned short rx_len; /* receive len and high addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned short tx_ptr; /* transmit descriptor addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned short tx_len; /* transmit len and high addr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* The Tx and Rx ring entries must aligned on 8-byte boundaries. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) struct lance_rx_desc brx_ring[RX_RING_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct lance_tx_desc btx_ring[TX_RING_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) char rx_buf[RX_RING_SIZE][RX_BUFF_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) char tx_buf[TX_RING_SIZE][TX_BUFF_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /* Private Device Data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) struct lance_private {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) volatile struct lance_regs *ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) volatile struct lance_init_block *init_block; /* Hosts view */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) volatile struct lance_init_block *lance_init_block; /* Lance view */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) int rx_new, tx_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) int rx_old, tx_old;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) int lance_log_rx_bufs, lance_log_tx_bufs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) int rx_ring_mod_mask, tx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) int tpe; /* cable-selection is TPE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) int auto_select; /* cable-selection by carrier */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) unsigned short busmaster_regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct timer_list multicast_timer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define LANCE_ADDR(x) ((int)(x) & ~0xff000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Load the CSR registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static void load_csrs(struct lance_private *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) volatile struct lance_init_block *aib = lp->lance_init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) int leptr = LANCE_ADDR(aib);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) ll->rap = LE_CSR1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ll->rdp = (leptr & 0xFFFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) ll->rap = LE_CSR2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) ll->rdp = leptr >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ll->rap = LE_CSR3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) ll->rdp = lp->busmaster_regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Point back to csr0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Setup the Lance Rx and Tx rings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) static void lance_init_ring(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) volatile struct lance_init_block *aib = lp->lance_init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* for LANCE_ADDR computations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int leptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Lock out other processes while setting up hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) lp->rx_new = lp->tx_new = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) lp->rx_old = lp->tx_old = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) ib->mode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* Copy the ethernet address to the lance init block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * Note that on the sparc you need to swap the ethernet address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) ib->phys_addr[0] = dev->dev_addr[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ib->phys_addr[1] = dev->dev_addr[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ib->phys_addr[2] = dev->dev_addr[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) ib->phys_addr[3] = dev->dev_addr[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ib->phys_addr[4] = dev->dev_addr[5];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) ib->phys_addr[5] = dev->dev_addr[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* Setup the Tx ring entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) netdev_dbg(dev, "TX rings:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) for (i = 0; i <= 1 << lp->lance_log_tx_bufs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) leptr = LANCE_ADDR(&aib->tx_buf[i][0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ib->btx_ring[i].tmd0 = leptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) ib->btx_ring[i].tmd1_hadr = leptr >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) ib->btx_ring[i].tmd1_bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) ib->btx_ring[i].length = 0xf000; /* The ones required by tmd2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ib->btx_ring[i].misc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) if (i < 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) netdev_dbg(dev, "%d: 0x%08x\n", i, leptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) /* Setup the Rx ring entries */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) netdev_dbg(dev, "RX rings:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) for (i = 0; i < 1 << lp->lance_log_rx_bufs; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) leptr = LANCE_ADDR(&aib->rx_buf[i][0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) ib->brx_ring[i].rmd0 = leptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) ib->brx_ring[i].rmd1_hadr = leptr >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) ib->brx_ring[i].mblength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (i < 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) netdev_dbg(dev, "%d: 0x%08x\n", i, leptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* Setup the initialization block */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* Setup rx descriptor pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) leptr = LANCE_ADDR(&aib->brx_ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) ib->rx_len = (lp->lance_log_rx_bufs << 13) | (leptr >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) ib->rx_ptr = leptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) netdev_dbg(dev, "RX ptr: %08x\n", leptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /* Setup tx descriptor pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) leptr = LANCE_ADDR(&aib->btx_ring);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) ib->tx_len = (lp->lance_log_tx_bufs << 13) | (leptr >> 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) ib->tx_ptr = leptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) netdev_dbg(dev, "TX ptr: %08x\n", leptr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* Clear the multicast filter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) ib->filter[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) ib->filter[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) static int init_restart_lance(struct lance_private *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ll->rdp = LE_C0_INIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) /* Wait for the lance to complete initialization */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) for (i = 0; (i < 100) && !(ll->rdp & (LE_C0_ERR | LE_C0_IDON)); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) pr_err("unopened after %d ticks, csr0=%04x\n", i, ll->rdp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* Clear IDON by writing a "1", enable interrupts and start lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) ll->rdp = LE_C0_IDON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) ll->rdp = LE_C0_INEA | LE_C0_STRT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) static int lance_rx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) volatile struct lance_rx_desc *rd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) unsigned char bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) #ifdef TEST_HITS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) char buf[RX_RING_SIZE + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) for (i = 0; i < RX_RING_SIZE; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) char r1_own = ib->brx_ring[i].rmd1_bits & LE_R1_OWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (i == lp->rx_new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) buf[i] = r1_own ? '_' : 'X';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) buf[i] = r1_own ? '.' : '1';
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) buf[RX_RING_SIZE] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) pr_debug("RxRing TestHits: [%s]\n", buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) ll->rdp = LE_C0_RINT | LE_C0_INEA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) for (rd = &ib->brx_ring[lp->rx_new];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) !((bits = rd->rmd1_bits) & LE_R1_OWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) rd = &ib->brx_ring[lp->rx_new]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* We got an incomplete frame? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) if ((bits & LE_R1_POK) != LE_R1_POK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) dev->stats.rx_over_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) dev->stats.rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) } else if (bits & LE_R1_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Count only the end frame as a rx error,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * not the beginning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (bits & LE_R1_BUF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) dev->stats.rx_fifo_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (bits & LE_R1_CRC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) dev->stats.rx_crc_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) if (bits & LE_R1_OFL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) dev->stats.rx_over_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) if (bits & LE_R1_FRA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev->stats.rx_frame_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) if (bits & LE_R1_EOP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) dev->stats.rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) int len = (rd->mblength & 0xfff) - 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) struct sk_buff *skb = netdev_alloc_skb(dev, len + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (!skb) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) dev->stats.rx_dropped++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) rd->mblength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) rd->rmd1_bits = LE_R1_OWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) skb_reserve(skb, 2); /* 16 byte align */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) skb_put(skb, len); /* make room */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) skb_copy_to_linear_data(skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) (unsigned char *)&ib->rx_buf[lp->rx_new][0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) skb->protocol = eth_type_trans(skb, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) netif_rx(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) dev->stats.rx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) dev->stats.rx_bytes += len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* Return the packet to the pool */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) rd->mblength = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) rd->rmd1_bits = LE_R1_OWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) lp->rx_new = (lp->rx_new + 1) & lp->rx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int lance_tx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) volatile struct lance_tx_desc *td;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) /* csr0 is 2f3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) ll->rdp = LE_C0_TINT | LE_C0_INEA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) /* csr0 is 73 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) j = lp->tx_old;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) for (i = j; i != lp->tx_new; i = j) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) td = &ib->btx_ring[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* If we hit a packet not owned by us, stop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (td->tmd1_bits & LE_T1_OWN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) if (td->tmd1_bits & LE_T1_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) status = td->misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) dev->stats.tx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) if (status & LE_T3_RTY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) dev->stats.tx_aborted_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (status & LE_T3_LCOL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) dev->stats.tx_window_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (status & LE_T3_CLOS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) dev->stats.tx_carrier_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) if (lp->auto_select) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) lp->tpe = 1 - lp->tpe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) netdev_err(dev, "Carrier Lost, trying %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) lp->tpe ? "TPE" : "AUI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* Stop the lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) lance_init_ring(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) load_csrs(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) init_restart_lance(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* buffer errors and underflows turn off
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * the transmitter, so restart the adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) if (status & (LE_T3_BUF | LE_T3_UFL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dev->stats.tx_fifo_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) netdev_err(dev, "Tx: ERR_BUF|ERR_UFL, restarting\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) /* Stop the lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) lance_init_ring(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) load_csrs(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) init_restart_lance(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) } else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) /* So we don't count the packet more than once. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) td->tmd1_bits &= ~(LE_T1_POK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* One collision before packet was sent. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) if (td->tmd1_bits & LE_T1_EONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) dev->stats.collisions++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* More than one collision, be optimistic. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) if (td->tmd1_bits & LE_T1_EMORE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) dev->stats.collisions += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) dev->stats.tx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) j = (j + 1) & lp->tx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) lp->tx_old = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) ll->rdp = LE_C0_TINT | LE_C0_INEA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) static int lance_tx_buffs_avail(struct lance_private *lp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) if (lp->tx_old <= lp->tx_new)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) return lp->tx_old + lp->tx_ring_mod_mask - lp->tx_new;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) return lp->tx_old - lp->tx_new - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static irqreturn_t lance_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) struct net_device *dev = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) int csr0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) ll->rap = LE_CSR0; /* LANCE Controller Status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) csr0 = ll->rdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) if (!(csr0 & LE_C0_INTR)) /* Check if any interrupt has */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) return IRQ_NONE; /* been generated by the Lance. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) /* Acknowledge all the interrupt sources ASAP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) ll->rdp = csr0 & ~(LE_C0_INEA | LE_C0_TDMD | LE_C0_STOP | LE_C0_STRT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) LE_C0_INIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (csr0 & LE_C0_ERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* Clear the error condition */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) ll->rdp = LE_C0_BABL | LE_C0_ERR | LE_C0_MISS | LE_C0_INEA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (csr0 & LE_C0_RINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) lance_rx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (csr0 & LE_C0_TINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) lance_tx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) /* Log misc errors. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) if (csr0 & LE_C0_BABL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) dev->stats.tx_errors++; /* Tx babble. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (csr0 & LE_C0_MISS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) dev->stats.rx_errors++; /* Missed a Rx frame. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (csr0 & LE_C0_MERR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) netdev_err(dev, "Bus master arbitration failure, status %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) csr0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) /* Restart the chip. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) ll->rdp = LE_C0_STRT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (netif_queue_stopped(dev) && lance_tx_buffs_avail(lp) > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) ll->rdp = (LE_C0_BABL | LE_C0_CERR | LE_C0_MISS | LE_C0_MERR |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) LE_C0_IDON | LE_C0_INEA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static int lance_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) /* Stop the Lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) /* Install the Interrupt handler */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) ret = request_irq(IRQ_AMIGA_PORTS, lance_interrupt, IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) dev->name, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) load_csrs(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) lance_init_ring(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) return init_restart_lance(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static int lance_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) del_timer_sync(&lp->multicast_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) /* Stop the card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) free_irq(IRQ_AMIGA_PORTS, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static inline int lance_reset(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) int status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /* Stop the lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) load_csrs(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) lance_init_ring(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) netif_trans_update(dev); /* prevent tx timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) status = init_restart_lance(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) netdev_dbg(dev, "Lance restart=%d\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) static void lance_tx_timeout(struct net_device *dev, unsigned int txqueue)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) netdev_err(dev, "transmit timed out, status %04x, reset\n", ll->rdp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) lance_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) static netdev_tx_t lance_start_xmit(struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) int entry, skblen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) int status = NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) if (skb_padto(skb, ETH_ZLEN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) skblen = max_t(unsigned, skb->len, ETH_ZLEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) if (!lance_tx_buffs_avail(lp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) goto out_free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) /* dump the packet */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) print_hex_dump_debug("skb->data: ", DUMP_PREFIX_NONE, 16, 1, skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 64, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) entry = lp->tx_new & lp->tx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ib->btx_ring[entry].length = (-skblen) | 0xf000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) ib->btx_ring[entry].misc = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) skb_copy_from_linear_data(skb, (void *)&ib->tx_buf[entry][0], skblen);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) /* Now, give the packet to the lance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) lp->tx_new = (lp->tx_new+1) & lp->tx_ring_mod_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) dev->stats.tx_bytes += skblen;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (lance_tx_buffs_avail(lp) <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) /* Kick the lance: transmit now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) ll->rdp = LE_C0_INEA | LE_C0_TDMD;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) out_free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) dev_kfree_skb(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) /* taken from the depca driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) static void lance_load_multicast(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) volatile u16 *mcast_table = (u16 *)&ib->filter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) struct netdev_hw_addr *ha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) u32 crc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /* set all multicast bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) if (dev->flags & IFF_ALLMULTI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ib->filter[0] = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ib->filter[1] = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* clear the multicast filter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) ib->filter[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) ib->filter[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) /* Add addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) netdev_for_each_mc_addr(ha, dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) crc = ether_crc_le(6, ha->addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) crc = crc >> 26;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) mcast_table[crc >> 4] |= 1 << (crc & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static void lance_set_multicast(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) struct lance_private *lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) volatile struct lance_init_block *ib = lp->init_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) volatile struct lance_regs *ll = lp->ll;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) if (!netif_running(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) if (lp->tx_old != lp->tx_new) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) mod_timer(&lp->multicast_timer, jiffies + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) ll->rap = LE_CSR0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) ll->rdp = LE_C0_STOP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) lance_init_ring(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (dev->flags & IFF_PROMISC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) ib->mode |= LE_MO_PROM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ib->mode &= ~LE_MO_PROM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) lance_load_multicast(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) load_csrs(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) init_restart_lance(lp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) static void lance_set_multicast_retry(struct timer_list *t)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) struct lance_private *lp = from_timer(lp, t, multicast_timer);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) lance_set_multicast(lp->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) static int a2065_init_one(struct zorro_dev *z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) const struct zorro_device_id *ent);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static void a2065_remove_one(struct zorro_dev *z);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static const struct zorro_device_id a2065_zorro_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) { ZORRO_PROD_CBM_A2065_1 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) { ZORRO_PROD_CBM_A2065_2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) { ZORRO_PROD_AMERISTAR_A2065 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) { 0 }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) MODULE_DEVICE_TABLE(zorro, a2065_zorro_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static struct zorro_driver a2065_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .name = "a2065",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .id_table = a2065_zorro_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .probe = a2065_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .remove = a2065_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) static const struct net_device_ops lance_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .ndo_open = lance_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .ndo_stop = lance_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .ndo_start_xmit = lance_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .ndo_tx_timeout = lance_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) .ndo_set_rx_mode = lance_set_multicast,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static int a2065_init_one(struct zorro_dev *z,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) const struct zorro_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) struct lance_private *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) unsigned long board = z->resource.start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) unsigned long base_addr = board + A2065_LANCE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) unsigned long mem_start = board + A2065_RAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) struct resource *r1, *r2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) u32 serial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) r1 = request_mem_region(base_addr, sizeof(struct lance_regs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) "Am7990");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) if (!r1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) r2 = request_mem_region(mem_start, A2065_RAM_SIZE, "RAM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) if (!r2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) release_mem_region(base_addr, sizeof(struct lance_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) dev = alloc_etherdev(sizeof(struct lance_private));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (dev == NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) release_mem_region(base_addr, sizeof(struct lance_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) release_mem_region(mem_start, A2065_RAM_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) r1->name = dev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) r2->name = dev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) serial = be32_to_cpu(z->rom.er_SerialNumber);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) dev->dev_addr[0] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) if (z->id != ZORRO_PROD_AMERISTAR_A2065) { /* Commodore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) dev->dev_addr[1] = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) dev->dev_addr[2] = 0x10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) } else { /* Ameristar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) dev->dev_addr[1] = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) dev->dev_addr[2] = 0x9f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) dev->dev_addr[3] = (serial >> 16) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) dev->dev_addr[4] = (serial >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) dev->dev_addr[5] = serial & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) dev->base_addr = (unsigned long)ZTWO_VADDR(base_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) dev->mem_start = (unsigned long)ZTWO_VADDR(mem_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) dev->mem_end = dev->mem_start + A2065_RAM_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) priv->ll = (volatile struct lance_regs *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) priv->init_block = (struct lance_init_block *)dev->mem_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) priv->lance_init_block = (struct lance_init_block *)A2065_RAM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) priv->auto_select = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) priv->busmaster_regval = LE_C3_BSWP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) priv->lance_log_rx_bufs = LANCE_LOG_RX_BUFFERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) priv->lance_log_tx_bufs = LANCE_LOG_TX_BUFFERS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) priv->rx_ring_mod_mask = RX_RING_MOD_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) priv->tx_ring_mod_mask = TX_RING_MOD_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) priv->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) dev->netdev_ops = &lance_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) dev->watchdog_timeo = 5*HZ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) dev->dma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) timer_setup(&priv->multicast_timer, lance_set_multicast_retry, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) err = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) release_mem_region(base_addr, sizeof(struct lance_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) release_mem_region(mem_start, A2065_RAM_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) zorro_set_drvdata(z, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) netdev_info(dev, "A2065 at 0x%08lx, Ethernet Address %pM\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) board, dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) static void a2065_remove_one(struct zorro_dev *z)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) struct net_device *dev = zorro_get_drvdata(z);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) release_mem_region(ZTWO_PADDR(dev->base_addr),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) sizeof(struct lance_regs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) release_mem_region(ZTWO_PADDR(dev->mem_start), A2065_RAM_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static int __init a2065_init_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) return zorro_register_driver(&a2065_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) static void __exit a2065_cleanup_module(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) zorro_unregister_driver(&a2065_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) module_init(a2065_init_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) module_exit(a2065_cleanup_module);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) MODULE_LICENSE("GPL");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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