^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* A Linux device driver for PCI NE2000 clones.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Authors and other copyright holders:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * 1992-2000 by Donald Becker, NE2000 core and various modifications.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * 1995-1998 by Paul Gortmaker, core modifications and PCI support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright 1993 assigned to the United States Government as represented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * by the Director, National Security Agency.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * This software may be used and distributed according to the terms of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * the GNU General Public License (GPL), incorporated herein by reference.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Drivers based on or derived from this code fall under the GPL and must
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * retain the authorship, copyright and license notice. This file is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * a complete program and may only be used when the entire operating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * system is licensed under the GPL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The author may be reached as becker@scyld.com, or C/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Scyld Computing Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 410 Severn Ave., Suite 210
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Annapolis MD 21403
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * Issues remaining:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * People are making PCI NE2000 clones! Oh the horror, the horror...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * Limited full-duplex support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DRV_NAME "ne2k-pci"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define DRV_DESCRIPTION "PCI NE2000 clone driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define DRV_AUTHOR "Donald Becker / Paul Gortmaker"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define DRV_VERSION "1.03"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DRV_RELDATE "9/22/2003"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* The user-configurable values.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * These may be modified when a driver module is loaded.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* More are supported, limit only on options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MAX_UNITS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Used to pass the full-duplex flag, etc. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) static int full_duplex[MAX_UNITS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int options[MAX_UNITS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Force a non std. amount of memory. Units are 256 byte pages. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) /* #define PACKETBUF_MEMSIZE 0x40 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include "8390.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static int ne2k_msg_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static const int default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) NETIF_MSG_RX_ERR | NETIF_MSG_TX_ERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #if defined(__powerpc__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define inl_le(addr) le32_to_cpu(inl(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define inw_le(addr) le16_to_cpu(inw(addr))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) MODULE_AUTHOR(DRV_AUTHOR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MODULE_DESCRIPTION(DRV_DESCRIPTION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) MODULE_VERSION(DRV_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) module_param_named(msg_enable, ne2k_msg_enable, int, 0444);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) module_param_array(options, int, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) module_param_array(full_duplex, int, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MODULE_PARM_DESC(msg_enable, "Debug message level (see linux/netdevice.h for bitmap)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MODULE_PARM_DESC(options, "Bit 5: full duplex");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MODULE_PARM_DESC(full_duplex, "full duplex setting(s) (1)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Some defines that people can play with if so inclined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Use 32 bit data-movement operations instead of 16 bit. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define USE_LONGIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Do we implement the read before write bugfix ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* #define NE_RW_BUGFIX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /* Flags. We rename an existing ei_status field to store flags!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * Thus only the low 8 bits are usable for non-init-time flags.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define ne2k_flags reg0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) /* Chip can do only 16/32-bit xfers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ONLY_16BIT_IO = 8, ONLY_32BIT_IO = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /* User override. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) FORCE_FDX = 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) REALTEK_FDX = 0x40, HOLTEK_FDX = 0x80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) STOP_PG_0x60 = 0x100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) enum ne2k_pci_chipsets {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) CH_RealTek_RTL_8029 = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) CH_Winbond_89C940,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) CH_Compex_RL2000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) CH_KTI_ET32P2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) CH_NetVin_NV5000SC,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) CH_Via_86C926,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) CH_SureCom_NE34,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) CH_Winbond_W89C940F,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) CH_Holtek_HT80232,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) CH_Holtek_HT80229,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) CH_Winbond_89C940_8c4a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) } pci_clone_list[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {"RealTek RTL-8029(AS)", REALTEK_FDX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {"Winbond 89C940", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {"Compex RL2000", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) {"KTI ET32P2", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {"NetVin NV5000SC", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {"Via 86C926", ONLY_16BIT_IO},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) {"SureCom NE34", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) {"Winbond W89C940F", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) {"Holtek HT80232", ONLY_16BIT_IO | HOLTEK_FDX},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {"Holtek HT80229", ONLY_32BIT_IO | HOLTEK_FDX | STOP_PG_0x60 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {"Winbond W89C940(misprogrammed)", 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) {NULL,}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static const struct pci_device_id ne2k_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) { 0x10ec, 0x8029, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_RealTek_RTL_8029 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) { 0x1050, 0x0940, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) { 0x11f6, 0x1401, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Compex_RL2000 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) { 0x8e2e, 0x3000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_KTI_ET32P2 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) { 0x4a14, 0x5000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_NetVin_NV5000SC },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) { 0x1106, 0x0926, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Via_86C926 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) { 0x10bd, 0x0e34, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_SureCom_NE34 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) { 0x1050, 0x5a5a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_W89C940F },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) { 0x12c3, 0x0058, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80232 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) { 0x12c3, 0x5598, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Holtek_HT80229 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) { 0x8c4a, 0x1980, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CH_Winbond_89C940_8c4a },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) MODULE_DEVICE_TABLE(pci, ne2k_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* ---- No user-serviceable parts below ---- */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define NE_BASE (dev->base_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define NE_CMD 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define NE_DATAPORT 0x10 /* NatSemi-defined port window offset. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define NE_RESET 0x1f /* Issue a read to reset, a write to clear. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define NE_IO_EXTENT 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define NESM_START_PG 0x40 /* First page of TX buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define NESM_STOP_PG 0x80 /* Last page +1 of RX ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) static int ne2k_pci_open(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) static int ne2k_pci_close(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) static void ne2k_pci_reset_8390(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static void ne2k_pci_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) struct e8390_pkt_hdr *hdr, int ring_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) static void ne2k_pci_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) struct sk_buff *skb, int ring_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) static void ne2k_pci_block_output(struct net_device *dev, const int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) const unsigned char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) const int start_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) static const struct ethtool_ops ne2k_pci_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) /* There is no room in the standard 8390 structure for extra info we need,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * so we build a meta/outer-wrapper structure..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct ne2k_pci_card {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) struct pci_dev *pci_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) /* NEx000-clone boards have a Station Address (SA) PROM (SAPROM) in the packet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) * buffer memory space. By-the-spec NE2000 clones have 0x57,0x57 in bytes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * 0x0e,0x0f of the SAPROM, while other supposed NE2000 clones must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * detected by their SA prefix.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Reading the SAPROM from a word-wide card with the 8390 set in byte-wide
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * mode results in doubled values, which can be detected and compensated for.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * The probe is also responsible for initializing the card and filling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * in the 'dev' and 'ei_status' structures.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) static const struct net_device_ops ne2k_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .ndo_open = ne2k_pci_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .ndo_stop = ne2k_pci_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .ndo_start_xmit = ei_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) .ndo_tx_timeout = ei_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) .ndo_get_stats = ei_get_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .ndo_set_rx_mode = ei_set_multicast_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) #ifdef CONFIG_NET_POLL_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) .ndo_poll_controller = ei_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) static int ne2k_pci_init_one(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) unsigned char SA_prom[32];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) int start_page, stop_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) int irq, reg0, chip_idx = ent->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) static unsigned int fnd_cnt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) long ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) int flags = pci_clone_list[chip_idx].flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) struct ei_device *ei_local;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) fnd_cnt++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) i = pci_enable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ioaddr = pci_resource_start(pdev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) irq = pdev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) if (!ioaddr || ((pci_resource_flags(pdev, 0) & IORESOURCE_IO) == 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) dev_err(&pdev->dev, "no I/O resource at PCI BAR #0\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (!request_region(ioaddr, NE_IO_EXTENT, DRV_NAME)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev_err(&pdev->dev, "I/O resource 0x%x @ 0x%lx busy\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) NE_IO_EXTENT, ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) goto err_out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) reg0 = inb(ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (reg0 == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) goto err_out_free_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Do a preliminary verification that we have a 8390. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) int regd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) outb(E8390_NODMA + E8390_PAGE1 + E8390_STOP, ioaddr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) regd = inb(ioaddr + 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) outb(0xff, ioaddr + 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) outb(E8390_NODMA + E8390_PAGE0, ioaddr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /* Clear the counter by reading. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) inb(ioaddr + EN0_COUNTER0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) if (inb(ioaddr + EN0_COUNTER0) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) outb(reg0, ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Restore the old values. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) outb(regd, ioaddr + 0x0d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) goto err_out_free_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* Allocate net_device, dev->priv; fill in 8390 specific dev fields. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) dev = alloc_ei_netdev();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) dev_err(&pdev->dev, "cannot allocate ethernet device\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) goto err_out_free_res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) dev->netdev_ops = &ne2k_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) ei_local->msg_enable = netif_msg_init(ne2k_msg_enable, default_msg_level);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) SET_NETDEV_DEV(dev, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* Reset card. Who knows what dain-bramaged state it was left in. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) unsigned long reset_start_time = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) /* This looks like a horrible timing loop, but it should never
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * take more than a few cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) while ((inb(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* Limit wait: '2' avoids jiffy roll-over. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) if (jiffies - reset_start_time > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) dev_err(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) "Card failure (no reset ack).\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) goto err_out_free_netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /* Ack all intr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) outb(0xff, ioaddr + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) /* Read the 16 bytes of station address PROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) * We must first initialize registers, similar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) * to NS8390_init(eifdev, 0).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) * We can't reliably read the SAPROM address without this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) * (I learned the hard way!).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) struct {unsigned char value, offset; } program_seq[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /* Select page 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {E8390_NODMA + E8390_PAGE0 + E8390_STOP, E8390_CMD},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* Set word-wide access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) {0x49, EN0_DCFG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) /* Clear the count regs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) {0x00, EN0_RCNTLO},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* Mask completion IRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {0x00, EN0_RCNTHI},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) {0x00, EN0_IMR},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) {0xFF, EN0_ISR},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* 0x20 Set to monitor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) {E8390_RXOFF, EN0_RXCR},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* 0x02 and loopback mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) {E8390_TXOFF, EN0_TXCR},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) {32, EN0_RCNTLO},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) {0x00, EN0_RCNTHI},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* DMA starting at 0x0000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {0x00, EN0_RSARLO},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {0x00, EN0_RSARHI},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) {E8390_RREAD+E8390_START, E8390_CMD},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) for (i = 0; i < ARRAY_SIZE(program_seq); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) outb(program_seq[i].value,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) ioaddr + program_seq[i].offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) /* Note: all PCI cards have at least 16 bit access, so we don't have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) * to check for 8 bit cards. Most cards permit 32 bit access.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (flags & ONLY_32BIT_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) for (i = 0; i < 4 ; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ((u32 *)SA_prom)[i] = le32_to_cpu(inl(ioaddr + NE_DATAPORT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) for (i = 0; i < 32 /* sizeof(SA_prom )*/; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) SA_prom[i] = inb(ioaddr + NE_DATAPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) /* We always set the 8390 registers for word mode. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) outb(0x49, ioaddr + EN0_DCFG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) start_page = NESM_START_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) stop_page = flags & STOP_PG_0x60 ? 0x60 : NESM_STOP_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* Set up the rest of the parameters. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) dev->base_addr = ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) pci_set_drvdata(pdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ei_status.name = pci_clone_list[chip_idx].name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ei_status.tx_start_page = start_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ei_status.stop_page = stop_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) ei_status.word16 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ei_status.ne2k_flags = flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) if (fnd_cnt < MAX_UNITS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) if (full_duplex[fnd_cnt] > 0 || (options[fnd_cnt] & FORCE_FDX))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) ei_status.ne2k_flags |= FORCE_FDX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) ei_status.rx_start_page = start_page + TX_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) #ifdef PACKETBUF_MEMSIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* Allow the packet buffer size to be overridden by know-it-alls. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) ei_status.stop_page = ei_status.tx_start_page + PACKETBUF_MEMSIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) ei_status.reset_8390 = &ne2k_pci_reset_8390;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) ei_status.block_input = &ne2k_pci_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) ei_status.block_output = &ne2k_pci_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ei_status.get_8390_hdr = &ne2k_pci_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) ei_status.priv = (unsigned long) pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) dev->ethtool_ops = &ne2k_pci_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) NS8390_init(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) memcpy(dev->dev_addr, SA_prom, dev->addr_len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) i = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) goto err_out_free_netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) netdev_info(dev, "%s found at %#lx, IRQ %d, %pM.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) pci_clone_list[chip_idx].name, ioaddr, dev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) err_out_free_netdev:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) err_out_free_res:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) release_region(ioaddr, NE_IO_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) err_out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) /* Magic incantation sequence for full duplex on the supported cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) static inline int set_realtek_fdx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) long ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) outb(0xC0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) outb(0xC0, ioaddr + 0x01); /* Enable writes to CONFIG3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) outb(0x40, ioaddr + 0x06); /* Enable full duplex */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) outb(0x00, ioaddr + 0x01); /* Disable writes to CONFIG3 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) outb(E8390_PAGE0 + E8390_NODMA, ioaddr + NE_CMD); /* Page 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) static inline int set_holtek_fdx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) long ioaddr = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) outb(inb(ioaddr + 0x20) | 0x80, ioaddr + 0x20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) static int ne2k_pci_set_fdx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) if (ei_status.ne2k_flags & REALTEK_FDX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) return set_realtek_fdx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) else if (ei_status.ne2k_flags & HOLTEK_FDX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) return set_holtek_fdx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int ne2k_pci_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) int ret = request_irq(dev->irq, ei_interrupt, IRQF_SHARED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) dev->name, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) if (ei_status.ne2k_flags & FORCE_FDX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) ne2k_pci_set_fdx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) ei_open(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) static int ne2k_pci_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) ei_close(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) /* Hard reset the card. This used to pause for the same period that a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * 8390 reset command required, but that shouldn't be necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) static void ne2k_pci_reset_8390(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) unsigned long reset_start_time = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) netif_dbg(ei_local, hw, dev, "resetting the 8390 t=%ld...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) jiffies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) outb(inb(NE_BASE + NE_RESET), NE_BASE + NE_RESET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) ei_status.txing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) ei_status.dmaing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) /* This check _should_not_ be necessary, omit eventually. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) while ((inb(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) if (jiffies - reset_start_time > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) netdev_err(dev, "%s did not complete.\n", __func__);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* Ack intr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) outb(ENISR_RESET, NE_BASE + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) /* Grab the 8390 specific header. Similar to the block_input routine, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) * we don't need to be concerned with ring wrap as the header will be at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) * the start of a page, so we optimize accordingly.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) static void ne2k_pci_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) struct e8390_pkt_hdr *hdr, int ring_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) long nic_base = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /* This *shouldn't* happen. If it does, it's the last thing you'll see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (ei_status.dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d].\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) __func__, ei_status.dmaing, ei_status.irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) ei_status.dmaing |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) outb(sizeof(struct e8390_pkt_hdr), nic_base + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) outb(0, nic_base + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) outb(0, nic_base + EN0_RSARLO); /* On page boundary */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) outb(ring_page, nic_base + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) insw(NE_BASE + NE_DATAPORT, hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) sizeof(struct e8390_pkt_hdr) >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) *(u32 *)hdr = le32_to_cpu(inl(NE_BASE + NE_DATAPORT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) le16_to_cpus(&hdr->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) /* Ack intr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) outb(ENISR_RDC, nic_base + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) ei_status.dmaing &= ~0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) /* Block input and output, similar to the Crynwr packet driver. If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) *are porting to a new ethercard, look at the packet driver source for hints.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) *The NEx000 doesn't share the on-board packet memory -- you have to put
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) *the packet out through the "remote DMA" dataport using outb.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) static void ne2k_pci_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) struct sk_buff *skb, int ring_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) long nic_base = dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) char *buf = skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* This *shouldn't* happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) * If it does, it's the last thing you'll see.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (ei_status.dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) __func__, ei_status.dmaing, ei_status.irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ei_status.dmaing |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) if (ei_status.ne2k_flags & ONLY_32BIT_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) count = (count + 3) & 0xFFFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) outb(E8390_NODMA + E8390_PAGE0 + E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) outb(count & 0xff, nic_base + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) outb(count >> 8, nic_base + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) outb(ring_offset & 0xff, nic_base + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) outb(ring_offset >> 8, nic_base + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) outb(E8390_RREAD + E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) insw(NE_BASE + NE_DATAPORT, buf, count >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) if (count & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) buf[count-1] = inb(NE_BASE + NE_DATAPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) insl(NE_BASE + NE_DATAPORT, buf, count >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (count & 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) buf += count & ~3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) if (count & 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) __le16 *b = (__le16 *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) *b++ = cpu_to_le16(inw(NE_BASE + NE_DATAPORT));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) buf = (char *)b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) if (count & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) *buf = inb(NE_BASE + NE_DATAPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* Ack intr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) outb(ENISR_RDC, nic_base + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) ei_status.dmaing &= ~0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) static void ne2k_pci_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) const unsigned char *buf, const int start_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) long nic_base = NE_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) unsigned long dma_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) /* On little-endian it's always safe to round the count up for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * word writes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) if (ei_status.ne2k_flags & ONLY_32BIT_IO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) count = (count + 3) & 0xFFFC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) if (count & 0x01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) /* This *shouldn't* happen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) * If it does, it's the last thing you'll see.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) if (ei_status.dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) netdev_err(dev, "DMAing conflict in %s [DMAstat:%d][irqlock:%d]\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) __func__, ei_status.dmaing, ei_status.irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) ei_status.dmaing |= 0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) /* We should already be in page 0, but to be safe... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) outb(E8390_PAGE0+E8390_START+E8390_NODMA, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) #ifdef NE8390_RW_BUGFIX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) /* Handle the read-before-write bug the same way as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * Crynwr packet driver -- the NatSemi method doesn't work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * Actually this doesn't always work either, but if you have
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * problems with your NEx000 this is better than nothing!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) outb(0x42, nic_base + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) outb(0x00, nic_base + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) outb(0x42, nic_base + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) outb(0x00, nic_base + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) outb(E8390_RREAD+E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) outb(ENISR_RDC, nic_base + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) /* Now the normal output. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) outb(count & 0xff, nic_base + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) outb(count >> 8, nic_base + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) outb(0x00, nic_base + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) outb(start_page, nic_base + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) outb(E8390_RWRITE+E8390_START, nic_base + NE_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) if (ei_status.ne2k_flags & ONLY_16BIT_IO) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) outsw(NE_BASE + NE_DATAPORT, buf, count >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) outsl(NE_BASE + NE_DATAPORT, buf, count >> 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) if (count & 3) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) buf += count & ~3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) if (count & 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) __le16 *b = (__le16 *)buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) outw(le16_to_cpu(*b++), NE_BASE + NE_DATAPORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) buf = (char *)b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) dma_start = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) while ((inb(nic_base + EN0_ISR) & ENISR_RDC) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /* Avoid clock roll-over. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) if (jiffies - dma_start > 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) netdev_warn(dev, "timeout waiting for Tx RDC.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ne2k_pci_reset_8390(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) NS8390_init(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /* Ack intr. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) outb(ENISR_RDC, nic_base + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ei_status.dmaing &= ~0x01;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) static void ne2k_pci_get_drvinfo(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) struct ethtool_drvinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) struct ei_device *ei = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) struct pci_dev *pci_dev = (struct pci_dev *) ei->priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) strscpy(info->driver, DRV_NAME, sizeof(info->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) strscpy(info->version, DRV_VERSION, sizeof(info->version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) strscpy(info->bus_info, pci_name(pci_dev), sizeof(info->bus_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) static u32 ne2k_pci_get_msglevel(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) return ei_local->msg_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) static void ne2k_pci_set_msglevel(struct net_device *dev, u32 v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) ei_local->msg_enable = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) static const struct ethtool_ops ne2k_pci_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) .get_drvinfo = ne2k_pci_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) .get_msglevel = ne2k_pci_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .set_msglevel = ne2k_pci_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) static void ne2k_pci_remove_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) struct net_device *dev = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) BUG_ON(!dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) release_region(dev->base_addr, NE_IO_EXTENT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) pci_disable_device(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) static int __maybe_unused ne2k_pci_suspend(struct device *dev_d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) struct net_device *dev = dev_get_drvdata(dev_d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) netif_device_detach(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) static int __maybe_unused ne2k_pci_resume(struct device *dev_d)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) struct net_device *dev = dev_get_drvdata(dev_d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) NS8390_init(dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) netif_device_attach(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) static SIMPLE_DEV_PM_OPS(ne2k_pci_pm_ops, ne2k_pci_suspend, ne2k_pci_resume);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static struct pci_driver ne2k_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .probe = ne2k_pci_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) .remove = ne2k_pci_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .id_table = ne2k_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) .driver.pm = &ne2k_pci_pm_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) static int __init ne2k_pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) return pci_register_driver(&ne2k_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) static void __exit ne2k_pci_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) pci_unregister_driver(&ne2k_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) module_init(ne2k_pci_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) module_exit(ne2k_pci_cleanup);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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