^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* mac8390.c: New driver for 8390-based Nubus (or Nubus-alike)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Ethernet cards on Linux */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) /* Based on the former daynaport.c driver, by Alan Cox. Some code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) taken from or inspired by skeleton.c by Donald Becker, acenic.c by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Jes Sorensen, and ne2k-pci.c by Donald Becker and Paul Gortmaker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) This software may be used and distributed according to the terms of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) the GNU Public License, incorporated herein by reference. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* 2000-02-28: support added for Dayna and Kinetics cards by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) A.G.deWijn@phys.uu.nl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* 2000-04-04: support added for Dayna2 by bart@etpmod.phys.tue.nl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* 2001-04-18: support for DaynaPort E/LC-M by rayk@knightsmanor.org */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* 2001-05-15: support for Cabletron ported from old daynaport driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * and fixed access to Sonic Sys card which masquerades as a Farallon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * by rayk@knightsmanor.org */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /* 2002-12-30: Try to support more cards, some clues from NetBSD driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /* 2003-12-26: Make sure Asante cards always work. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/nubus.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/dma.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/hwtest.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static char version[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) "v0.4 2001-05-15 David Huggins-Daines <dhd@debian.org> and others\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define EI_SHIFT(x) (ei_local->reg_offset[x])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define ei_inb(port) in_8(port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define ei_outb(val, port) out_8(port, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define ei_inb_p(port) in_8(port)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ei_outb_p(val, port) out_8(port, val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include "lib8390.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define WD_START_PG 0x00 /* First page of TX buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define CABLETRON_RX_START_PG 0x00 /* First page of RX buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define CABLETRON_RX_STOP_PG 0x30 /* Last page +1 of RX ring */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define CABLETRON_TX_START_PG CABLETRON_RX_STOP_PG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* First page of TX buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * Unfortunately it seems we have to hardcode these for the moment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * Shouldn't the card know about this?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * Does anyone know where to read it off the card?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Do we trust the data provided by the card?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define DAYNA_8390_BASE 0x80000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define DAYNA_8390_MEM 0x00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define CABLETRON_8390_BASE 0x90000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define CABLETRON_8390_MEM 0x00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define INTERLAN_8390_BASE 0xE0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INTERLAN_8390_MEM 0xD0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) enum mac8390_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) MAC8390_NONE = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) MAC8390_APPLE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) MAC8390_ASANTE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) MAC8390_FARALLON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) MAC8390_CABLETRON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) MAC8390_DAYNA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) MAC8390_INTERLAN,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MAC8390_KINETICS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static const char *cardname[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "apple",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) "asante",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) "farallon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) "cabletron",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) "dayna",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) "interlan",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) "kinetics",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static const int word16[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) 1, /* apple */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 1, /* asante */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 1, /* farallon */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 1, /* cabletron */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 0, /* dayna */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 1, /* interlan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 0, /* kinetics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) /* on which cards do we use NuBus resources? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const int useresources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 1, /* apple */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 1, /* asante */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 1, /* farallon */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 0, /* cabletron */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 0, /* dayna */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 0, /* interlan */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 0, /* kinetics */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) enum mac8390_access {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ACCESS_UNKNOWN = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) ACCESS_32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) ACCESS_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) extern int mac8390_memtest(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static int mac8390_initdev(struct net_device *dev, struct nubus_board *board,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) enum mac8390_type type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) static int mac8390_open(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static int mac8390_close(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) static void mac8390_no_reset(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static void interlan_reset(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Sane (32-bit chunk memory read/write) - Some Farallon and Apple do this*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static void sane_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct e8390_pkt_hdr *hdr, int ring_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static void sane_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) struct sk_buff *skb, int ring_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) static void sane_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) const unsigned char *buf, const int start_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* dayna_memcpy to and from card */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) static void dayna_memcpy_fromcard(struct net_device *dev, void *to,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) int from, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static void dayna_memcpy_tocard(struct net_device *dev, int to,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) const void *from, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* Dayna - Dayna/Kinetics use this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void dayna_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct e8390_pkt_hdr *hdr, int ring_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static void dayna_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) struct sk_buff *skb, int ring_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) static void dayna_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) const unsigned char *buf, int start_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) /* Slow Sane (16-bit chunk memory read/write) Cabletron uses this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static void slow_sane_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) struct e8390_pkt_hdr *hdr, int ring_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static void slow_sane_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct sk_buff *skb, int ring_offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) static void slow_sane_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) const unsigned char *buf, int start_page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static void word_memcpy_tocard(unsigned long tp, const void *fp, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static void word_memcpy_fromcard(void *tp, unsigned long fp, int count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) static enum mac8390_type mac8390_ident(struct nubus_rsrc *fres)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) switch (fres->dr_sw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) case NUBUS_DRSW_3COM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) switch (fres->dr_hw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) case NUBUS_DRHW_APPLE_SONIC_NB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) case NUBUS_DRHW_APPLE_SONIC_LC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) case NUBUS_DRHW_SONNET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return MAC8390_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) return MAC8390_APPLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) case NUBUS_DRSW_APPLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) switch (fres->dr_hw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case NUBUS_DRHW_ASANTE_LC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return MAC8390_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) case NUBUS_DRHW_CABLETRON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) return MAC8390_CABLETRON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) return MAC8390_APPLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) case NUBUS_DRSW_ASANTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) return MAC8390_ASANTE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) case NUBUS_DRSW_TECHWORKS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) case NUBUS_DRSW_DAYNA2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) case NUBUS_DRSW_DAYNA_LC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) if (fres->dr_hw == NUBUS_DRHW_CABLETRON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) return MAC8390_CABLETRON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) return MAC8390_APPLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) case NUBUS_DRSW_FARALLON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) return MAC8390_FARALLON;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) case NUBUS_DRSW_KINETICS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) switch (fres->dr_hw) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) case NUBUS_DRHW_INTERLAN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return MAC8390_INTERLAN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) return MAC8390_KINETICS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) case NUBUS_DRSW_DAYNA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * These correspond to Dayna Sonic cards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) * which use the macsonic driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) if (fres->dr_hw == NUBUS_DRHW_SMC9194 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) fres->dr_hw == NUBUS_DRHW_INTERLAN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) return MAC8390_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) return MAC8390_DAYNA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) return MAC8390_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) static enum mac8390_access mac8390_testio(unsigned long membase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) u32 outdata = 0xA5A0B5B0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) u32 indata = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) /* Try writing 32 bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) nubus_writel(outdata, membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* Now read it back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) indata = nubus_readl(membase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) if (outdata == indata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return ACCESS_32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) outdata = 0xC5C0D5D0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) indata = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* Write 16 bit output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) word_memcpy_tocard(membase, &outdata, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) /* Now read it back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) word_memcpy_fromcard(&indata, membase, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) if (outdata == indata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return ACCESS_16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) return ACCESS_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static int mac8390_memsize(unsigned long membase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) /* Check up to 32K in 4K increments */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) volatile unsigned short *m = (unsigned short *)(membase + (i * 0x1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) /* Unwriteable - we have a fully decoded card and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) RAM end located */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (hwreg_present(m) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* write a distinctive byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) *m = 0xA5A0 | i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* check that we read back what we wrote */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (*m != (0xA5A0 | i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) /* check for partial decode and wrap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) for (j = 0; j < i; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) volatile unsigned short *p = (unsigned short *)(membase + (j * 0x1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) if (*p != (0xA5A0 | j))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * in any case, we stopped once we tried one block too many,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) * or once we reached 32K
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) return i * 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static bool mac8390_rsrc_init(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) struct nubus_rsrc *fres,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) enum mac8390_type cardtype)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) struct nubus_board *board = fres->board;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) struct nubus_dir dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) struct nubus_dirent ent;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) int offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) volatile unsigned short *i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) dev->irq = SLOT2IRQ(board->slot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) /* This is getting to be a habit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) dev->base_addr = board->slot_addr | ((board->slot & 0xf) << 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * Get some Nubus info - we will trust the card's idea
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * of where its memory and registers are.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) if (nubus_get_func_dir(fres, &dir) == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dev_err(&board->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) "Unable to get Nubus functional directory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /* Get the MAC address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) if (nubus_find_rsrc(&dir, NUBUS_RESID_MAC_ADDRESS, &ent) == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) dev_info(&board->dev, "MAC address resource not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) nubus_get_rsrc_mem(dev->dev_addr, &ent, 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) if (useresources[cardtype] == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) nubus_rewinddir(&dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (nubus_find_rsrc(&dir, NUBUS_RESID_MINOR_BASEOS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) &ent) == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) dev_err(&board->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) "Memory offset resource not found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) nubus_get_rsrc_mem(&offset, &ent, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) dev->mem_start = dev->base_addr + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* yes, this is how the Apple driver does it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) dev->base_addr = dev->mem_start + 0x10000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) nubus_rewinddir(&dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) if (nubus_find_rsrc(&dir, NUBUS_RESID_MINOR_LENGTH,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) &ent) == -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) dev_info(&board->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) "Memory length resource not found, probing\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) offset = mac8390_memsize(dev->mem_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) nubus_get_rsrc_mem(&offset, &ent, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) dev->mem_end = dev->mem_start + offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) switch (cardtype) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) case MAC8390_KINETICS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) case MAC8390_DAYNA: /* it's the same */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) dev->base_addr = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) DAYNA_8390_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) dev->mem_start = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) DAYNA_8390_MEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) dev->mem_end = dev->mem_start +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) mac8390_memsize(dev->mem_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) case MAC8390_INTERLAN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) dev->base_addr = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) INTERLAN_8390_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) dev->mem_start = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) INTERLAN_8390_MEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) dev->mem_end = dev->mem_start +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) mac8390_memsize(dev->mem_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) case MAC8390_CABLETRON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) dev->base_addr = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) CABLETRON_8390_BASE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) dev->mem_start = (int)(board->slot_addr +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) CABLETRON_8390_MEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) /* The base address is unreadable if 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * has been written to the command register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * Reset the chip by writing E8390_NODMA +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * E8390_PAGE0 + E8390_STOP just to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * sure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) i = (void *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) *i = 0x21;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) dev->mem_end = dev->mem_start +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) mac8390_memsize(dev->mem_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) dev_err(&board->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) "No known base address for card type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) static int mac8390_device_probe(struct nubus_board *board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) int err = -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) struct nubus_rsrc *fres;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) enum mac8390_type cardtype = MAC8390_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) dev = ____alloc_ei_netdev(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) SET_NETDEV_DEV(dev, &board->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) for_each_board_func_rsrc(board, fres) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) if (fres->category != NUBUS_CAT_NETWORK ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) fres->type != NUBUS_TYPE_ETHERNET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) cardtype = mac8390_ident(fres);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) if (cardtype == MAC8390_NONE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (mac8390_rsrc_init(dev, fres, cardtype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) if (!fres)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) err = mac8390_initdev(dev, board, cardtype);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) err = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) nubus_set_drvdata(board, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) static int mac8390_device_remove(struct nubus_board *board)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) struct net_device *dev = nubus_get_drvdata(board);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) static struct nubus_driver mac8390_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) .probe = mac8390_device_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) .remove = mac8390_device_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .name = KBUILD_MODNAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .owner = THIS_MODULE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) MODULE_AUTHOR("David Huggins-Daines <dhd@debian.org> and others");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) MODULE_DESCRIPTION("Macintosh NS8390-based Nubus Ethernet driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) static int __init mac8390_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) return nubus_driver_register(&mac8390_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) module_init(mac8390_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) static void __exit mac8390_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) nubus_driver_unregister(&mac8390_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) module_exit(mac8390_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) static const struct net_device_ops mac8390_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .ndo_open = mac8390_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .ndo_stop = mac8390_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) .ndo_start_xmit = __ei_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) .ndo_tx_timeout = __ei_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .ndo_get_stats = __ei_get_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .ndo_set_rx_mode = __ei_set_multicast_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #ifdef CONFIG_NET_POLL_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) .ndo_poll_controller = __ei_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) static int mac8390_initdev(struct net_device *dev, struct nubus_board *board,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) enum mac8390_type type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) static u32 fwrd4_offsets[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) 0, 4, 8, 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 16, 20, 24, 28,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 32, 36, 40, 44,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 48, 52, 56, 60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) static u32 back4_offsets[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) 60, 56, 52, 48,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 44, 40, 36, 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) 28, 24, 20, 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 12, 8, 4, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) static u32 fwrd2_offsets[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) 0, 2, 4, 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 8, 10, 12, 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) 16, 18, 20, 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 24, 26, 28, 30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) int access_bitmode = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* Now fill in our stuff */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) dev->netdev_ops = &mac8390_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) /* GAR, ei_status is actually a macro even though it looks global */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) ei_status.name = cardname[type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) ei_status.word16 = word16[type];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* Cabletron's TX/RX buffers are backwards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (type == MAC8390_CABLETRON) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ei_status.tx_start_page = CABLETRON_TX_START_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) ei_status.rx_start_page = CABLETRON_RX_START_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) ei_status.stop_page = CABLETRON_RX_STOP_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ei_status.rmem_start = dev->mem_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ei_status.rmem_end = dev->mem_start + CABLETRON_RX_STOP_PG*256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ei_status.tx_start_page = WD_START_PG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ei_status.rx_start_page = WD_START_PG + TX_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) ei_status.stop_page = (dev->mem_end - dev->mem_start)/256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) ei_status.rmem_start = dev->mem_start + TX_PAGES*256;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) ei_status.rmem_end = dev->mem_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /* Fill in model-specific information and functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) switch (type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) case MAC8390_FARALLON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) case MAC8390_APPLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) switch (mac8390_testio(dev->mem_start)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) case ACCESS_UNKNOWN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) dev_err(&board->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) "Don't know how to access card memory\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) case ACCESS_16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) /* 16 bit card, register map is reversed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) ei_status.reset_8390 = mac8390_no_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) ei_status.block_input = slow_sane_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) ei_status.block_output = slow_sane_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) ei_status.get_8390_hdr = slow_sane_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) ei_status.reg_offset = back4_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) case ACCESS_32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* 32 bit card, register map is reversed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) ei_status.reset_8390 = mac8390_no_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) ei_status.block_input = sane_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) ei_status.block_output = sane_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) ei_status.get_8390_hdr = sane_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) ei_status.reg_offset = back4_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) access_bitmode = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) case MAC8390_ASANTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) /* Some Asante cards pass the 32 bit test
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) * but overwrite system memory when run at 32 bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * so we run them all at 16 bit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ei_status.reset_8390 = mac8390_no_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) ei_status.block_input = slow_sane_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) ei_status.block_output = slow_sane_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) ei_status.get_8390_hdr = slow_sane_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) ei_status.reg_offset = back4_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) case MAC8390_CABLETRON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* 16 bit card, register map is short forward */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) ei_status.reset_8390 = mac8390_no_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) ei_status.block_input = slow_sane_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) ei_status.block_output = slow_sane_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) ei_status.get_8390_hdr = slow_sane_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) ei_status.reg_offset = fwrd2_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) case MAC8390_DAYNA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) case MAC8390_KINETICS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) /* 16 bit memory, register map is forward */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) /* dayna and similar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) ei_status.reset_8390 = mac8390_no_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ei_status.block_input = dayna_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) ei_status.block_output = dayna_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) ei_status.get_8390_hdr = dayna_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) ei_status.reg_offset = fwrd4_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) case MAC8390_INTERLAN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) /* 16 bit memory, register map is forward */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) ei_status.reset_8390 = interlan_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) ei_status.block_input = slow_sane_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) ei_status.block_output = slow_sane_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) ei_status.get_8390_hdr = slow_sane_get_8390_hdr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) ei_status.reg_offset = fwrd4_offsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) dev_err(&board->dev, "Unsupported card type\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) __NS8390_init(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) /* Good, done, now spit out some messages */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) dev_info(&board->dev, "%s (type %s)\n", board->name, cardname[type]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) dev_info(&board->dev, "MAC %pM, IRQ %d, %d KB shared memory at %#lx, %d-bit access.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) dev->dev_addr, dev->irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) (unsigned int)(dev->mem_end - dev->mem_start) >> 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) dev->mem_start, access_bitmode ? 32 : 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) static int mac8390_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) __ei_open(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) err = request_irq(dev->irq, __ei_interrupt, 0, "8390 Ethernet", dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) pr_err("%s: unable to get IRQ %d\n", dev->name, dev->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static int mac8390_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) __ei_close(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static void mac8390_no_reset(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ei_status.txing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) netif_info(ei_local, hw, dev, "reset not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) static void interlan_reset(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) unsigned char *target = nubus_slot_addr(IRQ2SLOT(dev->irq));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) netif_info(ei_local, hw, dev, "Need to reset the NS8390 t=%lu...",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) jiffies);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ei_status.txing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) target[0xC0000] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) if (netif_msg_hw(ei_local))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) pr_cont("reset complete\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) /* dayna_memcpy_fromio/dayna_memcpy_toio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) /* directly from daynaport.c by Alan Cox */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) static void dayna_memcpy_fromcard(struct net_device *dev, void *to, int from,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) volatile unsigned char *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) unsigned char *target = to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) from <<= 1; /* word, skip overhead */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) ptr = (unsigned char *)(dev->mem_start+from);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) /* Leading byte? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) if (from & 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) *target++ = ptr[-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) ptr += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) while (count >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) *(unsigned short *)target = *(unsigned short volatile *)ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) ptr += 4; /* skip cruft */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) target += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /* Trailing byte? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) if (count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) *target = *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) static void dayna_memcpy_tocard(struct net_device *dev, int to,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) const void *from, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) volatile unsigned short *ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) const unsigned char *src = from;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) to <<= 1; /* word, skip overhead */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) ptr = (unsigned short *)(dev->mem_start+to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) /* Leading byte? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) if (to & 2) { /* avoid a byte write (stomps on other data) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) ptr[-1] = (ptr[-1]&0xFF00)|*src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) ptr++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) count--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) while (count >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) *ptr++ = *(unsigned short *)src; /* Copy and */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) ptr++; /* skip cruft */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) src += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) count -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* Trailing byte? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) if (count) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /* card doesn't like byte writes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) *ptr = (*ptr & 0x00FF) | (*src << 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) /* sane block input/output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) static void sane_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) struct e8390_pkt_hdr *hdr, int ring_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) unsigned long hdr_start = (ring_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) memcpy_fromio(hdr, (void __iomem *)dev->mem_start + hdr_start, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) /* Fix endianness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) hdr->count = swab16(hdr->count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) static void sane_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) struct sk_buff *skb, int ring_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) unsigned long xfer_base = ring_offset - (WD_START_PG<<8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) unsigned long xfer_start = xfer_base + dev->mem_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) if (xfer_start + count > ei_status.rmem_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) /* We must wrap the input move. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) int semi_count = ei_status.rmem_end - xfer_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) memcpy_fromio(skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) (void __iomem *)dev->mem_start + xfer_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) semi_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) count -= semi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) memcpy_fromio(skb->data + semi_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) (void __iomem *)ei_status.rmem_start, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) memcpy_fromio(skb->data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) (void __iomem *)dev->mem_start + xfer_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static void sane_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) const unsigned char *buf, int start_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) long shmem = (start_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) memcpy_toio((void __iomem *)dev->mem_start + shmem, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) /* dayna block input/output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) static void dayna_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) struct e8390_pkt_hdr *hdr, int ring_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) unsigned long hdr_start = (ring_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) dayna_memcpy_fromcard(dev, hdr, hdr_start, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) /* Fix endianness */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) hdr->count = (hdr->count & 0xFF) << 8 | (hdr->count >> 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) static void dayna_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) struct sk_buff *skb, int ring_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) unsigned long xfer_base = ring_offset - (WD_START_PG<<8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) unsigned long xfer_start = xfer_base+dev->mem_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) /* Note the offset math is done in card memory space which is word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) per long onto our space. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) if (xfer_start + count > ei_status.rmem_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) /* We must wrap the input move. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) int semi_count = ei_status.rmem_end - xfer_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) dayna_memcpy_fromcard(dev, skb->data, xfer_base, semi_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) count -= semi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) dayna_memcpy_fromcard(dev, skb->data + semi_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ei_status.rmem_start - dev->mem_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) dayna_memcpy_fromcard(dev, skb->data, xfer_base, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static void dayna_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) const unsigned char *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) int start_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) long shmem = (start_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) dayna_memcpy_tocard(dev, shmem, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) /* Cabletron block I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) static void slow_sane_get_8390_hdr(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) struct e8390_pkt_hdr *hdr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) int ring_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) unsigned long hdr_start = (ring_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) word_memcpy_fromcard(hdr, dev->mem_start + hdr_start, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) /* Register endianism - fix here rather than 8390.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) hdr->count = (hdr->count&0xFF)<<8|(hdr->count>>8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) static void slow_sane_block_input(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) struct sk_buff *skb, int ring_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) unsigned long xfer_base = ring_offset - (WD_START_PG<<8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) unsigned long xfer_start = xfer_base+dev->mem_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) if (xfer_start + count > ei_status.rmem_end) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) /* We must wrap the input move. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) int semi_count = ei_status.rmem_end - xfer_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) word_memcpy_fromcard(skb->data, dev->mem_start + xfer_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) semi_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) count -= semi_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) word_memcpy_fromcard(skb->data + semi_count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) ei_status.rmem_start, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) word_memcpy_fromcard(skb->data, dev->mem_start + xfer_base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) static void slow_sane_block_output(struct net_device *dev, int count,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) const unsigned char *buf, int start_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) long shmem = (start_page - WD_START_PG)<<8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) word_memcpy_tocard(dev->mem_start + shmem, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) static void word_memcpy_tocard(unsigned long tp, const void *fp, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) volatile unsigned short *to = (void *)tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) const unsigned short *from = fp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) count /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) while (count--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) *to++ = *from++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) static void word_memcpy_fromcard(void *tp, unsigned long fp, int count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) unsigned short *to = tp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) const volatile unsigned short *from = (const void *)fp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) count /= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) while (count--)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) *to++ = *from++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags