^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/drivers/acorn/net/etherh.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2000-2002 Russell King
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * NS8390 I-cubed EtherH and ANT EtherM specific driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Thanks to I-Cubed for information on their cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * EtherM conversion (C) 1999 Chris Kemp and Tim Watterton
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * EtherM integration (C) 2000 Aleph One Ltd (Tak-Shing Chan)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * EtherM integration re-engineered by Russell King.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Changelog:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * 08-12-1996 RMK 1.00 Created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * RMK 1.03 Added support for EtherLan500 cards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * 23-11-1997 RMK 1.04 Added media autodetection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 16-04-1998 RMK 1.05 Improved media autodetection
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 10-02-2000 RMK 1.06 Updated for 2.3.43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 13-05-2000 RMK 1.07 Updated for 2.3.99-pre8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 12-10-1999 CK/TEW EtherM driver first release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * 21-12-2000 TTC EtherH/EtherM integration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * 25-12-2000 RMK 1.08 Clean integration of EtherM into this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 03-01-2002 RMK 1.09 Always enable IRQs if we're in the nic slot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/in.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/ethtool.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/jiffies.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/ecard.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/system_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define EI_SHIFT(x) (ei_local->reg_offset[x])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define ei_inb(_p) readb((void __iomem *)_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define ei_outb(_v,_p) writeb(_v,(void __iomem *)_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define ei_inb_p(_p) readb((void __iomem *)_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define ei_outb_p(_v,_p) writeb(_v,(void __iomem *)_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define DRV_NAME "etherh"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define DRV_VERSION "1.11"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static char version[] =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) "EtherH/EtherM Driver (c) 2002-2004 Russell King " DRV_VERSION "\n";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include "lib8390.c"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct etherh_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) void __iomem *ioc_fast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void __iomem *memc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void __iomem *dma_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) unsigned int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void __iomem *ctrl_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) unsigned char ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) u32 supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct etherh_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) unsigned long ns8390_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned long dataport_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned long ctrlport_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int ctrl_ioc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) const char name[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u32 supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned char tx_start_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) unsigned char stop_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) MODULE_AUTHOR("Russell King");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) MODULE_DESCRIPTION("EtherH/EtherM driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define ETHERH500_DATAPORT 0x800 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define ETHERH500_NS8390 0x000 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define ETHERH500_CTRLPORT 0x800 /* IOC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define ETHERH600_DATAPORT 0x040 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #define ETHERH600_NS8390 0x800 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define ETHERH600_CTRLPORT 0x200 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define ETHERH_CP_IE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define ETHERH_CP_IF 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define ETHERH_CP_HEARTBEAT 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define ETHERH_TX_START_PAGE 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define ETHERH_STOP_PAGE 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * These came from CK/TEW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define ETHERM_DATAPORT 0x200 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define ETHERM_NS8390 0x800 /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define ETHERM_CTRLPORT 0x23c /* MEMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define ETHERM_TX_START_PAGE 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define ETHERM_STOP_PAGE 127
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* ------------------------------------------------------------------------ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define etherh_priv(dev) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) ((struct etherh_priv *)(((char *)netdev_priv(dev)) + sizeof(struct ei_device)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static inline void etherh_set_ctrl(struct etherh_priv *eh, unsigned char mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) unsigned char ctrl = eh->ctrl | mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) eh->ctrl = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) writeb(ctrl, eh->ctrl_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) static inline void etherh_clr_ctrl(struct etherh_priv *eh, unsigned char mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned char ctrl = eh->ctrl & ~mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) eh->ctrl = ctrl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) writeb(ctrl, eh->ctrl_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) static inline unsigned int etherh_get_stat(struct etherh_priv *eh)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return readb(eh->ctrl_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void etherh_irq_enable(ecard_t *ec, int irqnr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) struct etherh_priv *eh = ec->irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) etherh_set_ctrl(eh, ETHERH_CP_IE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static void etherh_irq_disable(ecard_t *ec, int irqnr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) struct etherh_priv *eh = ec->irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) etherh_clr_ctrl(eh, ETHERH_CP_IE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) static expansioncard_ops_t etherh_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .irqenable = etherh_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .irqdisable = etherh_irq_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) etherh_setif(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /* set the interface type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) switch (etherh_priv(dev)->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case PROD_I3_ETHERLAN600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case PROD_I3_ETHERLAN600A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) addr = (void __iomem *)dev->base_addr + EN0_RCNTHI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) switch (dev->if_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) case IF_PORT_10BASE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) writeb((readb(addr) & 0xf8) | 1, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case IF_PORT_10BASET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) writeb((readb(addr) & 0xf8), addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) case PROD_I3_ETHERLAN500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) switch (dev->if_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) case IF_PORT_10BASE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) etherh_clr_ctrl(etherh_priv(dev), ETHERH_CP_IF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) case IF_PORT_10BASET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) etherh_set_ctrl(etherh_priv(dev), ETHERH_CP_IF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) etherh_getifstat(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) void __iomem *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) int stat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) switch (etherh_priv(dev)->id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) case PROD_I3_ETHERLAN600:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) case PROD_I3_ETHERLAN600A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) addr = (void __iomem *)dev->base_addr + EN0_RCNTHI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) switch (dev->if_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) case IF_PORT_10BASE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) case IF_PORT_10BASET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) stat = readb(addr) & 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) case PROD_I3_ETHERLAN500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) switch (dev->if_port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) case IF_PORT_10BASE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) stat = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) case IF_PORT_10BASET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) stat = etherh_get_stat(etherh_priv(dev)) & ETHERH_CP_HEARTBEAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) stat = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) return stat != 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * Configure the interface. Note that we ignore the other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * parts of ifmap, since its mostly meaningless for this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static int etherh_set_config(struct net_device *dev, struct ifmap *map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) switch (map->port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) case IF_PORT_10BASE2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) case IF_PORT_10BASET:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * If the user explicitly sets the interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * media type, turn off automedia detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) dev->flags &= ~IFF_AUTOMEDIA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) dev->if_port = map->port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) * Reset the 8390 (hard reset). Note that we can't actually do this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) etherh_reset(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) void __iomem *addr = (void __iomem *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) writeb(E8390_NODMA+E8390_PAGE0+E8390_STOP, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) * See if we need to change the interface type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * Note that we use 'interface_num' as a flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * to indicate that we need to change the media.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (dev->flags & IFF_AUTOMEDIA && ei_local->interface_num) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) ei_local->interface_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (dev->if_port == IF_PORT_10BASET)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) dev->if_port = IF_PORT_10BASE2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) dev->if_port = IF_PORT_10BASET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * Write a block of data out to the 8390
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) etherh_block_output (struct net_device *dev, int count, const unsigned char *buf, int start_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) unsigned long dma_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) void __iomem *dma_base, *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) if (ei_local->dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) netdev_err(dev, "DMAing conflict in etherh_block_input: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) " DMAstat %d irqlock %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) ei_local->dmaing, ei_local->irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) * Make sure we have a round number of bytes if we're in word mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) if (count & 1 && ei_local->word16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) count++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) ei_local->dmaing = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) addr = (void __iomem *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) dma_base = etherh_priv(dev)->dma_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) count = (count + 1) & ~1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) writeb (E8390_NODMA | E8390_PAGE0 | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) writeb (0x42, addr + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) writeb (0x00, addr + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) writeb (0x42, addr + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) writeb (0x00, addr + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) writeb (E8390_RREAD | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) udelay (1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) writeb (ENISR_RDC, addr + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) writeb (count, addr + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) writeb (count >> 8, addr + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) writeb (0, addr + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) writeb (start_page, addr + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) writeb (E8390_RWRITE | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) if (ei_local->word16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) writesw (dma_base, buf, count >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) writesb (dma_base, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) dma_start = jiffies;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) while ((readb (addr + EN0_ISR) & ENISR_RDC) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) netdev_warn(dev, "timeout waiting for TX RDC\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) etherh_reset (dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) __NS8390_init (dev, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) writeb (ENISR_RDC, addr + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) ei_local->dmaing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * Read a block of data from the 8390
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) etherh_block_input (struct net_device *dev, int count, struct sk_buff *skb, int ring_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) unsigned char *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) void __iomem *dma_base, *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) if (ei_local->dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) netdev_err(dev, "DMAing conflict in etherh_block_input: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) " DMAstat %d irqlock %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ei_local->dmaing, ei_local->irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) ei_local->dmaing = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) addr = (void __iomem *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) dma_base = etherh_priv(dev)->dma_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) buf = skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) writeb (E8390_NODMA | E8390_PAGE0 | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) writeb (count, addr + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) writeb (count >> 8, addr + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) writeb (ring_offset, addr + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) writeb (ring_offset >> 8, addr + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) writeb (E8390_RREAD | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) if (ei_local->word16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) readsw (dma_base, buf, count >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) if (count & 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) buf[count - 1] = readb (dma_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) readsb (dma_base, buf, count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) writeb (ENISR_RDC, addr + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) ei_local->dmaing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * Read a header from the 8390
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) etherh_get_header (struct net_device *dev, struct e8390_pkt_hdr *hdr, int ring_page)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) void __iomem *dma_base, *addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) if (ei_local->dmaing) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) netdev_err(dev, "DMAing conflict in etherh_get_header: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) " DMAstat %d irqlock %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) ei_local->dmaing, ei_local->irqlock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) ei_local->dmaing = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) addr = (void __iomem *)dev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) dma_base = etherh_priv(dev)->dma_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) writeb (E8390_NODMA | E8390_PAGE0 | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) writeb (sizeof (*hdr), addr + EN0_RCNTLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) writeb (0, addr + EN0_RCNTHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) writeb (0, addr + EN0_RSARLO);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) writeb (ring_page, addr + EN0_RSARHI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) writeb (E8390_RREAD | E8390_START, addr + E8390_CMD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (ei_local->word16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) readsw (dma_base, hdr, sizeof (*hdr) >> 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) readsb (dma_base, hdr, sizeof (*hdr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) writeb (ENISR_RDC, addr + EN0_ISR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) ei_local->dmaing = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) * Open/initialize the board. This is called (in the current kernel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) * sometime after booting when the 'ifconfig' program is run.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) * This routine should set everything up anew at each open, even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) * registers that "should" only need to be set once at boot, so that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) * there is non-reboot way to recover if something goes wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) etherh_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) if (request_irq(dev->irq, __ei_interrupt, 0, dev->name, dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) * Make sure that we aren't going to change the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) * media type on the next reset - we are about to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * do automedia manually now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) ei_local->interface_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * If we are doing automedia detection, do it now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * This is more reliable than the 8390's detection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) if (dev->flags & IFF_AUTOMEDIA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) dev->if_port = IF_PORT_10BASET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) mdelay(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) if (!etherh_getifstat(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) dev->if_port = IF_PORT_10BASE2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) etherh_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) __ei_open(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) * The inverse routine to etherh_open().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) etherh_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) __ei_close (dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) free_irq (dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) * Read the ethernet address string from the on board rom.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) * This is an ascii string...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) static int etherh_addr(char *addr, struct expansion_card *ec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) struct in_chunk_dir cd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) char *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (!ecard_readchunk(&cd, ec, 0xf5, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) printk(KERN_ERR "%s: unable to read module description string\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) dev_name(&ec->dev));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) goto no_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) s = strchr(cd.d.string, '(');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) if (s) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) for (i = 0; i < 6; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) addr[i] = simple_strtoul(s + 1, &s, 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (*s != (i == 5? ')' : ':'))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (i == 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) printk(KERN_ERR "%s: unable to parse MAC address: %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) dev_name(&ec->dev), cd.d.string);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) no_addr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * Create an ethernet address from the system serial number.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) static int __init etherm_addr(char *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) unsigned int serial;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) if (system_serial_low == 0 && system_serial_high == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) serial = system_serial_low | system_serial_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) addr[0] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) addr[1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) addr[2] = 0xa4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) addr[3] = 0x10 + (serial >> 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) addr[4] = serial >> 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) addr[5] = serial >> 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) static void etherh_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) strlcpy(info->version, DRV_VERSION, sizeof(info->version));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) strlcpy(info->bus_info, dev_name(dev->dev.parent),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) sizeof(info->bus_info));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) static int etherh_get_link_ksettings(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) struct ethtool_link_ksettings *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) ethtool_convert_legacy_u32_to_link_mode(cmd->link_modes.supported,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) etherh_priv(dev)->supported);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) cmd->base.speed = SPEED_10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) cmd->base.duplex = DUPLEX_HALF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) cmd->base.port = dev->if_port == IF_PORT_10BASET ? PORT_TP : PORT_BNC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) cmd->base.autoneg = (dev->flags & IFF_AUTOMEDIA ? AUTONEG_ENABLE :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) AUTONEG_DISABLE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) static int etherh_set_link_ksettings(struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) const struct ethtool_link_ksettings *cmd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) switch (cmd->base.autoneg) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) case AUTONEG_ENABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) dev->flags |= IFF_AUTOMEDIA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) case AUTONEG_DISABLE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) switch (cmd->base.port) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) case PORT_TP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) dev->if_port = IF_PORT_10BASET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) case PORT_BNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) dev->if_port = IF_PORT_10BASE2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) dev->flags &= ~IFF_AUTOMEDIA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) etherh_setif(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) static u32 etherh_get_msglevel(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) return ei_local->msg_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) static void etherh_set_msglevel(struct net_device *dev, u32 v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) struct ei_device *ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) ei_local->msg_enable = v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) static const struct ethtool_ops etherh_ethtool_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) .get_drvinfo = etherh_get_drvinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) .get_ts_info = ethtool_op_get_ts_info,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) .get_msglevel = etherh_get_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) .set_msglevel = etherh_set_msglevel,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) .get_link_ksettings = etherh_get_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) .set_link_ksettings = etherh_set_link_ksettings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) static const struct net_device_ops etherh_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) .ndo_open = etherh_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) .ndo_stop = etherh_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) .ndo_set_config = etherh_set_config,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) .ndo_start_xmit = __ei_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) .ndo_tx_timeout = __ei_tx_timeout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) .ndo_get_stats = __ei_get_stats,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) .ndo_set_rx_mode = __ei_set_multicast_list,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) .ndo_validate_addr = eth_validate_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) .ndo_set_mac_address = eth_mac_addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) #ifdef CONFIG_NET_POLL_CONTROLLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) .ndo_poll_controller = __ei_poll,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) static u32 etherh_regoffsets[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) static u32 etherm_regoffsets[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) etherh_probe(struct expansion_card *ec, const struct ecard_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) const struct etherh_data *data = id->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) struct ei_device *ei_local;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) struct etherh_priv *eh;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) ret = ecard_request_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) dev = ____alloc_ei_netdev(sizeof(struct etherh_priv));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) goto release;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) SET_NETDEV_DEV(dev, &ec->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) dev->netdev_ops = ðerh_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) dev->irq = ec->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) dev->ethtool_ops = ðerh_ethtool_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) if (data->supported & SUPPORTED_Autoneg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) dev->flags |= IFF_AUTOMEDIA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (data->supported & SUPPORTED_TP) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) dev->flags |= IFF_PORTSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) dev->if_port = IF_PORT_10BASET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) } else if (data->supported & SUPPORTED_BNC) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) dev->flags |= IFF_PORTSEL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) dev->if_port = IF_PORT_10BASE2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) dev->if_port = IF_PORT_UNKNOWN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) eh = etherh_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) eh->supported = data->supported;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) eh->ctrl = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) eh->id = ec->cid.product;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) eh->memc = ecardm_iomap(ec, ECARD_RES_MEMC, 0, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (!eh->memc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) eh->ctrl_port = eh->memc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) if (data->ctrl_ioc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) eh->ioc_fast = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) if (!eh->ioc_fast) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) eh->ctrl_port = eh->ioc_fast;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) dev->base_addr = (unsigned long)eh->memc + data->ns8390_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) eh->dma_base = eh->memc + data->dataport_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) eh->ctrl_port += data->ctrlport_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) * IRQ and control port handling - only for non-NIC slot cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) if (ec->slot_no != 8) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) ecard_setirq(ec, ðerh_ops, eh);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * If we're in the NIC slot, make sure the IRQ is enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) etherh_set_ctrl(eh, ETHERH_CP_IE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) ei_local = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) spin_lock_init(&ei_local->page_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) if (ec->cid.product == PROD_ANT_ETHERM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) etherm_addr(dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) ei_local->reg_offset = etherm_regoffsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) etherh_addr(dev->dev_addr, ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) ei_local->reg_offset = etherh_regoffsets;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) ei_local->name = dev->name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) ei_local->word16 = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) ei_local->tx_start_page = data->tx_start_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) ei_local->rx_start_page = ei_local->tx_start_page + TX_PAGES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) ei_local->stop_page = data->stop_page;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) ei_local->reset_8390 = etherh_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) ei_local->block_input = etherh_block_input;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) ei_local->block_output = etherh_block_output;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) ei_local->get_8390_hdr = etherh_get_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) ei_local->interface_num = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) etherh_reset(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) __NS8390_init(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) ret = register_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) goto free;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) netdev_info(dev, "%s in slot %d, %pM\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) data->name, ec->slot_no, dev->dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) ecard_set_drvdata(ec, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) free:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) release:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) ecard_release_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) static void etherh_remove(struct expansion_card *ec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) struct net_device *dev = ecard_get_drvdata(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) ecard_set_drvdata(ec, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) ecard_release_resources(ec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) static struct etherh_data etherm_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) .ns8390_offset = ETHERM_NS8390,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) .dataport_offset = ETHERM_NS8390 + ETHERM_DATAPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) .ctrlport_offset = ETHERM_NS8390 + ETHERM_CTRLPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) .name = "ANT EtherM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .supported = SUPPORTED_10baseT_Half,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .tx_start_page = ETHERM_TX_START_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .stop_page = ETHERM_STOP_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) static struct etherh_data etherlan500_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) .ns8390_offset = ETHERH500_NS8390,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) .dataport_offset = ETHERH500_NS8390 + ETHERH500_DATAPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) .ctrlport_offset = ETHERH500_CTRLPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) .ctrl_ioc = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) .name = "i3 EtherH 500",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) .supported = SUPPORTED_10baseT_Half,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) .tx_start_page = ETHERH_TX_START_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) .stop_page = ETHERH_STOP_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) static struct etherh_data etherlan600_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .ns8390_offset = ETHERH600_NS8390,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .dataport_offset = ETHERH600_NS8390 + ETHERH600_DATAPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .ctrlport_offset = ETHERH600_NS8390 + ETHERH600_CTRLPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) .name = "i3 EtherH 600",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) .supported = SUPPORTED_10baseT_Half | SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_Autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .tx_start_page = ETHERH_TX_START_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .stop_page = ETHERH_STOP_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) static struct etherh_data etherlan600a_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) .ns8390_offset = ETHERH600_NS8390,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .dataport_offset = ETHERH600_NS8390 + ETHERH600_DATAPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .ctrlport_offset = ETHERH600_NS8390 + ETHERH600_CTRLPORT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .name = "i3 EtherH 600A",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .supported = SUPPORTED_10baseT_Half | SUPPORTED_TP | SUPPORTED_BNC | SUPPORTED_Autoneg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) .tx_start_page = ETHERH_TX_START_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) .stop_page = ETHERH_STOP_PAGE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static const struct ecard_id etherh_ids[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) { MANU_ANT, PROD_ANT_ETHERM, ðerm_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) { MANU_I3, PROD_I3_ETHERLAN500, ðerlan500_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) { MANU_I3, PROD_I3_ETHERLAN600, ðerlan600_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) { MANU_I3, PROD_I3_ETHERLAN600A, ðerlan600a_data },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) { 0xffff, 0xffff }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) static struct ecard_driver etherh_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) .probe = etherh_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) .remove = etherh_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) .id_table = etherh_ids,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) .drv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static int __init etherh_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) for (i = 0; i < 16; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) etherh_regoffsets[i] = i << 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) etherm_regoffsets[i] = i << 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) return ecard_register_driver(ðerh_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) static void __exit etherh_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) ecard_remove_driver(ðerh_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) module_init(etherh_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) module_exit(etherh_exit);