^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * tscan1.c: driver for Technologic Systems TS-CAN1 PC104 boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright 2010 Andre B. Oliveira
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * References:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * - Getting started with TS-CAN1, Technologic Systems, Jun 2009
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * http://www.embeddedarm.com/documentation/ts-can1-manual.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/isa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include "sja1000.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) MODULE_DESCRIPTION("Driver for Technologic Systems TS-CAN1 PC104 boards");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) MODULE_AUTHOR("Andre B. Oliveira <anbadeol@gmail.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) /* Maximum number of boards (one in each JP1:JP2 setting of IO address) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define TSCAN1_MAXDEV 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* PLD registers address offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define TSCAN1_ID1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define TSCAN1_ID2 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define TSCAN1_VERSION 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define TSCAN1_LED 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define TSCAN1_PAGE 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define TSCAN1_MODE 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define TSCAN1_JUMPERS 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* PLD board identifier registers magic values */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define TSCAN1_ID1_VALUE 0xf6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define TSCAN1_ID2_VALUE 0xb9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /* PLD mode register SJA1000 IO enable bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define TSCAN1_MODE_ENABLE 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* PLD jumpers register bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define TSCAN1_JP4 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define TSCAN1_JP5 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* PLD IO base addresses start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define TSCAN1_PLD_ADDRESS 0x150
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* PLD register space size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define TSCAN1_PLD_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* SJA1000 register space size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define TSCAN1_SJA1000_SIZE 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /* SJA1000 crystal frequency (16MHz) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define TSCAN1_SJA1000_XTAL 16000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* SJA1000 IO base addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static const unsigned short tscan1_sja1000_addresses[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 0x100, 0x120, 0x180, 0x1a0, 0x200, 0x240, 0x280, 0x320
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* Read SJA1000 register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) static u8 tscan1_read(const struct sja1000_priv *priv, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return inb((unsigned long)priv->reg_base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* Write SJA1000 register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static void tscan1_write(const struct sja1000_priv *priv, int reg, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) outb(val, (unsigned long)priv->reg_base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* Probe for a TS-CAN1 board with JP2:JP1 jumper setting ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static int tscan1_probe(struct device *dev, unsigned id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct net_device *netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) struct sja1000_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) unsigned long pld_base, sja1000_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int irq, i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pld_base = TSCAN1_PLD_ADDRESS + id * TSCAN1_PLD_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (!request_region(pld_base, TSCAN1_PLD_SIZE, dev_name(dev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) if (inb(pld_base + TSCAN1_ID1) != TSCAN1_ID1_VALUE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) inb(pld_base + TSCAN1_ID2) != TSCAN1_ID2_VALUE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) release_region(pld_base, TSCAN1_PLD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) switch (inb(pld_base + TSCAN1_JUMPERS) & (TSCAN1_JP4 | TSCAN1_JP5)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) case TSCAN1_JP4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) irq = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) case TSCAN1_JP5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) irq = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) case TSCAN1_JP4 | TSCAN1_JP5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) irq = 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) dev_err(dev, "invalid JP4:JP5 setting (no IRQ)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) release_region(pld_base, TSCAN1_PLD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) netdev = alloc_sja1000dev(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (!netdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) release_region(pld_base, TSCAN1_PLD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) dev_set_drvdata(dev, netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) SET_NETDEV_DEV(netdev, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) netdev->base_addr = pld_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) netdev->irq = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) priv = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) priv->read_reg = tscan1_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) priv->write_reg = tscan1_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) priv->can.clock.freq = TSCAN1_SJA1000_XTAL / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) priv->cdr = CDR_CBP | CDR_CLK_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) priv->ocr = OCR_TX0_PUSHPULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Select the first SJA1000 IO address that is free and that works */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) for (i = 0; i < ARRAY_SIZE(tscan1_sja1000_addresses); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) sja1000_base = tscan1_sja1000_addresses[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!request_region(sja1000_base, TSCAN1_SJA1000_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) dev_name(dev)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Set SJA1000 IO base address and enable it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) outb(TSCAN1_MODE_ENABLE | i, pld_base + TSCAN1_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) priv->reg_base = (void __iomem *)sja1000_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (!register_sja1000dev(netdev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* SJA1000 probe succeeded; turn LED off and return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) outb(0, pld_base + TSCAN1_LED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) netdev_info(netdev, "TS-CAN1 at 0x%lx 0x%lx irq %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pld_base, sja1000_base, irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* SJA1000 probe failed; release and try next address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) outb(0, pld_base + TSCAN1_MODE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) release_region(sja1000_base, TSCAN1_SJA1000_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) dev_err(dev, "failed to assign SJA1000 IO address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) dev_set_drvdata(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) free_sja1000dev(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) release_region(pld_base, TSCAN1_PLD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) static int tscan1_remove(struct device *dev, unsigned id /*unused*/)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct net_device *netdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) struct sja1000_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) unsigned long pld_base, sja1000_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) netdev = dev_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) unregister_sja1000dev(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) dev_set_drvdata(dev, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) priv = netdev_priv(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) pld_base = netdev->base_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) sja1000_base = (unsigned long)priv->reg_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) outb(0, pld_base + TSCAN1_MODE); /* disable SJA1000 IO space */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) release_region(sja1000_base, TSCAN1_SJA1000_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) release_region(pld_base, TSCAN1_PLD_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) free_sja1000dev(netdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static struct isa_driver tscan1_isa_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .probe = tscan1_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) .remove = tscan1_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) .name = "tscan1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) module_isa_driver(tscan1_isa_driver, TSCAN1_MAXDEV);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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