^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * sja1000.c - Philips SJA1000 network device driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * 38106 Braunschweig, GERMANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (c) 2002-2007 Volkswagen Group Electronic Research
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * notice, this list of conditions and the following disclaimer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * notice, this list of conditions and the following disclaimer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * documentation and/or other materials provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 3. Neither the name of Volkswagen nor the names of its contributors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * may be used to endorse or promote products derived from this software
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * without specific prior written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Alternatively, provided that this notice is retained in full, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * software may be distributed under the terms of the GNU General
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Public License ("GPL") version 2, in which case the provisions of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * GPL apply INSTEAD OF those given above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * The provided data structures and external interfaces from this code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * are not restricted to be used by modules with a GPL compatible license.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #include <linux/fcntl.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #include <linux/if_arp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #include <linux/if_ether.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #include <linux/skbuff.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #include <linux/can/dev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #include <linux/can/error.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #include <linux/can/led.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #include "sja1000.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define DRV_NAME "sja1000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) MODULE_AUTHOR("Oliver Hartkopp <oliver.hartkopp@volkswagen.de>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) MODULE_LICENSE("Dual BSD/GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) MODULE_DESCRIPTION(DRV_NAME "CAN netdevice driver");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const struct can_bittiming_const sja1000_bittiming_const = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .name = DRV_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) .tseg1_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) .tseg1_max = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .tseg2_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .tseg2_max = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .sjw_max = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .brp_min = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) .brp_max = 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) .brp_inc = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * The command register needs some locking and time to settle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * the write_reg() operation - especially on SMP systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) spin_lock_irqsave(&priv->cmdreg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) priv->write_reg(priv, SJA1000_CMR, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) priv->read_reg(priv, SJA1000_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) spin_unlock_irqrestore(&priv->cmdreg_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) static int sja1000_is_absent(struct sja1000_priv *priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) return (priv->read_reg(priv, SJA1000_MOD) == 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int sja1000_probe_chip(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) if (priv->reg_base && sja1000_is_absent(priv)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) netdev_err(dev, "probing failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static void set_reset_mode(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) unsigned char status = priv->read_reg(priv, SJA1000_MOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* disable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) priv->write_reg(priv, SJA1000_IER, IRQ_OFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) for (i = 0; i < 100; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* check reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) if (status & MOD_RM) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) priv->can.state = CAN_STATE_STOPPED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* reset chip */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) priv->write_reg(priv, SJA1000_MOD, MOD_RM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) status = priv->read_reg(priv, SJA1000_MOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) netdev_err(dev, "setting SJA1000 into reset mode failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static void set_normal_mode(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) unsigned char status = priv->read_reg(priv, SJA1000_MOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) u8 mod_reg_val = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) for (i = 0; i < 100; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* check reset bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) if ((status & MOD_RM) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) priv->can.state = CAN_STATE_ERROR_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /* enable interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) priv->write_reg(priv, SJA1000_IER, IRQ_ALL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) priv->write_reg(priv, SJA1000_IER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) IRQ_ALL & ~IRQ_BEI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /* set chip to normal mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) mod_reg_val |= MOD_LOM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (priv->can.ctrlmode & CAN_CTRLMODE_PRESUME_ACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) mod_reg_val |= MOD_STM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) priv->write_reg(priv, SJA1000_MOD, mod_reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) udelay(10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) status = priv->read_reg(priv, SJA1000_MOD);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) netdev_err(dev, "setting SJA1000 into normal mode failed!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * initialize SJA1000 chip:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) * - reset chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * - set output mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * - set baudrate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) * - enable interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * - start operating mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static void chipset_init(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* set clock divider and output control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /* set acceptance filter (accept all) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) priv->write_reg(priv, SJA1000_ACCC0, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) priv->write_reg(priv, SJA1000_ACCC1, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) priv->write_reg(priv, SJA1000_ACCC2, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) priv->write_reg(priv, SJA1000_ACCC3, 0x00);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) priv->write_reg(priv, SJA1000_ACCM0, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) priv->write_reg(priv, SJA1000_ACCM1, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) priv->write_reg(priv, SJA1000_ACCM2, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) priv->write_reg(priv, SJA1000_ACCM3, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) static void sja1000_start(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) /* leave reset mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (priv->can.state != CAN_STATE_STOPPED)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) set_reset_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* Initialize chip if uninitialized at this stage */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!(priv->read_reg(priv, SJA1000_CDR) & CDR_PELICAN))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) chipset_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Clear error counters and error code capture */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) priv->write_reg(priv, SJA1000_TXERR, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) priv->write_reg(priv, SJA1000_RXERR, 0x0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) priv->read_reg(priv, SJA1000_ECC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) /* clear interrupt flags */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) priv->read_reg(priv, SJA1000_IR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) /* leave reset mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) set_normal_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) static int sja1000_set_mode(struct net_device *dev, enum can_mode mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) switch (mode) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) case CAN_MODE_START:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) sja1000_start(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (netif_queue_stopped(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) static int sja1000_set_bittiming(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) struct can_bittiming *bt = &priv->can.bittiming;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) u8 btr0, btr1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) (((bt->phase_seg2 - 1) & 0x7) << 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) btr1 |= 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) priv->write_reg(priv, SJA1000_BTR0, btr0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) priv->write_reg(priv, SJA1000_BTR1, btr1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) static int sja1000_get_berr_counter(const struct net_device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) struct can_berr_counter *bec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) bec->txerr = priv->read_reg(priv, SJA1000_TXERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) bec->rxerr = priv->read_reg(priv, SJA1000_RXERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) * transmit a CAN message
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) * message layout in the sk_buff should be like this:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) * xx xx xx xx ff ll 00 11 22 33 44 55 66 77
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) * [ can-id ] [flags] [len] [can data (up to 8 bytes]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) struct can_frame *cf = (struct can_frame *)skb->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) uint8_t fi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) uint8_t dlc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) canid_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) uint8_t dreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) u8 cmd_reg_val = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) if (can_dropped_invalid_skb(dev, skb))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) fi = dlc = cf->can_dlc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) id = cf->can_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) if (id & CAN_RTR_FLAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) fi |= SJA1000_FI_RTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (id & CAN_EFF_FLAG) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) fi |= SJA1000_FI_FF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) dreg = SJA1000_EFF_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) priv->write_reg(priv, SJA1000_FI, fi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) priv->write_reg(priv, SJA1000_ID1, (id & 0x1fe00000) >> 21);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) priv->write_reg(priv, SJA1000_ID2, (id & 0x001fe000) >> 13);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) priv->write_reg(priv, SJA1000_ID3, (id & 0x00001fe0) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) priv->write_reg(priv, SJA1000_ID4, (id & 0x0000001f) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) dreg = SJA1000_SFF_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) priv->write_reg(priv, SJA1000_FI, fi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) priv->write_reg(priv, SJA1000_ID1, (id & 0x000007f8) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) priv->write_reg(priv, SJA1000_ID2, (id & 0x00000007) << 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) for (i = 0; i < dlc; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) priv->write_reg(priv, dreg++, cf->data[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) can_put_echo_skb(skb, dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) cmd_reg_val |= CMD_AT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) cmd_reg_val |= CMD_SRR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) cmd_reg_val |= CMD_TR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) sja1000_write_cmdreg(priv, cmd_reg_val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return NETDEV_TX_OK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) static void sja1000_rx(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) struct net_device_stats *stats = &dev->stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) struct can_frame *cf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) uint8_t fi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) uint8_t dreg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) canid_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) /* create zero'ed CAN frame buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) skb = alloc_can_skb(dev, &cf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) if (skb == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) fi = priv->read_reg(priv, SJA1000_FI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (fi & SJA1000_FI_FF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) /* extended frame format (EFF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) dreg = SJA1000_EFF_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) id = (priv->read_reg(priv, SJA1000_ID1) << 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) | (priv->read_reg(priv, SJA1000_ID2) << 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) | (priv->read_reg(priv, SJA1000_ID3) << 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) | (priv->read_reg(priv, SJA1000_ID4) >> 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) id |= CAN_EFF_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) /* standard frame format (SFF) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) dreg = SJA1000_SFF_BUF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) id = (priv->read_reg(priv, SJA1000_ID1) << 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) | (priv->read_reg(priv, SJA1000_ID2) >> 5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) cf->can_dlc = get_can_dlc(fi & 0x0F);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (fi & SJA1000_FI_RTR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) id |= CAN_RTR_FLAG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) for (i = 0; i < cf->can_dlc; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) cf->data[i] = priv->read_reg(priv, dreg++);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) cf->can_id = id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* release receive buffer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) sja1000_write_cmdreg(priv, CMD_RRB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) stats->rx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) stats->rx_bytes += cf->can_dlc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) netif_rx(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) can_led_event(dev, CAN_LED_EVENT_RX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) struct net_device_stats *stats = &dev->stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) struct can_frame *cf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) struct sk_buff *skb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) enum can_state state = priv->can.state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) enum can_state rx_state, tx_state;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) unsigned int rxerr, txerr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) uint8_t ecc, alc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) skb = alloc_can_err_skb(dev, &cf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) if (skb == NULL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) txerr = priv->read_reg(priv, SJA1000_TXERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) rxerr = priv->read_reg(priv, SJA1000_RXERR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) cf->data[6] = txerr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) cf->data[7] = rxerr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) if (isrc & IRQ_DOI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) /* data overrun interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) netdev_dbg(dev, "data overrun interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) cf->can_id |= CAN_ERR_CRTL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) stats->rx_over_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) stats->rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) sja1000_write_cmdreg(priv, CMD_CDO); /* clear bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (isrc & IRQ_EI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) /* error warning interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) netdev_dbg(dev, "error warning interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) if (status & SR_BS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) state = CAN_STATE_BUS_OFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) else if (status & SR_ES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) state = CAN_STATE_ERROR_WARNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) state = CAN_STATE_ERROR_ACTIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) if (isrc & IRQ_BEI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /* bus error interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) priv->can.can_stats.bus_error++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) stats->rx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) ecc = priv->read_reg(priv, SJA1000_ECC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) /* set error type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) switch (ecc & ECC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) case ECC_BIT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) cf->data[2] |= CAN_ERR_PROT_BIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) case ECC_FORM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) cf->data[2] |= CAN_ERR_PROT_FORM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) case ECC_STUFF:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) cf->data[2] |= CAN_ERR_PROT_STUFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* set error location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) cf->data[3] = ecc & ECC_SEG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) /* Error occurred during transmission? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) if ((ecc & ECC_DIR) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) cf->data[2] |= CAN_ERR_PROT_TX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) if (isrc & IRQ_EPI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* error passive interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) netdev_dbg(dev, "error passive interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) if (state == CAN_STATE_ERROR_PASSIVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) state = CAN_STATE_ERROR_WARNING;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) state = CAN_STATE_ERROR_PASSIVE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) if (isrc & IRQ_ALI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) /* arbitration lost interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) netdev_dbg(dev, "arbitration lost interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) alc = priv->read_reg(priv, SJA1000_ALC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) priv->can.can_stats.arbitration_lost++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) cf->can_id |= CAN_ERR_LOSTARB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) cf->data[0] = alc & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (state != priv->can.state) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) tx_state = txerr >= rxerr ? state : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) rx_state = txerr <= rxerr ? state : 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) can_change_state(dev, cf, tx_state, rx_state);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) if(state == CAN_STATE_BUS_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) can_bus_off(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) stats->rx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) stats->rx_bytes += cf->can_dlc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) netif_rx(skb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) irqreturn_t sja1000_interrupt(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) struct net_device *dev = (struct net_device *)dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) struct net_device_stats *stats = &dev->stats;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) uint8_t isrc, status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) int n = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) if (priv->pre_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) priv->pre_irq(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) /* Shared interrupts and IRQ off? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) if (priv->read_reg(priv, SJA1000_IER) == IRQ_OFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) while ((isrc = priv->read_reg(priv, SJA1000_IR)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) (n < SJA1000_MAX_IRQ)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) status = priv->read_reg(priv, SJA1000_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) /* check for absent controller due to hw unplug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (status == 0xFF && sja1000_is_absent(priv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) if (isrc & IRQ_WUI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) netdev_warn(dev, "wakeup interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) if (isrc & IRQ_TI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) /* transmission buffer released */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) !(status & SR_TCS)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) stats->tx_errors++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) can_free_echo_skb(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) /* transmission complete */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) stats->tx_bytes +=
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) priv->read_reg(priv, SJA1000_FI) & 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) stats->tx_packets++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) can_get_echo_skb(dev, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) netif_wake_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) can_led_event(dev, CAN_LED_EVENT_TX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) if (isrc & IRQ_RI) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) /* receive interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) while (status & SR_RBS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) sja1000_rx(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) status = priv->read_reg(priv, SJA1000_SR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) /* check for absent controller */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) if (status == 0xFF && sja1000_is_absent(priv))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) if (isrc & (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* error interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) if (sja1000_err(dev, isrc, status))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) n++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) if (priv->post_irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) priv->post_irq(priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) if (n >= SJA1000_MAX_IRQ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) netdev_dbg(dev, "%d messages handled in ISR", n);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) return (n) ? IRQ_HANDLED : IRQ_NONE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) EXPORT_SYMBOL_GPL(sja1000_interrupt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) static int sja1000_open(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) /* set chip into reset mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) set_reset_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) /* common open */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) err = open_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) /* register interrupt handler, if not done by the device driver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) err = request_irq(dev->irq, sja1000_interrupt, priv->irq_flags,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) dev->name, (void *)dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) close_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) return -EAGAIN;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) /* init and start chi */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) sja1000_start(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) can_led_event(dev, CAN_LED_EVENT_OPEN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) netif_start_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static int sja1000_close(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) struct sja1000_priv *priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) netif_stop_queue(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) set_reset_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) free_irq(dev->irq, (void *)dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) close_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) can_led_event(dev, CAN_LED_EVENT_STOP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) struct net_device *alloc_sja1000dev(int sizeof_priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) struct sja1000_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) dev = alloc_candev(sizeof(struct sja1000_priv) + sizeof_priv,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) SJA1000_ECHO_SKB_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) if (!dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) return NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) priv = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) priv->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) priv->can.bittiming_const = &sja1000_bittiming_const;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) priv->can.do_set_bittiming = sja1000_set_bittiming;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) priv->can.do_set_mode = sja1000_set_mode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) priv->can.do_get_berr_counter = sja1000_get_berr_counter;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) CAN_CTRLMODE_LISTENONLY |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) CAN_CTRLMODE_3_SAMPLES |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) CAN_CTRLMODE_ONE_SHOT |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) CAN_CTRLMODE_BERR_REPORTING |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) CAN_CTRLMODE_PRESUME_ACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) spin_lock_init(&priv->cmdreg_lock);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) if (sizeof_priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) priv->priv = (void *)priv + sizeof(struct sja1000_priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) EXPORT_SYMBOL_GPL(alloc_sja1000dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) void free_sja1000dev(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) free_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) EXPORT_SYMBOL_GPL(free_sja1000dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) static const struct net_device_ops sja1000_netdev_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .ndo_open = sja1000_open,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .ndo_stop = sja1000_close,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .ndo_start_xmit = sja1000_start_xmit,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .ndo_change_mtu = can_change_mtu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) int register_sja1000dev(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) if (!sja1000_probe_chip(dev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) dev->flags |= IFF_ECHO; /* we support local echo */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) dev->netdev_ops = &sja1000_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) set_reset_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) chipset_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) ret = register_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) if (!ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) devm_can_led_init(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) EXPORT_SYMBOL_GPL(register_sja1000dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) void unregister_sja1000dev(struct net_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) set_reset_mode(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) unregister_candev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) EXPORT_SYMBOL_GPL(unregister_sja1000dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) static __init int sja1000_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) printk(KERN_INFO "%s CAN netdevice driver\n", DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) module_init(sja1000_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) static __exit void sja1000_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) printk(KERN_INFO "%s: driver removed\n", DRV_NAME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) module_exit(sja1000_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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