Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __COM9026_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __COM9026_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /* COM 9026 controller chip --> ARCnet register addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define COM9026_REG_W_INTMASK	0	/* writable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #define COM9026_REG_R_STATUS	0	/* readable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define COM9026_REG_W_COMMAND	1	/* writable, returns random vals on read (?) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define COM9026_REG_RW_CONFIG	2	/* Configuration register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define COM9026_REG_R_RESET	8	/* software reset (on read) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define COM9026_REG_RW_MEMDATA	12	/* Data port for IO-mapped memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define COM9026_REG_W_ADDR_LO	14	/* Control registers for said */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define COM9026_REG_W_ADDR_HI	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define COM9026_REG_R_STATION	1	/* Station ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #endif