^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Linux ARCnet driver - COM20020 chipset support - function declarations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Written 1997 by David Woodhouse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Written 1994-1999 by Avery Pennarun.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Derived from skeleton.c by Donald Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Special thanks to Contemporary Controls, Inc. (www.ccontrols.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * for sponsoring the further development of this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * The original copyright of skeleton.c was as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * skeleton.c Written 1993 by Donald Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * Copyright 1993 United States Government as represented by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Director, National Security Agency. This software may only be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * and distributed according to the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * modified by SRC, incorporated herein by reference.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * For more details, see drivers/net/arcnet.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #ifndef __COM20020_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define __COM20020_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) int com20020_check(struct net_device *dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int com20020_found(struct net_device *dev, int shared);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) extern const struct net_device_ops com20020_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* The number of low I/O ports used by the card. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define ARCNET_TOTAL_SIZE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define PLX_PCI_MAX_CARDS 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct ledoffsets {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int green;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int red;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct com20020_pci_channel_map {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 bar;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) u32 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u32 size; /* 0x00 - auto, e.g. length of entire bar */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct com20020_pci_card_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) const char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) int devcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) struct com20020_pci_channel_map chan_map_tbl[PLX_PCI_MAX_CARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct com20020_pci_channel_map misc_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct ledoffsets leds[PLX_PCI_MAX_CARDS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) int rotary;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) unsigned int flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) struct com20020_priv {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct com20020_pci_card_info *ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) struct list_head list_dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) resource_size_t misc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct com20020_dev {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct led_classdev tx_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) struct led_classdev recon_led;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct com20020_priv *pci_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) int index;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define COM20020_REG_W_INTMASK 0 /* writable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define COM20020_REG_R_STATUS 0 /* readable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define COM20020_REG_W_COMMAND 1 /* standard arcnet commands */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define COM20020_REG_R_DIAGSTAT 1 /* diagnostic status */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define COM20020_REG_W_ADDR_HI 2 /* control for IO-mapped memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define COM20020_REG_W_ADDR_LO 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define COM20020_REG_RW_MEMDATA 4 /* data port for IO-mapped memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define COM20020_REG_W_SUBADR 5 /* the extended port _XREG refers to */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define COM20020_REG_W_CONFIG 6 /* configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define COM20020_REG_W_XREG 7 /* extra
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * (indexed by _CONFIG or _SUBADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* in the ADDR_HI register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define RDDATAflag 0x80 /* next access is a read (not a write) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) /* in the DIAGSTAT register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define NEWNXTIDflag 0x02 /* ID to which token is passed has changed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* in the CONFIG register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define RESETcfg 0x80 /* put card in reset state */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define TXENcfg 0x20 /* enable TX */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define XTOcfg(x) ((x) << 3) /* extended timeout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) /* in SETUP register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define PROMISCset 0x10 /* enable RCV_ALL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define P1MODE 0x80 /* enable P1-MODE for Backplane */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define SLOWARB 0x01 /* enable Slow Arbitration for >=5Mbps */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* COM2002x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define SUB_TENTATIVE 0 /* tentative node ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define SUB_NODE 1 /* node ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SUB_SETUP1 2 /* various options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define SUB_TEST 3 /* test/diag register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* COM20022 only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define SUB_SETUP2 4 /* sundry options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define SUB_BUSCTL 5 /* bus control options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define SUB_DMACOUNT 6 /* DMA count options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static inline void com20020_set_subaddress(struct arcnet_local *lp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) int ioaddr, int val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (val < 4) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) lp->config = (lp->config & ~0x03) | val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) arcnet_outb(lp->config, ioaddr, COM20020_REG_W_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) arcnet_outb(val, ioaddr, COM20020_REG_W_SUBADR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #endif /* __COM20020_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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