^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Linux ARCnet driver - COM20020 PCI support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Contemporary Controls PCI20 and SOHARD SH-ARC PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Written 1994-1999 by Avery Pennarun,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * based on an ISA version by David Woodhouse.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Written 1999-2000 by Martin Mares <mj@ucw.cz>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Derived from skeleton.c by Donald Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Special thanks to Contemporary Controls, Inc. (www.ccontrols.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * for sponsoring the further development of this driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * The original copyright of skeleton.c was as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * skeleton.c Written 1993 by Donald Becker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * Copyright 1993 United States Government as represented by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Director, National Security Agency. This software may only be used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * and distributed according to the terms of the GNU General Public License as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * modified by SRC, incorporated herein by reference.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * For more details, see drivers/net/arcnet.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * **********************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define pr_fmt(fmt) "arcnet:" KBUILD_MODNAME ": " fmt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/moduleparam.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/netdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include "arcdevice.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include "com20020.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* Module parameters */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) static int node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) static char device[9]; /* use eg. device="arc1" to change name */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int timeout = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static int backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static int clockp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int clockm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) module_param(node, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) module_param_string(device, device, sizeof(device), 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) module_param(timeout, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) module_param(backplane, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) module_param(clockp, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) module_param(clockm, int, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static void led_tx_set(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) enum led_brightness value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) struct com20020_dev *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) struct com20020_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct com20020_pci_card_info *ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) card = container_of(led_cdev, struct com20020_dev, tx_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) priv = card->pci_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) ci = priv->ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) outb(!!value, priv->misc + ci->leds[card->index].green);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) static void led_recon_set(struct led_classdev *led_cdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) enum led_brightness value)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct com20020_dev *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct com20020_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct com20020_pci_card_info *ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) card = container_of(led_cdev, struct com20020_dev, recon_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) priv = card->pci_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ci = priv->ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) outb(!!value, priv->misc + ci->leds[card->index].red);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static ssize_t backplane_mode_show(struct device *dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) struct device_attribute *attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) char *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) struct net_device *net_dev = to_net_dev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) struct arcnet_local *lp = netdev_priv(net_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return sprintf(buf, "%s\n", lp->backplane ? "true" : "false");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) static DEVICE_ATTR_RO(backplane_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) static struct attribute *com20020_state_attrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) &dev_attr_backplane_mode.attr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) static const struct attribute_group com20020_state_group = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) .name = NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .attrs = com20020_state_attrs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static void com20020pci_remove(struct pci_dev *pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static int com20020pci_probe(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) const struct pci_device_id *id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct com20020_pci_card_info *ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct com20020_pci_channel_map *mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) struct net_device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) struct arcnet_local *lp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) struct com20020_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int i, ioaddr, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) struct resource *r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) if (pci_enable_device(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) priv = devm_kzalloc(&pdev->dev, sizeof(struct com20020_priv),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (!priv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ci = (struct com20020_pci_card_info *)id->driver_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) if (!ci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) priv->ci = ci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) mm = &ci->misc_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) INIT_LIST_HEAD(&priv->list_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (mm->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) ioaddr = pci_resource_start(pdev, mm->bar) + mm->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) r = devm_request_region(&pdev->dev, ioaddr, mm->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) "com20020-pci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (!r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) pr_err("IO region %xh-%xh already allocated.\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) ioaddr, ioaddr + mm->size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) priv->misc = ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) for (i = 0; i < ci->devcount; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) struct com20020_pci_channel_map *cm = &ci->chan_map_tbl[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) struct com20020_dev *card;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) int dev_id_mask = 0xf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) dev = alloc_arcdev(device);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (!dev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) dev->dev_port = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) dev->netdev_ops = &com20020_netdev_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) lp = netdev_priv(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) arc_printk(D_NORMAL, dev, "%s Controls\n", ci->name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) ioaddr = pci_resource_start(pdev, cm->bar) + cm->offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) r = devm_request_region(&pdev->dev, ioaddr, cm->size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) "com20020-pci");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) if (!r) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) pr_err("IO region %xh-%xh already allocated\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ioaddr, ioaddr + cm->size - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) ret = -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* Dummy access after Reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * ARCNET controller needs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) * this access to detect bustype
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) arcnet_outb(0x00, ioaddr, COM20020_REG_W_COMMAND);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) arcnet_inb(ioaddr, COM20020_REG_R_DIAGSTAT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SET_NETDEV_DEV(dev, &pdev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) dev->base_addr = ioaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) dev->dev_addr[0] = node;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) dev->sysfs_groups[0] = &com20020_state_group;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) dev->irq = pdev->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) lp->card_name = "PCI COM20020";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) lp->card_flags = ci->flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) lp->backplane = backplane;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) lp->clockp = clockp & 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) lp->clockm = clockm & 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) lp->timeout = timeout;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) lp->hw.owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) lp->backplane = (inb(priv->misc) >> (2 + i)) & 0x1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) if (!strncmp(ci->name, "EAE PLX-PCI FB2", 15))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) lp->backplane = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) /* Get the dev_id from the PLX rotary coder */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) if (!strncmp(ci->name, "EAE PLX-PCI MA1", 15))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) dev_id_mask = 0x3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) dev->dev_id = (inb(priv->misc + ci->rotary) >> 4) & dev_id_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) snprintf(dev->name, sizeof(dev->name), "arc%d-%d", dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (arcnet_inb(ioaddr, COM20020_REG_R_STATUS) == 0xFF) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) pr_err("IO address %Xh is empty!\n", ioaddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (com20020_check(dev)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ret = -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) card = devm_kzalloc(&pdev->dev, sizeof(struct com20020_dev),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) if (!card) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) ret = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) card->index = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) card->pci_priv = priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) card->tx_led.brightness_set = led_tx_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) card->tx_led.default_trigger = devm_kasprintf(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) GFP_KERNEL, "arc%d-%d-tx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) card->tx_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) "pci:green:tx:%d-%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) card->tx_led.dev = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) card->recon_led.brightness_set = led_recon_set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) card->recon_led.default_trigger = devm_kasprintf(&pdev->dev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) GFP_KERNEL, "arc%d-%d-recon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) card->recon_led.name = devm_kasprintf(&pdev->dev, GFP_KERNEL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) "pci:red:recon:%d-%d",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) card->recon_led.dev = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) card->dev = dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) ret = devm_led_classdev_register(&pdev->dev, &card->tx_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) ret = devm_led_classdev_register(&pdev->dev, &card->recon_led);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) dev_set_drvdata(&dev->dev, card);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) ret = com20020_found(dev, IRQF_SHARED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) goto out_port;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) devm_arcnet_led_init(dev, dev->dev_id, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) list_add(&card->list, &priv->list_dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) pci_set_drvdata(pdev, priv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) out_port:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) com20020pci_remove(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static void com20020pci_remove(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) struct com20020_dev *card, *tmpcard;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) struct com20020_priv *priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) priv = pci_get_drvdata(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) list_for_each_entry_safe(card, tmpcard, &priv->list_dev, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) struct net_device *dev = card->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) unregister_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) free_irq(dev->irq, dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) free_netdev(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) static struct com20020_pci_card_info card_info_10mbit = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .name = "ARC-PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) .devcount = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .flags = ARC_CAN_10MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) static struct com20020_pci_card_info card_info_5mbit = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .name = "ARC-PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .devcount = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) .flags = ARC_IS_5MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct com20020_pci_card_info card_info_sohard = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .name = "PLX-PCI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .devcount = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* SOHARD needs PCI base addr 4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) .bar = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) .size = 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .flags = ARC_CAN_10MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) static struct com20020_pci_card_info card_info_eae_arc1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) .name = "EAE PLX-PCI ARC1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) .devcount = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .misc_map = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .offset = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) .size = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .green = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) .red = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .rotary = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .flags = ARC_CAN_10MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) static struct com20020_pci_card_info card_info_eae_ma1 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) .name = "EAE PLX-PCI MA1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) .devcount = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .offset = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .misc_map = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) .offset = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) .size = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) .green = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) .red = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) }, {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .green = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .red = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) .rotary = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) .flags = ARC_CAN_10MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) static struct com20020_pci_card_info card_info_eae_fb2 = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .name = "EAE PLX-PCI FB2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) .devcount = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) .chan_map_tbl = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .offset = 0x00,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) .size = 0x08,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .misc_map = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .bar = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) .offset = 0x10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .size = 0x04,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) .green = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) .red = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .rotary = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .flags = ARC_CAN_10MBIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const struct pci_device_id com20020pci_id_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 0x1571, 0xa001,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) 0x1571, 0xa002,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) 0x1571, 0xa003,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) 0x1571, 0xa004,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) 0x1571, 0xa005,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) 0x1571, 0xa006,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) 0x1571, 0xa007,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) 0x1571, 0xa008,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) 0x1571, 0xa009,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) 0x1571, 0xa00a,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) 0x1571, 0xa00b,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) 0x1571, 0xa00c,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) 0x1571, 0xa00d,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) 0x1571, 0xa00e,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) (kernel_ulong_t)&card_info_5mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) 0x1571, 0xa201,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) 0x1571, 0xa202,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) 0x1571, 0xa203,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) 0x1571, 0xa204,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) 0x1571, 0xa205,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) 0x1571, 0xa206,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) 0x10B5, 0x9030,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) 0x10B5, 0x2978,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) (kernel_ulong_t)&card_info_sohard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) 0x10B5, 0x9050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) 0x10B5, 0x2273,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) (kernel_ulong_t)&card_info_sohard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) 0x10B5, 0x9050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) 0x10B5, 0x3263,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) (kernel_ulong_t)&card_info_eae_arc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) 0x10B5, 0x9050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) 0x10B5, 0x3292,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) (kernel_ulong_t)&card_info_eae_ma1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) 0x10B5, 0x9050,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) 0x10B5, 0x3294,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) (kernel_ulong_t)&card_info_eae_fb2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) 0x14BA, 0x6000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) 0x10B5, 0x2200,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) PCI_ANY_ID, PCI_ANY_ID,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 0, 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) (kernel_ulong_t)&card_info_10mbit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) MODULE_DEVICE_TABLE(pci, com20020pci_id_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static struct pci_driver com20020pci_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) .name = "com20020",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) .id_table = com20020pci_id_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .probe = com20020pci_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .remove = com20020pci_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) static int __init com20020pci_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (BUGLVL(D_NORMAL))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) pr_info("%s\n", "COM20020 PCI support");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) return pci_register_driver(&com20020pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) static void __exit com20020pci_cleanup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) pci_unregister_driver(&com20020pci_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) module_init(com20020pci_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) module_exit(com20020pci_cleanup)
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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