^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2005, Intec Automation Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2014, Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/sort.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/mtd/spi-nor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define SFDP_PARAM_HEADER_PTP(p) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) (((p)->parameter_table_pointer[2] << 16) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) ((p)->parameter_table_pointer[1] << 8) | \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ((p)->parameter_table_pointer[0] << 0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define SFDP_SIGNATURE 0x50444653U
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct sfdp_header {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) u32 signature; /* Ox50444653U <=> "SFDP" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) u8 minor;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) u8 major;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) u8 nph; /* 0-base number of parameter headers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) u8 unused;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /* Basic Flash Parameter Table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct sfdp_parameter_header bfpt_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* Fast Read settings. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) struct sfdp_bfpt_read {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * whether the Fast Read x-y-z command is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 supported_dword;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 supported_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * encodes the op code, the number of mode clocks and the number of wait
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * states to be used by Fast Read x-y-z command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 settings_dword;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 settings_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) /* The SPI protocol for this Fast Read x-y-z command. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) enum spi_nor_protocol proto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct sfdp_bfpt_erase {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * The half-word at offset <shift> in DWORD <dwoard> encodes the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * op code and erase sector size to be used by Sector Erase commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) u32 dword;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) u32 shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define SMPT_CMD_READ_DUMMY_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define SMPT_CMD_READ_DUMMY(_cmd) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define SMPT_CMD_READ_DATA_SHIFT 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define SMPT_CMD_READ_DATA(_cmd) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define SMPT_CMD_OPCODE_MASK GENMASK(15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define SMPT_CMD_OPCODE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define SMPT_CMD_OPCODE(_cmd) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define SMPT_MAP_REGION_COUNT_SHIFT 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define SMPT_MAP_REGION_COUNT(_header) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) SMPT_MAP_REGION_COUNT_SHIFT) + 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #define SMPT_MAP_ID_MASK GENMASK(15, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define SMPT_MAP_ID_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define SMPT_MAP_ID(_header) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define SMPT_MAP_REGION_SIZE_SHIFT 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define SMPT_MAP_REGION_SIZE(_region) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define SMPT_MAP_REGION_ERASE_TYPE(_region) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define SMPT_DESC_TYPE_MAP BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define SMPT_DESC_END BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define SFDP_4BAIT_DWORD_MAX 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) struct sfdp_4bait {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* The hardware capability. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u32 hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * the associated 4-byte address op code is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) u32 supported_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * spi_nor_read_raw() - raw read of serial flash memory. read_opcode,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * addr_width and read_dummy members of the struct spi_nor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) * should be previously
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * set.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * @addr: offset in the serial flash memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * @len: number of bytes to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * @buf: buffer where the data is copied into (dma-safe memory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ssize_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) while (len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ret = spi_nor_read_data(nor, addr, len, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) if (!ret || ret > len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return -EIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) buf += ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) addr += ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) len -= ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * @addr: offset in the SFDP area to start reading data from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * @len: number of bytes to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * @buf: buffer where the SFDP data are copied into (dma-safe memory)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) * Whatever the actual numbers of bytes for address and dummy cycles are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * followed by a 3-byte address and 8 dummy clock cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) size_t len, void *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) u8 addr_width, read_opcode, read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) read_opcode = nor->read_opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) addr_width = nor->addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) read_dummy = nor->read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) nor->read_opcode = SPINOR_OP_RDSFDP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) nor->addr_width = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) nor->read_dummy = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) ret = spi_nor_read_raw(nor, addr, len, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) nor->read_opcode = read_opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) nor->addr_width = addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) nor->read_dummy = read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) * @addr: offset in the SFDP area to start reading data from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * @len: number of bytes to read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * @buf: buffer where the SFDP data are copied into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * guaranteed to be dma-safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) size_t len, void *buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) void *dma_safe_buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) dma_safe_buf = kmalloc(len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) if (!dma_safe_buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) memcpy(buf, dma_safe_buf, len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) kfree(dma_safe_buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) u16 half,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) enum spi_nor_protocol proto)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) read->num_mode_clocks = (half >> 5) & 0x07;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) read->num_wait_states = (half >> 0) & 0x1f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) read->opcode = (half >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) read->proto = proto;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* Fast Read 1-1-2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SNOR_HWCAPS_READ_1_1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) BFPT_DWORD(1), BIT(16), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) BFPT_DWORD(4), 0, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SNOR_PROTO_1_1_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Fast Read 1-2-2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) SNOR_HWCAPS_READ_1_2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) BFPT_DWORD(1), BIT(20), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) BFPT_DWORD(4), 16, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SNOR_PROTO_1_2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) /* Fast Read 2-2-2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) SNOR_HWCAPS_READ_2_2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) BFPT_DWORD(5), BIT(0), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) BFPT_DWORD(6), 16, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) SNOR_PROTO_2_2_2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* Fast Read 1-1-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) SNOR_HWCAPS_READ_1_1_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) BFPT_DWORD(1), BIT(22), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) BFPT_DWORD(3), 16, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) SNOR_PROTO_1_1_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) /* Fast Read 1-4-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SNOR_HWCAPS_READ_1_4_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) BFPT_DWORD(1), BIT(21), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) BFPT_DWORD(3), 0, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) SNOR_PROTO_1_4_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) /* Fast Read 4-4-4 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) SNOR_HWCAPS_READ_4_4_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) BFPT_DWORD(5), BIT(4), /* Supported bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) BFPT_DWORD(7), 16, /* Settings */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) SNOR_PROTO_4_4_4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* Erase Type 1 in DWORD8 bits[15:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) {BFPT_DWORD(8), 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) /* Erase Type 2 in DWORD8 bits[31:16] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) {BFPT_DWORD(8), 16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /* Erase Type 3 in DWORD9 bits[15:0] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) {BFPT_DWORD(9), 0},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) /* Erase Type 4 in DWORD9 bits[31:16] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) {BFPT_DWORD(9), 16},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) * @erase: pointer to a structure that describes a SPI NOR erase type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) * @size: the size of the sector/block erased by the erase type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) * @opcode: the SPI command op code to erase the sector/block
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * @i: erase type index as sorted in the Basic Flash Parameter Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) * The supported Erase Types will be sorted at init in ascending order, with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) * the smallest Erase Type size being the first member in the erase_type array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) * the Basic Flash Parameter Table since it will be used later on to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) * synchronize with the supported Erase Types defined in SFDP optional tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) u32 size, u8 opcode, u8 i)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) erase->idx = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) spi_nor_set_erase_type(erase, size, opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) * spi_nor_map_cmp_erase_type() - compare the map's erase types by size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) * @l: member in the left half of the map's erase_type array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * @r: member in the right half of the map's erase_type array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) * Comparison function used in the sort() call to sort in ascending order the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) * map's erase types, the smallest erase type size being the first member in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) * sorted erase_type array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) * Return: the result of @l->size - @r->size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) static int spi_nor_map_cmp_erase_type(const void *l, const void *r)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) const struct spi_nor_erase_type *left = l, *right = r;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) return left->size - right->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) * spi_nor_sort_erase_mask() - sort erase mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) * @map: the erase map of the SPI NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) * @erase_mask: the erase type mask to be sorted
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * Replicate the sort done for the map's erase types in BFPT: sort the erase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) * mask in ascending order with the smallest erase type size starting from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) * BIT(0) in the sorted erase mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) * Return: sorted erase mask.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) struct spi_nor_erase_type *erase_type = map->erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) u8 sorted_erase_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) if (!erase_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) /* Replicate the sort done for the map's erase types. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) sorted_erase_mask |= BIT(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) return sorted_erase_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) * spi_nor_regions_sort_erase_types() - sort erase types in each region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) * @map: the erase map of the SPI NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) * Function assumes that the erase types defined in the erase map are already
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) * sorted in ascending order, with the smallest erase type size being the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) * member in the erase_type array. It replicates the sort done for the map's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) * erase types. Each region's erase bitmask will indicate which erase types are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) * supported from the sorted erase types defined in the erase map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) * Sort the all region's erase type at init in order to speed up the process of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) * finding the best erase command at runtime.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) struct spi_nor_erase_region *region = map->regions;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) u8 region_erase_mask, sorted_erase_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) while (region) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) sorted_erase_mask = spi_nor_sort_erase_mask(map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) region_erase_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) /* Overwrite erase mask. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) sorted_erase_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) region = spi_nor_region_next(region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * the Basic Flash Parameter Table length and version
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * @params: pointer to the 'struct spi_nor_flash_parameter' to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * filled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) * The Basic Flash Parameter Table is the main and only mandatory table as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) * defined by the SFDP (JESD216) specification.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) * It provides us with the total size (memory density) of the data array and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) * the number of address bytes for Fast Read, Page Program and Sector Erase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * For Fast READ commands, it also gives the number of mode clock cycles and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) * wait states (regrouped in the number of dummy clock cycles) for each
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) * supported instruction op code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) * For Page Program, the page size is now available since JESD216 rev A, however
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) * the supported instruction op codes are still not provided.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) * For Sector Erase commands, this table stores the supported instruction op
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) * codes and the associated sector sizes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) * Finally, the Quad Enable Requirements (QER) are also available since JESD216
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) * rev A. The QER bits encode the manufacturer dependent procedure to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) * executed to set the Quad Enable (QE) bit in some internal register of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) * Quad SPI memory. Indeed the QE bit, when it exists, must be set before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) * sending any Quad SPI command to the memory. Actually, setting the QE bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) * and IO3 hence enabling 4 (Quad) I/O lines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static int spi_nor_parse_bfpt(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) const struct sfdp_parameter_header *bfpt_header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) struct spi_nor_flash_parameter *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct spi_nor_erase_map *map = ¶ms->erase_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) struct spi_nor_erase_type *erase_type = map->erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) struct sfdp_bfpt bfpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) int i, cmd, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) u32 addr, val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) u16 half;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) u8 erase_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) if (bfpt_header->length < BFPT_DWORD_MAX_JESD216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* Read the Basic Flash Parameter Table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) len = min_t(size_t, sizeof(bfpt),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) bfpt_header->length * sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) addr = SFDP_PARAM_HEADER_PTP(bfpt_header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) memset(&bfpt, 0, sizeof(bfpt));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) /* Fix endianness of the BFPT DWORDs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) /* Number of address bytes. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) case BFPT_DWORD1_ADDRESS_BYTES_3_OR_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) nor->addr_width = 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) nor->addr_width = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) /* Flash Memory Density (in bits). */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) val = bfpt.dwords[BFPT_DWORD(2)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (val & BIT(31)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) val &= ~BIT(31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * Prevent overflows on params->size. Anyway, a NOR of 2^64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * bits is unlikely to exist so this error probably means
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * the BFPT we are reading is corrupted/wrong.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) if (val > 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) params->size = 1ULL << val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) params->size = val + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) params->size >>= 3; /* Convert to bytes. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* Fast Read settings. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) struct spi_nor_read_command *read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) params->hwcaps.mask &= ~rd->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) params->hwcaps.mask |= rd->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) read = ¶ms->reads[cmd];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) spi_nor_set_read_settings_from_bfpt(read, half, rd->proto);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) * Sector Erase settings. Reinitialize the uniform erase map using the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) * Erase Types defined in the bfpt table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) erase_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) memset(¶ms->erase_map, 0, sizeof(params->erase_map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) u32 erasesize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) u8 opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) half = bfpt.dwords[er->dword] >> er->shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) erasesize = half & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* erasesize == 0 means this Erase Type is not supported. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) if (!erasesize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) erasesize = 1U << erasesize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) opcode = (half >> 8) & 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) erase_mask |= BIT(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) opcode, i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) spi_nor_init_uniform_erase_map(map, erase_mask, params->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) * Sort all the map's Erase Types in ascending order with the smallest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) * erase size being the first member in the erase_type array.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) spi_nor_map_cmp_erase_type, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) * Sort the erase types in the uniform region in order to update the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) * uniform_erase_type bitmask. The bitmask will be used later on when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) * selecting the uniform erase.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) spi_nor_regions_sort_erase_types(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) map->uniform_erase_type = map->uniform_region.offset &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) SNOR_ERASE_TYPE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) /* Stop here if not JESD216 rev A or later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (bfpt_header->length == BFPT_DWORD_MAX_JESD216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* Page size: this field specifies 'N' so the page size = 2^N bytes. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) val = bfpt.dwords[BFPT_DWORD(11)];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) val &= BFPT_DWORD11_PAGE_SIZE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) val >>= BFPT_DWORD11_PAGE_SIZE_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) params->page_size = 1U << val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) /* Quad Enable Requirements. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case BFPT_DWORD15_QER_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) params->quad_enable = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) case BFPT_DWORD15_QER_SR2_BIT1_BUGGY:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) * Writing only one byte to the Status Register has the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) * side-effect of clearing Status Register 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) case BFPT_DWORD15_QER_SR2_BIT1_NO_RD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) * Read Configuration Register (35h) instruction is not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) * supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) params->quad_enable = spi_nor_sr2_bit1_quad_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) case BFPT_DWORD15_QER_SR1_BIT6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) nor->flags &= ~SNOR_F_HAS_16BIT_SR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) params->quad_enable = spi_nor_sr1_bit6_quad_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) case BFPT_DWORD15_QER_SR2_BIT7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) nor->flags &= ~SNOR_F_HAS_16BIT_SR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) params->quad_enable = spi_nor_sr2_bit7_quad_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) case BFPT_DWORD15_QER_SR2_BIT1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) * JESD216 rev B or later does not specify if writing only one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) * byte to the Status Register clears or not the Status
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) * Register 2, so let's be cautious and keep the default
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) * assumption of a 16-bit Write Status (01h) command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) nor->flags |= SNOR_F_HAS_16BIT_SR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) params->quad_enable = spi_nor_sr2_bit1_quad_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) dev_dbg(nor->dev, "BFPT QER reserved value used\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /* Stop here if not JESD216 rev C or later. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) if (bfpt_header->length == BFPT_DWORD_MAX_JESD216B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) * spi_nor_smpt_addr_width() - return the address width used in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) * configuration detection command.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) * @settings: configuration detection command descriptor, dword1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) static u8 spi_nor_smpt_addr_width(const struct spi_nor *nor, const u32 settings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) case SMPT_CMD_ADDRESS_LEN_0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) case SMPT_CMD_ADDRESS_LEN_3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) return 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) case SMPT_CMD_ADDRESS_LEN_4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) return 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) case SMPT_CMD_ADDRESS_LEN_USE_CURRENT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) return nor->addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) * spi_nor_smpt_read_dummy() - return the configuration detection command read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) * latency, in clock cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) * @settings: configuration detection command descriptor, dword1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * Return: the number of dummy cycles for an SMPT read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) u8 read_dummy = SMPT_CMD_READ_DUMMY(settings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) return nor->read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) return read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * spi_nor_get_map_in_use() - get the configuration map in use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * @smpt: pointer to the sector map parameter table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * @smpt_len: sector map parameter table length
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * Return: pointer to the map in use, ERR_PTR(-errno) otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) u8 smpt_len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) const u32 *ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) u8 *buf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) u8 i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) u8 addr_width, read_opcode, read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) u8 read_data_mask, map_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) buf = kmalloc(sizeof(*buf), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) if (!buf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) return ERR_PTR(-ENOMEM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) addr_width = nor->addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) read_dummy = nor->read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) read_opcode = nor->read_opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) map_id = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) /* Determine if there are any optional Detection Command Descriptors */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) for (i = 0; i < smpt_len; i += 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (smpt[i] & SMPT_DESC_TYPE_MAP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) read_data_mask = SMPT_CMD_READ_DATA(smpt[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) nor->addr_width = spi_nor_smpt_addr_width(nor, smpt[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) addr = smpt[i + 1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) err = spi_nor_read_raw(nor, addr, 1, buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) ret = ERR_PTR(err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * Build an index value that is used to select the Sector Map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * Configuration that is currently in use.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) map_id = map_id << 1 | !!(*buf & read_data_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) * If command descriptors are provided, they always precede map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) * descriptors in the table. There is no need to start the iteration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * over smpt array all over again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) * Find the matching configuration map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) ret = ERR_PTR(-EINVAL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) while (i < smpt_len) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) if (SMPT_MAP_ID(smpt[i]) == map_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ret = smpt + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * If there are no more configuration map descriptors and no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) * configuration ID matched the configuration identifier, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) * sector address map is unknown.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) if (smpt[i] & SMPT_DESC_END)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) /* increment the table index to the next map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) /* fall through */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) kfree(buf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) nor->addr_width = addr_width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) nor->read_dummy = read_dummy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) nor->read_opcode = read_opcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) static void spi_nor_region_mark_end(struct spi_nor_erase_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) region->offset |= SNOR_LAST_REGION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) region->offset |= SNOR_OVERLAID_REGION;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) * @region: pointer to a structure that describes a SPI NOR erase region
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) * @erase: pointer to a structure that describes a SPI NOR erase type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) * @erase_type: erase type bitmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) spi_nor_region_check_overlay(struct spi_nor_erase_region *region,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) const struct spi_nor_erase_type *erase,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) const u8 erase_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (!(erase[i].size && erase_type & BIT(erase[i].idx)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) if (region->size & erase[i].size_mask) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) spi_nor_region_mark_overlay(region);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) * @params: pointer to a duplicate 'struct spi_nor_flash_parameter' that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) * used for storing SFDP parsed data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) * @smpt: pointer to the sector map parameter table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) spi_nor_init_non_uniform_erase_map(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) struct spi_nor_flash_parameter *params,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) const u32 *smpt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) struct spi_nor_erase_map *map = ¶ms->erase_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) struct spi_nor_erase_type *erase = map->erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) struct spi_nor_erase_region *region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) u64 offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790) u32 region_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) u8 uniform_erase_type, save_uniform_erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) u8 erase_type, regions_erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) region_count = SMPT_MAP_REGION_COUNT(*smpt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) * The regions will be freed when the driver detaches from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) * device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) region = devm_kcalloc(nor->dev, region_count, sizeof(*region),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) if (!region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) map->regions = region;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) uniform_erase_type = 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) regions_erase_type = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) /* Populate regions. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) for (i = 0; i < region_count; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) j = i + 1; /* index for the region dword */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) region[i].offset = offset | erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) spi_nor_region_check_overlay(®ion[i], erase, erase_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) * Save the erase types that are supported in all regions and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) * can erase the entire flash memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) uniform_erase_type &= erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) * regions_erase_type mask will indicate all the erase types
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) * supported in this configuration map.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) regions_erase_type |= erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) region[i].size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) spi_nor_region_mark_end(®ion[i - 1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) save_uniform_erase_type = map->uniform_erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) map->uniform_erase_type = spi_nor_sort_erase_mask(map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) uniform_erase_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) if (!regions_erase_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) * Roll back to the previous uniform_erase_type mask, SMPT is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) * broken.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) map->uniform_erase_type = save_uniform_erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) * BFPT advertises all the erase types supported by all the possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * map configurations. Mask out the erase types that are not supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) * by the current map configuration.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) if (!(regions_erase_type & BIT(erase[i].idx)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) spi_nor_set_erase_type(&erase[i], 0, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * spi_nor_parse_smpt() - parse Sector Map Parameter Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) * @smpt_header: sector map parameter table header
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) * @params: pointer to a duplicate 'struct spi_nor_flash_parameter'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) * that is used for storing SFDP parsed data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) * This table is optional, but when available, we parse it to identify the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) * location and size of sectors within the main data array of the flash memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) * device and to identify which Erase Types are supported by each sector.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) static int spi_nor_parse_smpt(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) const struct sfdp_parameter_header *smpt_header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) struct spi_nor_flash_parameter *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) const u32 *sector_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) u32 *smpt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) u32 addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) /* Read the Sector Map Parameter Table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) len = smpt_header->length * sizeof(*smpt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) smpt = kmalloc(len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) if (!smpt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) addr = SFDP_PARAM_HEADER_PTP(smpt_header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) ret = spi_nor_read_sfdp(nor, addr, len, smpt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) /* Fix endianness of the SMPT DWORDs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) le32_to_cpu_array(smpt, smpt_header->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) if (IS_ERR(sector_map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) ret = PTR_ERR(sector_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) ret = spi_nor_init_non_uniform_erase_map(nor, params, sector_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) spi_nor_regions_sort_erase_types(¶ms->erase_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) /* fall through */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) kfree(smpt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) * @nor: pointer to a 'struct spi_nor'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) * @param_header: pointer to the 'struct sfdp_parameter_header' describing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) * the 4-Byte Address Instruction Table length and version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) * @params: pointer to the 'struct spi_nor_flash_parameter' to be.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) static int spi_nor_parse_4bait(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) const struct sfdp_parameter_header *param_header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) struct spi_nor_flash_parameter *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) static const struct sfdp_4bait reads[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) { SNOR_HWCAPS_READ, BIT(0) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) { SNOR_HWCAPS_READ_FAST, BIT(1) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) { SNOR_HWCAPS_READ_1_1_2, BIT(2) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) { SNOR_HWCAPS_READ_1_2_2, BIT(3) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) { SNOR_HWCAPS_READ_1_1_4, BIT(4) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) { SNOR_HWCAPS_READ_1_4_4, BIT(5) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) static const struct sfdp_4bait programs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) { SNOR_HWCAPS_PP, BIT(6) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) { SNOR_HWCAPS_PP_1_1_4, BIT(7) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) { SNOR_HWCAPS_PP_1_4_4, BIT(8) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) { 0u /* not used */, BIT(9) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) { 0u /* not used */, BIT(10) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) { 0u /* not used */, BIT(11) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) { 0u /* not used */, BIT(12) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) struct spi_nor_pp_command *params_pp = params->page_programs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) struct spi_nor_erase_map *map = ¶ms->erase_map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) struct spi_nor_erase_type *erase_type = map->erase_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) u32 *dwords;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) size_t len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) int i, ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) if (param_header->major != SFDP_JESD216_MAJOR ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) param_header->length < SFDP_4BAIT_DWORD_MAX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) /* Read the 4-byte Address Instruction Table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) dwords = kmalloc(len, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) if (!dwords)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) addr = SFDP_PARAM_HEADER_PTP(param_header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) ret = spi_nor_read_sfdp(nor, addr, len, dwords);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) /* Fix endianness of the 4BAIT DWORDs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975) le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) * Compute the subset of (Fast) Read commands for which the 4-byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) * version is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) discard_hwcaps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) read_hwcaps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) for (i = 0; i < ARRAY_SIZE(reads); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984) const struct sfdp_4bait *read = &reads[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) discard_hwcaps |= read->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) if ((params->hwcaps.mask & read->hwcaps) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988) (dwords[0] & read->supported_bit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) read_hwcaps |= read->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) * Compute the subset of Page Program commands for which the 4-byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) * version is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) pp_hwcaps = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) for (i = 0; i < ARRAY_SIZE(programs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998) const struct sfdp_4bait *program = &programs[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) * The 4 Byte Address Instruction (Optional) Table is the only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) * SFDP table that indicates support for Page Program Commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) * Bypass the params->hwcaps.mask and consider 4BAIT the biggest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * authority for specifying Page Program support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) discard_hwcaps |= program->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) if (dwords[0] & program->supported_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) pp_hwcaps |= program->hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) * Compute the subset of Sector Erase commands for which the 4-byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) * version is supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) erase_mask = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) const struct sfdp_4bait *erase = &erases[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) if (dwords[0] & erase->supported_bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) erase_mask |= BIT(i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) /* Replicate the sort done for the map's erase types in BFPT. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) erase_mask = spi_nor_sort_erase_mask(map, erase_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) * We need at least one 4-byte op code per read, program and erase
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) * operation; the .read(), .write() and .erase() hooks share the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) * nor->addr_width value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) if (!read_hwcaps || !pp_hwcaps || !erase_mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) * Discard all operations from the 4-byte instruction set which are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) * not supported by this memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) params->hwcaps.mask &= ~discard_hwcaps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) params->hwcaps.mask |= (read_hwcaps | pp_hwcaps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) /* Use the 4-byte address instruction set. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) for (i = 0; i < SNOR_CMD_READ_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) struct spi_nor_read_command *read_cmd = ¶ms->reads[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) /* 4BAIT is the only SFDP table that indicates page program support. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) if (pp_hwcaps & SNOR_HWCAPS_PP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) SPINOR_OP_PP_1_1_4_4B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) SNOR_PROTO_1_1_4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) SPINOR_OP_PP_1_4_4_4B,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) SNOR_PROTO_1_4_4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) if (erase_mask & BIT(i))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) erase_type[i].opcode = (dwords[1] >>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) erase_type[i].idx * 8) & 0xFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) spi_nor_set_erase_type(&erase_type[i], 0u, 0xFF);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) * later because we already did the conversion to 4byte opcodes. Also,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) * this latest function implements a legacy quirk for the erase size of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) * Spansion memory. However this quirk is no longer needed with new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) * SFDP compliant memories.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) nor->addr_width = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079) /* fall through */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) kfree(dwords);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) * @nor: pointer to a 'struct spi_nor'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) * @params: pointer to the 'struct spi_nor_flash_parameter' to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) * filled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * specification. This is a standard which tends to supported by almost all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) * runtime the main parameters needed to perform basic SPI flash operations such
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * as Fast Read, Page Program or Sector Erase commands.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) * Return: 0 on success, -errno otherwise.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) int spi_nor_parse_sfdp(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) struct spi_nor_flash_parameter *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) const struct sfdp_parameter_header *param_header, *bfpt_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) struct sfdp_parameter_header *param_headers = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) struct sfdp_header header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105) struct device *dev = nor->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) size_t psize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) int i, err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) /* Get the SFDP header. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) if (err < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) /* Check the SFDP header version. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) if (le32_to_cpu(header.signature) != SFDP_SIGNATURE ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) header.major != SFDP_JESD216_MAJOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) * Verify that the first and only mandatory parameter header is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) * Basic Flash Parameter Table header as specified in JESD216.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) bfpt_header = &header.bfpt_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) bfpt_header->major != SFDP_JESD216_MAJOR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) * Allocate memory then read all parameter headers with a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * Read SFDP command. These parameter headers will actually be parsed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) * twice: a first time to get the latest revision of the basic flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) * parameter table, then a second time to handle the supported optional
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) * tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) * Hence we read the parameter headers once for all to reduce the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) * processing time. Also we use kmalloc() instead of devm_kmalloc()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) * because we don't need to keep these parameter headers: the allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) * memory is always released with kfree() before exiting this function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) if (header.nph) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) psize = header.nph * sizeof(*param_headers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) param_headers = kmalloc(psize, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) if (!param_headers)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) err = spi_nor_read_sfdp(nor, sizeof(header),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) psize, param_headers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) if (err < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) dev_dbg(dev, "failed to read SFDP parameter headers\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) * Check other parameter headers to get the latest revision of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156) * the basic flash parameter table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158) for (i = 0; i < header.nph; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) param_header = ¶m_headers[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162) param_header->major == SFDP_JESD216_MAJOR &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) (param_header->minor > bfpt_header->minor ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164) (param_header->minor == bfpt_header->minor &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) param_header->length > bfpt_header->length)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166) bfpt_header = param_header;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) err = spi_nor_parse_bfpt(nor, bfpt_header, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) goto exit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) /* Parse optional parameter tables. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) for (i = 0; i < header.nph; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) param_header = ¶m_headers[i];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) switch (SFDP_PARAM_HEADER_ID(param_header)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) case SFDP_SECTOR_MAP_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179) err = spi_nor_parse_smpt(nor, param_header, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) case SFDP_4BAIT_ID:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) err = spi_nor_parse_4bait(nor, param_header, params);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) dev_warn(dev, "Failed to parse optional parameter table: %04x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192) SFDP_PARAM_HEADER_ID(param_header));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) * Let's not drop all information we extracted so far
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195) * if optional table parsers fail. In case of failing,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) * each optional parser is responsible to roll back to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * the previously known spi_nor data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) kfree(param_headers);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206) }