Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2005, Intec Automation Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2014, Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/mtd/spi-nor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) is25lp256_post_bfpt_fixups(struct spi_nor *nor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 			   const struct sfdp_parameter_header *bfpt_header,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 			   const struct sfdp_bfpt *bfpt,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 			   struct spi_nor_flash_parameter *params)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	 * IS25LP256 supports 4B opcodes, but the BFPT advertises a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	 * BFPT_DWORD1_ADDRESS_BYTES_3_ONLY address width.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	 * Overwrite the address width advertised by the BFPT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 	if ((bfpt->dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) ==
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 		BFPT_DWORD1_ADDRESS_BYTES_3_ONLY)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 		nor->addr_width = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static struct spi_nor_fixups is25lp256_fixups = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	.post_bfpt = is25lp256_post_bfpt_fixups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) static const struct flash_info issi_parts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	/* ISSI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	{ "is25cd512",  INFO(0x7f9d20, 0, 32 * 1024,   2, SECT_4K) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	{ "is25lq040b", INFO(0x9d4013, 0, 64 * 1024,   8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	{ "is25lp016d", INFO(0x9d6015, 0, 64 * 1024,  32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	{ "is25lp080d", INFO(0x9d6014, 0, 64 * 1024,  16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	{ "is25lp032",  INFO(0x9d6016, 0, 64 * 1024,  64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 			     SECT_4K | SPI_NOR_DUAL_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	{ "is25lp064",  INFO(0x9d6017, 0, 64 * 1024, 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 			     SECT_4K | SPI_NOR_DUAL_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	{ "is25lp128",  INFO(0x9d6018, 0, 64 * 1024, 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 			     SECT_4K | SPI_NOR_DUAL_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	{ "is25lp256",  INFO(0x9d6019, 0, 64 * 1024, 512,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 			     SPI_NOR_4B_OPCODES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		.fixups = &is25lp256_fixups },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	{ "is25wp032",  INFO(0x9d7016, 0, 64 * 1024,  64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	{ "is25wp064",  INFO(0x9d7017, 0, 64 * 1024, 128,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	{ "is25wp128",  INFO(0x9d7018, 0, 64 * 1024, 256,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	{ "is25wp256", INFO(0x9d7019, 0, 64 * 1024, 512,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 			    SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 			    SPI_NOR_4B_OPCODES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		.fixups = &is25lp256_fixups },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	/* PMC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	{ "pm25lv512",   INFO(0,        0, 32 * 1024,    2, SECT_4K_PMC) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	{ "pm25lv010",   INFO(0,        0, 32 * 1024,    4, SECT_4K_PMC) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	{ "pm25lq032",   INFO(0x7f9d46, 0, 64 * 1024,   64, SECT_4K) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static void issi_default_init(struct spi_nor *nor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static const struct spi_nor_fixups issi_fixups = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	.default_init = issi_default_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const struct spi_nor_manufacturer spi_nor_issi = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	.name = "issi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	.parts = issi_parts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	.nparts = ARRAY_SIZE(issi_parts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	.fixups = &issi_fixups,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) };