^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2005, Intec Automation Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2014, Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/mtd/spi-nor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) static const struct flash_info everspin_parts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) /* Everspin */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) { "mr25h128", CAT25_INFO(16 * 1024, 1, 256, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) { "mr25h256", CAT25_INFO(32 * 1024, 1, 256, 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) { "mr25h10", CAT25_INFO(128 * 1024, 1, 256, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) { "mr25h40", CAT25_INFO(512 * 1024, 1, 256, 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPI_NOR_NO_ERASE | SPI_NOR_NO_FR) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) const struct spi_nor_manufacturer spi_nor_everspin = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .name = "everspin",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) .parts = everspin_parts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .nparts = ARRAY_SIZE(everspin_parts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) };