Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Copyright (C) 2005, Intec Automation Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * Copyright (C) 2014, Freescale Semiconductor, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #include <linux/mtd/spi-nor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include "core.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * The Atmel AT25FS010/AT25FS040 parts have some weird configuration for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * block protection bits. We don't support them. But legacy behavior in linux
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * is to unlock the whole flash array on startup. Therefore, we have to support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * exactly this operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static int atmel_at25fs_lock(struct spi_nor *nor, loff_t ofs, uint64_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) static int atmel_at25fs_unlock(struct spi_nor *nor, loff_t ofs, uint64_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	/* We only support unlocking the whole flash array */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	if (ofs || len != nor->params->size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 		return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	/* Write 0x00 to the status register to disable write protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	ret = spi_nor_write_sr_and_check(nor, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 		dev_dbg(nor->dev, "unable to clear BP bits, WP# asserted?\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static int atmel_at25fs_is_locked(struct spi_nor *nor, loff_t ofs, uint64_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	return -EOPNOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static const struct spi_nor_locking_ops atmel_at25fs_locking_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	.lock = atmel_at25fs_lock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 	.unlock = atmel_at25fs_unlock,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	.is_locked = atmel_at25fs_is_locked,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static void atmel_at25fs_default_init(struct spi_nor *nor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	nor->params->locking_ops = &atmel_at25fs_locking_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct spi_nor_fixups atmel_at25fs_fixups = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	.default_init = atmel_at25fs_default_init,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) static const struct flash_info atmel_parts[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	/* Atmel -- some are (confusingly) marketed as "DataFlash" */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	{ "at25fs010",  INFO(0x1f6601, 0, 32 * 1024,   4, SECT_4K | SPI_NOR_HAS_LOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 		.fixups = &atmel_at25fs_fixups },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	{ "at25fs040",  INFO(0x1f6604, 0, 64 * 1024,   8, SECT_4K | SPI_NOR_HAS_LOCK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 		.fixups = &atmel_at25fs_fixups },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	{ "at25df041a", INFO(0x1f4401, 0, 64 * 1024,   8, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	{ "at25df321",  INFO(0x1f4700, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	{ "at25df321a", INFO(0x1f4701, 0, 64 * 1024,  64, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	{ "at25df641",  INFO(0x1f4800, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	{ "at25sl321",	INFO(0x1f4216, 0, 64 * 1024, 64,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 			     SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	{ "at26f004",   INFO(0x1f0400, 0, 64 * 1024,  8, SECT_4K) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	{ "at26df081a", INFO(0x1f4501, 0, 64 * 1024, 16, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	{ "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	{ "at26df321",  INFO(0x1f4700, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	{ "at45db081d", INFO(0x1f2500, 0, 64 * 1024, 16, SECT_4K) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) const struct spi_nor_manufacturer spi_nor_atmel = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	.name = "atmel",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	.parts = atmel_parts,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	.nparts = ARRAY_SIZE(atmel_parts),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };