^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2021 Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Dingqiang Lin <jon.lin@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mtd/spinand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SPINAND_MFR_UNIM 0xA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static SPINAND_OP_VARIANTS(read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static SPINAND_OP_VARIANTS(write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static SPINAND_OP_VARIANTS(update_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int tx25g01_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) region->offset = (16 * section) + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) region->length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int tx25g01_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) region->offset = (16 * section) + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) region->length = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct mtd_ooblayout_ops tx25g01_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .ecc = tx25g01_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .free = tx25g01_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * ecc bits: 0xC0[4,6]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * [0b000], No bit errors were detected;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * [0b001, 0b011], 1~3 Bit errors were detected and corrected. Not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * reach Flipping Bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * [0b100], Bit error count equals the bit flip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * detection threshold
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * others, Reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static int tx25g01_ecc_get_status(struct spinand_device *spinand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 eccsr = (status & GENMASK(6, 4)) >> 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (eccsr <= 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return eccsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) else if (eccsr == 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static const struct spinand_info unim_spinand_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) SPINAND_INFO("TX25G01",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) SPINAND_ECCINFO(&tx25g01_ooblayout, tx25g01_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static const struct spinand_manufacturer_ops unim_spinand_manuf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) const struct spinand_manufacturer unim_spinand_manufacturer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .id = SPINAND_MFR_UNIM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .name = "UNIM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .chips = unim_spinand_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .nchips = ARRAY_SIZE(unim_spinand_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .ops = &unim_spinand_manuf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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