^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018 exceet electronics GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (c) 2018 Kontron Electronics GmbH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Frieder Schrempf <frieder.schrempf@kontron.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mtd/spinand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* Kioxia is new name of Toshiba memory. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define SPINAND_MFR_TOSHIBA 0x98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define TOSH_STATUS_ECC_HAS_BITFLIPS_T (3 << 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) static SPINAND_OP_VARIANTS(read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static SPINAND_OP_VARIANTS(write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static SPINAND_OP_VARIANTS(update_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * Backward compatibility for 1st generation Serial NAND devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * which don't support Quad Program Load operation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) static SPINAND_OP_VARIANTS(write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static SPINAND_OP_VARIANTS(update_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static int tx58cxgxsxraix_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (section > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) region->offset = mtd->oobsize / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) region->length = mtd->oobsize / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static int tx58cxgxsxraix_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) if (section > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* 2 bytes reserved for BBM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) region->offset = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) region->length = (mtd->oobsize / 2) - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct mtd_ooblayout_ops tx58cxgxsxraix_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .ecc = tx58cxgxsxraix_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .free = tx58cxgxsxraix_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) static int tx58cxgxsxraix_ecc_get_status(struct spinand_device *spinand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) struct nand_device *nand = spinand_to_nand(spinand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u8 mbf = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) struct spi_mem_op op = SPINAND_GET_FEATURE_OP(0x30, &mbf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) switch (status & STATUS_ECC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) case STATUS_ECC_NO_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) case STATUS_ECC_UNCOR_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) case STATUS_ECC_HAS_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) case TOSH_STATUS_ECC_HAS_BITFLIPS_T:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Let's try to retrieve the real maximum number of bitflips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * in order to avoid forcing the wear-leveling layer to move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * data around if it's not necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (spi_mem_exec_op(spinand->spimem, &op))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return nanddev_get_ecc_requirements(nand)->strength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mbf >>= 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) if (WARN_ON(mbf > nanddev_get_ecc_requirements(nand)->strength || !mbf))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return nanddev_get_ecc_requirements(nand)->strength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return mbf;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static const struct spinand_info toshiba_spinand_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* 3.3V 1Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) SPINAND_INFO("TC58CVG0S3HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) /* 3.3V 2Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) SPINAND_INFO("TC58CVG1S3HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* 3.3V 4Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) SPINAND_INFO("TC58CVG2S0HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xCD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* 1.8V 1Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) SPINAND_INFO("TC58CYG0S3HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /* 1.8V 2Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) SPINAND_INFO("TC58CYG1S3HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /* 1.8V 4Gb (1st generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) SPINAND_INFO("TC58CYG2S0HRAIG",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xBD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * 2nd generation serial nand has HOLD_D which is equivalent to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * QE_BIT.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* 3.3V 1Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) SPINAND_INFO("TC58CVG0S3HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) /* 3.3V 2Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) SPINAND_INFO("TC58CVG1S3HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xEB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* 3.3V 4Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) SPINAND_INFO("TC58CVG2S0HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xED),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) /* 3.3V 8Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) SPINAND_INFO("TH58CVG3S0HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* 1.8V 1Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) SPINAND_INFO("TC58CYG0S3HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) /* 1.8V 2Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) SPINAND_INFO("TC58CYG1S3HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDB),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) /* 1.8V 4Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) SPINAND_INFO("TC58CYG2S0HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xDD),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) NAND_MEMORG(1, 4096, 256, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) /* 1.8V 8Gb (2nd generation) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) SPINAND_INFO("TH58CYG3S0HRAIJ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) NAND_MEMORG(1, 4096, 256, 64, 4096, 80, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) NAND_ECCREQ(8, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) &write_cache_x4_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) &update_cache_x4_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) SPINAND_ECCINFO(&tx58cxgxsxraix_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) tx58cxgxsxraix_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static const struct spinand_manufacturer_ops toshiba_spinand_manuf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) const struct spinand_manufacturer toshiba_spinand_manufacturer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .id = SPINAND_MFR_TOSHIBA,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .name = "Toshiba",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .chips = toshiba_spinand_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) .nchips = ARRAY_SIZE(toshiba_spinand_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .ops = &toshiba_spinand_manuf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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