^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2021 Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Dingqiang Lin <jon.lin@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mtd/spinand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SPINAND_MFR_SILICONGO 0xEA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static SPINAND_OP_VARIANTS(read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static SPINAND_OP_VARIANTS(write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static SPINAND_OP_VARIANTS(update_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int sgm7000i_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) static int sgm7000i_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) if (section)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) region->offset = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) region->length = mtd->oobsize - 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) static const struct mtd_ooblayout_ops sgm7000i_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .ecc = sgm7000i_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .free = sgm7000i_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static const struct spinand_info silicongo_spinand_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) SPINAND_INFO("SGM7000I-S24W1GH",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xC1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) SPINAND_ECCINFO(&sgm7000i_ooblayout, NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const struct spinand_manufacturer_ops silicongo_spinand_manuf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) const struct spinand_manufacturer silicongo_spinand_manufacturer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .id = SPINAND_MFR_SILICONGO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .name = "silicongo",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .chips = silicongo_spinand_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .nchips = ARRAY_SIZE(silicongo_spinand_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .ops = &silicongo_spinand_manuf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };