^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2020-2021 Rockchip Electronics Co., Ltd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Authors:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Dingqiang Lin <jon.lin@rock-chips.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mtd/spinand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define SPINAND_MFR_HYF 0xC9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) static SPINAND_OP_VARIANTS(read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static SPINAND_OP_VARIANTS(write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static SPINAND_OP_VARIANTS(update_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) static int hyf1gq4upacae_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) if (section)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) region->offset = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) region->length = 64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int hyf1gq4upacae_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (section)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) region->offset = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) region->length = 63;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static const struct mtd_ooblayout_ops hyf1gq4upacae_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .ecc = hyf1gq4upacae_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .free = hyf1gq4upacae_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static int hyf1gq4udacae_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) region->offset = (16 * section) + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) region->length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) static int hyf1gq4udacae_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) region->offset = (16 * section) + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) region->length = 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static const struct mtd_ooblayout_ops hyf1gq4udacae_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .ecc = hyf1gq4udacae_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) .free = hyf1gq4udacae_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int hyf2gq4uaacae_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) region->offset = (32 * section) + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) region->length = 24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static int hyf2gq4uaacae_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) region->offset = 16 * section;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) region->length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) static const struct mtd_ooblayout_ops hyf2gq4uaacae_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) .ecc = hyf2gq4uaacae_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .free = hyf2gq4uaacae_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) static int hyf1gq4udacae_ecc_get_status(struct spinand_device *spinand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) struct nand_device *nand = spinand_to_nand(spinand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) switch (status & STATUS_ECC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case STATUS_ECC_NO_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) case STATUS_ECC_UNCOR_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case STATUS_ECC_HAS_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return nanddev_get_ecc_requirements(nand)->strength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static const struct spinand_info hyf_spinand_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) SPINAND_INFO("HYF1GQ4UPACAE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xA1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) NAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) NAND_ECCREQ(1, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) SPINAND_ECCINFO(&hyf1gq4upacae_ooblayout, NULL)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) SPINAND_INFO("HYF1GQ4UDACAE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x21),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) hyf1gq4udacae_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) SPINAND_INFO("HYF1GQ4UDACAE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x22),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) SPINAND_ECCINFO(&hyf1gq4udacae_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) hyf1gq4udacae_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) SPINAND_INFO("HYF2GQ4UAACAE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x52),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) NAND_ECCREQ(14, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) hyf1gq4udacae_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) SPINAND_INFO("HYF2GQ4UHCCAE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x5A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) NAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) NAND_ECCREQ(14, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) hyf1gq4udacae_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) SPINAND_INFO("HYF4GQ4UAACBE",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0xD4),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) NAND_MEMORG(1, 4096, 128, 64, 2048, 40, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) SPINAND_ECCINFO(&hyf2gq4uaacae_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) hyf1gq4udacae_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static const struct spinand_manufacturer_ops hyf_spinand_manuf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) const struct spinand_manufacturer hyf_spinand_manufacturer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) .id = SPINAND_MFR_HYF,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) .name = "hyf",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) .chips = hyf_spinand_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) .nchips = ARRAY_SIZE(hyf_spinand_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) .ops = &hyf_spinand_manuf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) };
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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