Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/mtd/spinand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #define SPINAND_MFR_ETRON		0xD5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) static SPINAND_OP_VARIANTS(read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 		SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 		SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 		SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 		SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 		SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 		SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) static SPINAND_OP_VARIANTS(write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 		SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 		SPINAND_PROG_LOAD(true, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) static SPINAND_OP_VARIANTS(update_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 		SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 		SPINAND_PROG_LOAD(false, 0, NULL, 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) static int em73c044vcf_oh_ooblayout_ecc(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 					struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	region->offset = (16 * section) + 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	region->length = 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static int em73c044vcf_oh_ooblayout_free(struct mtd_info *mtd, int section,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 					 struct mtd_oob_region *region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	if (section > 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 		return -ERANGE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	region->offset = (16 * section) + 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	region->length = 6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) static const struct mtd_ooblayout_ops em73c044vcf_oh_ooblayout = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	.ecc = em73c044vcf_oh_ooblayout_ecc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	.free = em73c044vcf_oh_ooblayout_free,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) static int em73c044vcf_oh_ecc_get_status(struct spinand_device *spinand,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 					 u8 status)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	struct nand_device *nand = spinand_to_nand(spinand);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	switch (status & STATUS_ECC_MASK) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	case STATUS_ECC_NO_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	case STATUS_ECC_UNCOR_ERROR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		return -EBADMSG;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	case STATUS_ECC_HAS_BITFLIPS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 		return nanddev_get_ecc_requirements(nand)->strength;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) static const struct spinand_info etron_spinand_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	SPINAND_INFO("EM73C044VCF-0H",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		     SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x36),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		     NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		     NAND_ECCREQ(4, 512),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		     SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 					      &write_cache_variants,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 					      &update_cache_variants),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		     SPINAND_HAS_QE_BIT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		     SPINAND_ECCINFO(&em73c044vcf_oh_ooblayout,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 				     em73c044vcf_oh_ecc_get_status)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) static const struct spinand_manufacturer_ops etron_spinand_manuf_ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) const struct spinand_manufacturer etron_spinand_manufacturer = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	.id = SPINAND_MFR_ETRON,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.name = "Etron",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	.chips = etron_spinand_table,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	.nchips = ARRAY_SIZE(etron_spinand_table),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	.ops = &etron_spinand_manuf_ops,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) };