^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (c) 2018 - Bootlin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Author: Boris Brezillon <boris.brezillon@bootlin.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Header containing internal definitions to be used only by core files.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * NAND controller drivers should not include this file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef __LINUX_RAWNAND_INTERNALS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define __LINUX_RAWNAND_INTERNALS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mtd/rawnand.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * NAND Flash Manufacturer ID Codes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define NAND_MFR_AMD 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define NAND_MFR_ATO 0x9b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define NAND_MFR_EON 0x92
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define NAND_MFR_ESMT 0xc8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define NAND_MFR_FUJITSU 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define NAND_MFR_HYNIX 0xad
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define NAND_MFR_INTEL 0x89
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define NAND_MFR_MACRONIX 0xc2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define NAND_MFR_MICRON 0x2c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define NAND_MFR_NATIONAL 0x8f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define NAND_MFR_RENESAS 0x07
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define NAND_MFR_SAMSUNG 0xec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define NAND_MFR_SANDISK 0x45
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define NAND_MFR_STMICRO 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* Kioxia is new name of Toshiba memory. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define NAND_MFR_TOSHIBA 0x98
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define NAND_MFR_WINBOND 0xef
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * struct nand_manufacturer_ops - NAND Manufacturer operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * @detect: detect the NAND memory organization and capabilities
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * @init: initialize all vendor specific fields (like the ->read_retry()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * implementation) if any.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * @cleanup: the ->init() function may have allocated resources, ->cleanup()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * is here to let vendor specific code release those resources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * @fixup_onfi_param_page: apply vendor specific fixups to the ONFI parameter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * page. This is called after the checksum is verified.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct nand_manufacturer_ops {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) void (*detect)(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) int (*init)(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) void (*cleanup)(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void (*fixup_onfi_param_page)(struct nand_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) struct nand_onfi_params *p);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * struct nand_manufacturer_desc - NAND Flash Manufacturer descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * @name: Manufacturer name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * @id: manufacturer ID code of device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * @ops: manufacturer operations
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct nand_manufacturer_desc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) char *name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) const struct nand_manufacturer_ops *ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) extern struct nand_flash_dev nand_flash_ids[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) extern const struct nand_manufacturer_ops esmt_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) /* MLC pairing schemes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) extern const struct mtd_pairing_scheme dist3_pairing_scheme;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* Core functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) const struct nand_manufacturer_desc *nand_get_manufacturer_desc(u8 id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) int nand_bbm_get_next_page(struct nand_chip *chip, int page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) int allowbbt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) void onfi_fill_interface_config(struct nand_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) struct nand_interface_config *iface,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) enum nand_interface_type type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int timing_mode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) onfi_find_closest_sdr_mode(const struct nand_sdr_timings *spec_timings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) int nand_choose_best_sdr_timings(struct nand_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) struct nand_interface_config *iface,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) struct nand_sdr_timings *spec_timings);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) const struct nand_interface_config *nand_get_reset_interface_config(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int oob_required, int page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) int oob_required, int page);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) int nand_exit_status_op(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) unsigned int len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) void nand_decode_ext_id(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) void panic_nand_wait(struct nand_chip *chip, unsigned long timeo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void sanitize_string(uint8_t *s, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) static inline bool nand_has_exec_op(struct nand_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (!chip->controller || !chip->controller->ops ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) !chip->controller->ops->exec_op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static inline int nand_check_op(struct nand_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) const struct nand_operation *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) if (!nand_has_exec_op(chip))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) return chip->controller->ops->exec_op(chip, op, true);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) static inline int nand_exec_op(struct nand_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) const struct nand_operation *op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) if (!nand_has_exec_op(chip))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) return -ENOTSUPP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (WARN_ON(op->cs >= nanddev_ntargets(&chip->base)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) return chip->controller->ops->exec_op(chip, op, false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) static inline bool nand_controller_can_setup_interface(struct nand_chip *chip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) if (!chip->controller || !chip->controller->ops ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) !chip->controller->ops->setup_interface)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) if (chip->options & NAND_KEEP_TIMINGS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) return false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* BBT functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int nand_markbad_bbt(struct nand_chip *chip, loff_t offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) int nand_isreserved_bbt(struct nand_chip *chip, loff_t offs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) int nand_isbad_bbt(struct nand_chip *chip, loff_t offs, int allowbbt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* Legacy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) void nand_legacy_set_defaults(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) void nand_legacy_adjust_cmdfunc(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) int nand_legacy_check_hooks(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* ONFI functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) u16 onfi_crc16(u16 crc, u8 const *p, size_t len);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) int nand_onfi_detect(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) /* JEDEC functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) int nand_jedec_detect(struct nand_chip *chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #endif /* __LINUX_RAWNAND_INTERNALS */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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