^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * tsunami_flash.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * flash chip on alpha ds10...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <asm/core_tsunami.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define FLASH_ENABLE_PORT 0x00C00001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define FLASH_ENABLE_BYTE 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define FLASH_DISABLE_BYTE 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define MAX_TIG_FLASH_SIZE (12*1024*1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static inline map_word tsunami_flash_read8(struct map_info *map, unsigned long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) map_word val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) val.x[0] = tsunami_tig_readb(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) static void tsunami_flash_write8(struct map_info *map, map_word value, unsigned long offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) tsunami_tig_writeb(value.x[0], offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static void tsunami_flash_copy_from(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct map_info *map, void *addr, unsigned long offset, ssize_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) unsigned char *dest;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) dest = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) while(len && (offset < MAX_TIG_FLASH_SIZE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *dest = tsunami_tig_readb(offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) offset++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) dest++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static void tsunami_flash_copy_to(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct map_info *map, unsigned long offset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) const void *addr, ssize_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) const unsigned char *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) src = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) while(len && (offset < MAX_TIG_FLASH_SIZE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) tsunami_tig_writeb(*src, offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) offset++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) len--;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * Deliberately don't provide operations wider than 8 bits. I don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * have then and it scares me to think how you could mess up if
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * you tried to use them. Buswidth is correctly so I'm safe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) static struct map_info tsunami_flash_map = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .name = "flash chip on the Tsunami TIG bus",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .size = MAX_TIG_FLASH_SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .phys = NO_XIP,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .bankwidth = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) .read = tsunami_flash_read8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) .copy_from = tsunami_flash_copy_from,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) .write = tsunami_flash_write8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) .copy_to = tsunami_flash_copy_to,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static struct mtd_info *tsunami_flash_mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static void __exit cleanup_tsunami_flash(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) struct mtd_info *mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) mtd = tsunami_flash_mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (mtd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) mtd_device_unregister(mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) map_destroy(mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) tsunami_flash_mtd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) static const char * const rom_probe_types[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) "cfi_probe", "jedec_probe", "map_rom", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static int __init init_tsunami_flash(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) const char * const *type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) tsunami_tig_writeb(FLASH_ENABLE_BYTE, FLASH_ENABLE_PORT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) tsunami_flash_mtd = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) type = rom_probe_types;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) for(; !tsunami_flash_mtd && *type; type++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) tsunami_flash_mtd = do_map_probe(*type, &tsunami_flash_map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if (tsunami_flash_mtd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) tsunami_flash_mtd->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) mtd_device_register(tsunami_flash_mtd, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) module_init(init_tsunami_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) module_exit(cleanup_tsunami_flash);