^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Versatile OF physmap driver add-on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (c) 2016, Linaro Limited
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Author: Linus Walleij <linus.walleij@linaro.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/of_address.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/of_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/mfd/syscon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/regmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/bitops.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include "physmap-versatile.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) static struct regmap *syscon_regmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) enum versatile_flashprot {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) INTEGRATOR_AP_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) INTEGRATOR_CP_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) VERSATILE_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) static const struct of_device_id syscon_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .compatible = "arm,integrator-ap-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .data = (void *)INTEGRATOR_AP_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .compatible = "arm,integrator-cp-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) .data = (void *)INTEGRATOR_CP_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .compatible = "arm,core-module-versatile",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) .data = (void *)VERSATILE_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) .compatible = "arm,realview-eb-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) .data = (void *)REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .compatible = "arm,realview-pb1176-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .data = (void *)REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .compatible = "arm,realview-pb11mp-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .data = (void *)REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .compatible = "arm,realview-pba8-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .data = (void *)REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .compatible = "arm,realview-pbx-syscon",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .data = (void *)REALVIEW_FLASHPROT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * Flash protection handling for the Integrator/AP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define INTEGRATOR_SC_CTRLS_OFFSET 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define INTEGRATOR_SC_CTRLC_OFFSET 0x0C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define INTEGRATOR_SC_CTRL_FLVPPEN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define INTEGRATOR_SC_CTRL_FLWP BIT(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define INTEGRATOR_EBI_CSR1_OFFSET 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) /* The manual says bit 2, the code says bit 3, trust the code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define INTEGRATOR_EBI_WRITE_ENABLE BIT(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define INTEGRATOR_EBI_LOCK_OFFSET 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define INTEGRATOR_EBI_LOCK_VAL 0xA05F
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static const struct of_device_id ebi_match[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) { .compatible = "arm,external-bus-interface"},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) static int ap_flash_init(struct platform_device *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct device_node *ebi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) void __iomem *ebi_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* Look up the EBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) ebi = of_find_matching_node(NULL, ebi_match);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) if (!ebi) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) ebi_base = of_iomap(ebi, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if (!ebi_base)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) /* Clear VPP and write protection bits */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) ret = regmap_write(syscon_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) INTEGRATOR_SC_CTRLC_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) INTEGRATOR_SC_CTRL_FLVPPEN | INTEGRATOR_SC_CTRL_FLWP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) dev_err(&pdev->dev, "error clearing Integrator VPP/WP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* Unlock the EBI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) writel(INTEGRATOR_EBI_LOCK_VAL, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* Enable write cycles on the EBI, CSR1 (flash) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) val = readl(ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) val |= INTEGRATOR_EBI_WRITE_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) writel(val, ebi_base + INTEGRATOR_EBI_CSR1_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) /* Lock the EBI again */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) writel(0, ebi_base + INTEGRATOR_EBI_LOCK_OFFSET);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) iounmap(ebi_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) static void ap_flash_set_vpp(struct map_info *map, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) ret = regmap_write(syscon_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) INTEGRATOR_SC_CTRLS_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) INTEGRATOR_SC_CTRL_FLVPPEN | INTEGRATOR_SC_CTRL_FLWP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) pr_err("error enabling AP VPP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) ret = regmap_write(syscon_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) INTEGRATOR_SC_CTRLC_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) INTEGRATOR_SC_CTRL_FLVPPEN | INTEGRATOR_SC_CTRL_FLWP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) pr_err("error disabling AP VPP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * Flash protection handling for the Integrator/CP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define INTCP_FLASHPROG_OFFSET 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define CINTEGRATOR_FLVPPEN BIT(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) #define CINTEGRATOR_FLWREN BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define CINTEGRATOR_FLMASK BIT(0)|BIT(1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) static void cp_flash_set_vpp(struct map_info *map, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (on) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) ret = regmap_update_bits(syscon_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) INTCP_FLASHPROG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) CINTEGRATOR_FLMASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) CINTEGRATOR_FLVPPEN | CINTEGRATOR_FLWREN);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pr_err("error setting CP VPP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ret = regmap_update_bits(syscon_regmap,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) INTCP_FLASHPROG_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) CINTEGRATOR_FLMASK,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pr_err("error setting CP VPP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * Flash protection handling for the Versatiles and RealViews
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define VERSATILE_SYS_FLASH_OFFSET 0x4C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static void versatile_flash_set_vpp(struct map_info *map, int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) ret = regmap_update_bits(syscon_regmap, VERSATILE_SYS_FLASH_OFFSET,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0x01, !!on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) pr_err("error setting Versatile VPP\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) int of_flash_probe_versatile(struct platform_device *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) struct device_node *np,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) struct map_info *map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct device_node *sysnp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) const struct of_device_id *devid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) struct regmap *rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static enum versatile_flashprot versatile_flashprot;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) /* Not all flash chips use this protection line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) if (!of_device_is_compatible(np, "arm,versatile-flash"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* For first chip probed, look up the syscon regmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if (!syscon_regmap) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) sysnp = of_find_matching_node_and_match(NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) syscon_match,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) &devid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (!sysnp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) versatile_flashprot = (enum versatile_flashprot)devid->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) rmap = syscon_node_to_regmap(sysnp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) if (IS_ERR(rmap))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) return PTR_ERR(rmap);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) syscon_regmap = rmap;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) switch (versatile_flashprot) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) case INTEGRATOR_AP_FLASHPROT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) ret = ap_flash_init(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) map->set_vpp = ap_flash_set_vpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) dev_info(&pdev->dev, "Integrator/AP flash protection\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) case INTEGRATOR_CP_FLASHPROT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) map->set_vpp = cp_flash_set_vpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) dev_info(&pdev->dev, "Integrator/CP flash protection\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) case VERSATILE_FLASHPROT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case REALVIEW_FLASHPROT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) map->set_vpp = versatile_flash_set_vpp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) dev_info(&pdev->dev, "versatile/realview flash protection\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) dev_info(&pdev->dev, "device marked as Versatile flash "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) "but no system controller was found\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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