^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * drivers/mtd/maps/ixp4xx.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * MTD Map file for IXP4XX based systems. Please do not make per-board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * changes in here. If your board needs special setup, do it in your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * platform level code in arch/arm/mach-ixp4xx/board-setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Original Author: Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Maintainer: Deepak Saxena <dsaxena@mvista.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (C) 2002 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (C) 2003-2004 MontaVista Software, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/err.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mtd/partitions.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/mach/flash.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/reboot.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Read/write a 16 bit word from flash address 'addr'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * When the cpu is in little-endian mode it swizzles the address lines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * ('address coherency') so we need to undo the swizzling to ensure commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * and the like end up on the correct flash address.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * To further complicate matters, due to the way the expansion bus controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * handles 32 bit reads, the byte stream ABCD is stored on the flash as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * D15 D0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * +---+---+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * | A | B | 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * +---+---+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * | C | D | 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * +---+---+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * This means that on LE systems each 16 bit word must be swapped. Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * this requires CONFIG_MTD_CFI_BE_BYTE_SWAP to be enabled to 'unswap' the CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * data and other flash commands which are always in D7-D0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #ifndef __ARMEB__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #ifndef CONFIG_MTD_CFI_BE_BYTE_SWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) # error CONFIG_MTD_CFI_BE_BYTE_SWAP required
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline u16 flash_read16(void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) return be16_to_cpu(__raw_readw((void __iomem *)((unsigned long)addr ^ 0x2)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static inline void flash_write16(u16 d, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __raw_writew(cpu_to_be16(d), (void __iomem *)((unsigned long)addr ^ 0x2));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define BYTE0(h) ((h) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define BYTE1(h) (((h) >> 8) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static inline u16 flash_read16(const void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) return __raw_readw(addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static inline void flash_write16(u16 d, void __iomem *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) __raw_writew(d, addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define BYTE0(h) (((h) >> 8) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define BYTE1(h) ((h) & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) static map_word ixp4xx_read16(struct map_info *map, unsigned long ofs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) map_word val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) val.x[0] = flash_read16(map->virt + ofs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * The IXP4xx expansion bus only allows 16-bit wide acceses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * when attached to a 16-bit wide device (such as the 28F128J3A),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * so we can't just memcpy_fromio().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void ixp4xx_copy_from(struct map_info *map, void *to,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned long from, ssize_t len)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) u8 *dest = (u8 *) to;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) void __iomem *src = map->virt + from;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) if (len <= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) if (from & 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) *dest++ = BYTE1(flash_read16(src-1));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) src++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) --len;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) while (len >= 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) u16 data = flash_read16(src);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) *dest++ = BYTE0(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *dest++ = BYTE1(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) src += 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) len -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) if (len > 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *dest++ = BYTE0(flash_read16(src));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) * Unaligned writes are ignored, causing the 8-bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * probe to fail and proceed to the 16-bit probe (which succeeds).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static void ixp4xx_probe_write16(struct map_info *map, map_word d, unsigned long adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) if (!(adr & 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) flash_write16(d.x[0], map->virt + adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * Fast write16 function without the probing check above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) static void ixp4xx_write16(struct map_info *map, map_word d, unsigned long adr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) flash_write16(d.x[0], map->virt + adr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) struct ixp4xx_flash_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) struct mtd_info *mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) struct map_info map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) struct resource *res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) static const char * const probes[] = { "RedBoot", "cmdlinepart", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) static int ixp4xx_flash_remove(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) struct flash_platform_data *plat = dev_get_platdata(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) struct ixp4xx_flash_info *info = platform_get_drvdata(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if(!info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if (info->mtd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mtd_device_unregister(info->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) map_destroy(info->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (plat->exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) plat->exit();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) static int ixp4xx_flash_probe(struct platform_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) struct flash_platform_data *plat = dev_get_platdata(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) struct ixp4xx_flash_info *info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) struct mtd_part_parser_data ppdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) .origin = dev->resource->start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) int err = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) if (!plat)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (plat->init) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) err = plat->init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) info = devm_kzalloc(&dev->dev, sizeof(struct ixp4xx_flash_info),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) if(!info) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) err = -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) goto Error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) platform_set_drvdata(dev, info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * Tell the MTD layer we're not 1:1 mapped so that it does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * not attempt to do a direct access on us.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) info->map.phys = NO_XIP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) info->map.size = resource_size(dev->resource);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) * We only support 16-bit accesses for now. If and when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * any board use 8-bit access, we'll fixup the driver to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * handle that.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) info->map.bankwidth = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) info->map.name = dev_name(&dev->dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) info->map.read = ixp4xx_read16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) info->map.write = ixp4xx_probe_write16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) info->map.copy_from = ixp4xx_copy_from;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) info->map.virt = devm_ioremap_resource(&dev->dev, dev->resource);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (IS_ERR(info->map.virt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) err = PTR_ERR(info->map.virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) goto Error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) info->mtd = do_map_probe(plat->map_name, &info->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) if (!info->mtd) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) printk(KERN_ERR "IXP4XXFlash: map_probe failed\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) err = -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) goto Error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) info->mtd->dev.parent = &dev->dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* Use the fast version */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) info->map.write = ixp4xx_write16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) err = mtd_device_parse_register(info->mtd, probes, &ppdata,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) plat->parts, plat->nr_parts);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) if (err) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) printk(KERN_ERR "Could not parse partitions\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) goto Error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) Error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) ixp4xx_flash_remove(dev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) static struct platform_driver ixp4xx_flash_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) .probe = ixp4xx_flash_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) .remove = ixp4xx_flash_remove,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .name = "IXP4XX-Flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) module_platform_driver(ixp4xx_flash_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) MODULE_DESCRIPTION("MTD map driver for Intel IXP4xx systems");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) MODULE_AUTHOR("Deepak Saxena");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) MODULE_ALIAS("platform:IXP4XX-Flash");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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