^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * ck804xrom.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Normal mappings of chips in physical memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Dave Olsen <dolsen@lnxi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Ryan Jackson <rjackson@lnxi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/cfi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mtd/flashchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/pci_ids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MOD_NAME KBUILD_BASENAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define ADDRESS_NAME_LEN 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define ROM_PROBE_STEP_SIZE (64*1024)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define DEV_CK804 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define DEV_MCP55 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) struct ck804xrom_window {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) void __iomem *virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) unsigned long phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) struct list_head maps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) struct resource rsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) struct ck804xrom_map_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) struct map_info map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) struct mtd_info *mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) struct resource rsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * The following applies to ck804 only:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * The 2 bits controlling the window size are often set to allow reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * the BIOS, but too small to allow writing, since the lock registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * 4MiB lower in the address space than the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * This is intended to prevent flashing the bios, perhaps accidentally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * This parameter allows the normal driver to override the BIOS settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * The bits are 6 and 7. If both bits are set, it is a 5MiB window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * If only the 7 Bit is set, it is a 4MiB window. Otherwise, a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * 64KiB window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * The following applies to mcp55 only:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * The 15 bits controlling the window size are distributed as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * byte @0x88: bit 0..7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * byte @0x8c: bit 8..15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * word @0x90: bit 16..30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * If all bits are enabled, we have a 16? MiB window
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * Please set win_size_bits to 0x7fffffff if you actually want to do something
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) static uint win_size_bits = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) module_param(win_size_bits, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) MODULE_PARM_DESC(win_size_bits, "ROM window size bits override, normally set by BIOS.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static struct ck804xrom_window ck804xrom_window = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .maps = LIST_HEAD_INIT(ck804xrom_window.maps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) static void ck804xrom_cleanup(struct ck804xrom_window *window)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) struct ck804xrom_map_info *map, *scratch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) if (window->pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) /* Disable writes through the rom window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) pci_read_config_byte(window->pdev, 0x6d, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) pci_write_config_byte(window->pdev, 0x6d, byte & ~1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /* Free all of the mtd devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) list_for_each_entry_safe(map, scratch, &window->maps, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) if (map->rsrc.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) release_resource(&map->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) mtd_device_unregister(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) map_destroy(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) list_del(&map->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) if (window->rsrc.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) release_resource(&window->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (window->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) iounmap(window->virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) window->virt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) window->phys = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) window->size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) pci_dev_put(window->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static int __init ck804xrom_init_one(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) u16 word;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) struct ck804xrom_window *window = &ck804xrom_window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) struct ck804xrom_map_info *map = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) unsigned long map_top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) /* Remember the pci dev I find the window in */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) window->pdev = pci_dev_get(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) switch (ent->driver_data) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) case DEV_CK804:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Enable the selected rom window. This is often incorrectly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * set up by the BIOS, and the 4MiB offset for the lock registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * requires the full 5MiB of window space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * This 'write, then read' approach leaves the bits for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * other uses of the hardware info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) pci_read_config_byte(pdev, 0x88, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) pci_write_config_byte(pdev, 0x88, byte | win_size_bits );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Assume the rom window is properly setup, and find it's size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) pci_read_config_byte(pdev, 0x88, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) window->phys = 0xffb00000; /* 5MiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) else if ((byte & (1<<7)) == (1<<7))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) window->phys = 0xffc00000; /* 4MiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) window->phys = 0xffff0000; /* 64KiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) case DEV_MCP55:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) pci_read_config_byte(pdev, 0x88, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) pci_write_config_byte(pdev, 0x88, byte | (win_size_bits & 0xff));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pci_read_config_byte(pdev, 0x8c, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pci_write_config_byte(pdev, 0x8c, byte | ((win_size_bits & 0xff00) >> 8));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) pci_read_config_word(pdev, 0x90, &word);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) pci_write_config_word(pdev, 0x90, word | ((win_size_bits & 0x7fff0000) >> 16));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) window->phys = 0xff000000; /* 16MiB, hardcoded for now */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) window->size = 0xffffffffUL - window->phys + 1UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * Try to reserve the window mem region. If this fails then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * it is likely due to a fragment of the window being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * "reserved" by the BIOS. In the case that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * request_mem_region() fails then once the rom size is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * discovered we will try to reserve the unreserved fragment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) window->rsrc.name = MOD_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) window->rsrc.start = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) window->rsrc.end = window->phys + window->size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) if (request_resource(&iomem_resource, &window->rsrc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) window->rsrc.parent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) printk(KERN_ERR MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) " %s(): Unable to register resource %pR - kernel bug?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) __func__, &window->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) /* Enable writes through the rom window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) pci_read_config_byte(pdev, 0x6d, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) pci_write_config_byte(pdev, 0x6d, byte | 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /* FIXME handle registers 0x80 - 0x8C the bios region locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) /* For write accesses caches are useless */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) window->virt = ioremap(window->phys, window->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if (!window->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) window->phys, window->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) /* Get the first address to look for a rom chip at */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) map_top = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) /* The probe sequence run over the firmware hub lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * registers sets them to 0x7 (no access).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * Probe at most the last 4MiB of the address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if (map_top < 0xffc00000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) map_top = 0xffc00000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /* Loop through and look for rom chips. Since we don't know the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * starting address for each chip, probe every ROM_PROBE_STEP_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * bytes from the starting address of the window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) while((map_top - 1) < 0xffffffffUL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) struct cfi_private *cfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) unsigned long offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) if (!map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) map = kmalloc(sizeof(*map), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) if (!map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) printk(KERN_ERR MOD_NAME ": kmalloc failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) memset(map, 0, sizeof(*map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) INIT_LIST_HEAD(&map->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) map->map.name = map->map_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) map->map.phys = map_top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) offset = map_top - window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) map->map.virt = (void __iomem *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) (((unsigned long)(window->virt)) + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) map->map.size = 0xffffffffUL - map_top + 1UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Set the name of the map to the address I am trying */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) sprintf(map->map_name, "%s @%08Lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) MOD_NAME, (unsigned long long)map->map.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* There is no generic VPP support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) for(map->map.bankwidth = 32; map->map.bankwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) map->map.bankwidth >>= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) char **probe_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) /* Skip bankwidths that are not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) if (!map_bankwidth_supported(map->map.bankwidth))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) /* Setup the map methods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) simple_map_init(&map->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) /* Try all of the probe methods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) probe_type = rom_probe_types;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) for(; *probe_type; probe_type++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) map->mtd = do_map_probe(*probe_type, &map->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) if (map->mtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) map_top += ROM_PROBE_STEP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) /* Trim the size if we are larger than the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (map->mtd->size > map->map.size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) printk(KERN_WARNING MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) " rom(%llu) larger than window(%lu). fixing...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) (unsigned long long)map->mtd->size, map->map.size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) map->mtd->size = map->map.size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) if (window->rsrc.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) * Registering the MTD device in iomem may not be possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * if there is a BIOS "reserved" and BUSY range. If this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * fails then continue anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) map->rsrc.name = map->map_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) map->rsrc.start = map->map.phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) map->rsrc.end = map->map.phys + map->mtd->size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) if (request_resource(&window->rsrc, &map->rsrc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) printk(KERN_ERR MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ": cannot reserve MTD resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) map->rsrc.parent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) /* Make the whole region visible in the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) map->map.virt = window->virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) map->map.phys = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) cfi = map->map.fldrv_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) for(i = 0; i < cfi->numchips; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) cfi->chips[i].start += offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) /* Now that the mtd devices is complete claim and export it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) map->mtd->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (mtd_device_register(map->mtd, NULL, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) map_destroy(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) map->mtd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) /* Calculate the new value of map_top */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) map_top += map->mtd->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) /* File away the map structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) list_add(&map->list, &window->maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) map = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* Free any left over map structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) /* See if I have any map structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) if (list_empty(&window->maps)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) ck804xrom_cleanup(window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) static void ck804xrom_remove_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) struct ck804xrom_window *window = &ck804xrom_window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ck804xrom_cleanup(window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) static const struct pci_device_id ck804xrom_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0051), .driver_data = DEV_CK804 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0360), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0361), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0362), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0363), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0364), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0365), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0366), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, 0x0367), .driver_data = DEV_MCP55 },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) { 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) MODULE_DEVICE_TABLE(pci, ck804xrom_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) static struct pci_driver ck804xrom_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) .name = MOD_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) .id_table = ck804xrom_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) .probe = ck804xrom_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) .remove = ck804xrom_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) static int __init init_ck804xrom(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) const struct pci_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) int retVal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) for(id = ck804xrom_pci_tbl; id->vendor; id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) pdev = pci_get_device(id->vendor, id->device, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) if (pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) retVal = ck804xrom_init_one(pdev, id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) pci_dev_put(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) return retVal;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) return pci_register_driver(&ck804xrom_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) static void __exit cleanup_ck804xrom(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) ck804xrom_remove_one(ck804xrom_window.pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) module_init(init_ck804xrom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) module_exit(cleanup_ck804xrom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>, Dave Olsen <dolsen@lnxi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) MODULE_DESCRIPTION("MTD map driver for BIOS chips on the Nvidia ck804 southbridge");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388)