Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * amd76xrom.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Normal mappings of chips in physical memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) #include <linux/mtd/cfi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <linux/mtd/flashchip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <linux/pci_ids.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/list.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #define xstr(s) str(s)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #define str(s) #s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define MOD_NAME xstr(KBUILD_BASENAME)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ADDRESS_NAME_LEN 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define ROM_PROBE_STEP_SIZE (64*1024) /* 64KiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) struct amd76xrom_window {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	void __iomem *virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	unsigned long phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	struct list_head maps;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	struct resource rsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) struct amd76xrom_map_info {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	struct list_head list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	struct map_info map;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	struct mtd_info *mtd;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	struct resource rsrc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	char map_name[sizeof(MOD_NAME) + 2 + ADDRESS_NAME_LEN];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* The 2 bits controlling the window size are often set to allow reading
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * the BIOS, but too small to allow writing, since the lock registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  * 4MiB lower in the address space than the data.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  * This is intended to prevent flashing the bios, perhaps accidentally.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * This parameter allows the normal driver to over-ride the BIOS settings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56)  * The bits are 6 and 7.  If both bits are set, it is a 5MiB window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * If only the 7 Bit is set, it is a 4MiB window.  Otherwise, a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  * 64KiB window.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static uint win_size_bits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) module_param(win_size_bits, uint, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) MODULE_PARM_DESC(win_size_bits, "ROM window size bits override for 0x43 byte, normally set by BIOS.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) static struct amd76xrom_window amd76xrom_window = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	.maps = LIST_HEAD_INIT(amd76xrom_window.maps),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) static void amd76xrom_cleanup(struct amd76xrom_window *window)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	struct amd76xrom_map_info *map, *scratch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	if (window->pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 		/* Disable writes through the rom window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 		pci_read_config_byte(window->pdev, 0x40, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 		pci_write_config_byte(window->pdev, 0x40, byte & ~1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		pci_dev_put(window->pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	/* Free all of the mtd devices */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	list_for_each_entry_safe(map, scratch, &window->maps, list) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		if (map->rsrc.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 			release_resource(&map->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 		mtd_device_unregister(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 		map_destroy(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 		list_del(&map->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 		kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	if (window->rsrc.parent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 		release_resource(&window->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	if (window->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		iounmap(window->virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		window->virt = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 		window->phys = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		window->size = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 		window->pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static int amd76xrom_init_one(struct pci_dev *pdev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 			      const struct pci_device_id *ent)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	static char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	u8 byte;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	struct amd76xrom_window *window = &amd76xrom_window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	struct amd76xrom_map_info *map = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	unsigned long map_top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	/* Remember the pci dev I find the window in - already have a ref */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	window->pdev = pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	/* Enable the selected rom window.  This is often incorrectly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	 * set up by the BIOS, and the 4MiB offset for the lock registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	 * requires the full 5MiB of window space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	 * This 'write, then read' approach leaves the bits for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	 * other uses of the hardware info.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	pci_read_config_byte(pdev, 0x43, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	pci_write_config_byte(pdev, 0x43, byte | win_size_bits );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	/* Assume the rom window is properly setup, and find it's size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	pci_read_config_byte(pdev, 0x43, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	if ((byte & ((1<<7)|(1<<6))) == ((1<<7)|(1<<6))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 		window->phys = 0xffb00000; /* 5MiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	else if ((byte & (1<<7)) == (1<<7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 		window->phys = 0xffc00000; /* 4MiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 		window->phys = 0xffff0000; /* 64KiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	window->size = 0xffffffffUL - window->phys + 1UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	 * Try to reserve the window mem region.  If this fails then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	 * it is likely due to a fragment of the window being
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	 * "reserved" by the BIOS.  In the case that the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	 * request_mem_region() fails then once the rom size is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	 * discovered we will try to reserve the unreserved fragment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	window->rsrc.name = MOD_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	window->rsrc.start = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	window->rsrc.end   = window->phys + window->size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	window->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	if (request_resource(&iomem_resource, &window->rsrc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 		window->rsrc.parent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 		printk(KERN_ERR MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 		       " %s(): Unable to register resource %pR - kernel bug?\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 		       __func__, &window->rsrc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 		return -EBUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	/* Enable writes through the rom window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	pci_read_config_byte(pdev, 0x40, &byte);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	pci_write_config_byte(pdev, 0x40, byte | 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	/* FIXME handle registers 0x80 - 0x8C the bios region locks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	/* For write accesses caches are useless */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	window->virt = ioremap(window->phys, window->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (!window->virt) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 		printk(KERN_ERR MOD_NAME ": ioremap(%08lx, %08lx) failed\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 			window->phys, window->size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	/* Get the first address to look for an rom chip at */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	map_top = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #if 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	/* The probe sequence run over the firmware hub lock
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	 * registers sets them to 0x7 (no access).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	 * Probe at most the last 4M of the address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	if (map_top < 0xffc00000) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 		map_top = 0xffc00000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	/* Loop  through and look for rom chips */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	while((map_top - 1) < 0xffffffffUL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		struct cfi_private *cfi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		unsigned long offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		if (!map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 			map = kmalloc(sizeof(*map), GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 		if (!map) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 			printk(KERN_ERR MOD_NAME ": kmalloc failed");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 		memset(map, 0, sizeof(*map));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 		INIT_LIST_HEAD(&map->list);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 		map->map.name = map->map_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 		map->map.phys = map_top;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 		offset = map_top - window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 		map->map.virt = (void __iomem *)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 			(((unsigned long)(window->virt)) + offset);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 		map->map.size = 0xffffffffUL - map_top + 1UL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 		/* Set the name of the map to the address I am trying */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 		sprintf(map->map_name, "%s @%08Lx",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 			MOD_NAME, (unsigned long long)map->map.phys);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 		/* There is no generic VPP support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 		for(map->map.bankwidth = 32; map->map.bankwidth;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 			map->map.bankwidth >>= 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 		{
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 			char **probe_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 			/* Skip bankwidths that are not supported */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 			if (!map_bankwidth_supported(map->map.bankwidth))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 				continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 			/* Setup the map methods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 			simple_map_init(&map->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 			/* Try all of the probe methods */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 			probe_type = rom_probe_types;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 			for(; *probe_type; probe_type++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 				map->mtd = do_map_probe(*probe_type, &map->map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 				if (map->mtd)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 					goto found;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 		map_top += ROM_PROBE_STEP_SIZE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 		continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	found:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 		/* Trim the size if we are larger than the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 		if (map->mtd->size > map->map.size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 			printk(KERN_WARNING MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 				" rom(%llu) larger than window(%lu). fixing...\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 				(unsigned long long)map->mtd->size, map->map.size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 			map->mtd->size = map->map.size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 		if (window->rsrc.parent) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 			/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 			 * Registering the MTD device in iomem may not be possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 			 * if there is a BIOS "reserved" and BUSY range.  If this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 			 * fails then continue anyway.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 			 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 			map->rsrc.name  = map->map_name;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 			map->rsrc.start = map->map.phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 			map->rsrc.end   = map->map.phys + map->mtd->size - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 			map->rsrc.flags = IORESOURCE_MEM | IORESOURCE_BUSY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 			if (request_resource(&window->rsrc, &map->rsrc)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 				printk(KERN_ERR MOD_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 					": cannot reserve MTD resource\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 				map->rsrc.parent = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 			}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 		/* Make the whole region visible in the map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 		map->map.virt = window->virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 		map->map.phys = window->phys;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 		cfi = map->map.fldrv_priv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 		for(i = 0; i < cfi->numchips; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 			cfi->chips[i].start += offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 		/* Now that the mtd devices is complete claim and export it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 		map->mtd->owner = THIS_MODULE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 		if (mtd_device_register(map->mtd, NULL, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 			map_destroy(map->mtd);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 			map->mtd = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 		/* Calculate the new value of map_top */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 		map_top += map->mtd->size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 		/* File away the map structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 		list_add(&map->list, &window->maps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 		map = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)  out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	/* Free any left over map structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	kfree(map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	/* See if I have any map structures */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	if (list_empty(&window->maps)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 		amd76xrom_cleanup(window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 		return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) static void amd76xrom_remove_one(struct pci_dev *pdev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	struct amd76xrom_window *window = &amd76xrom_window;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	amd76xrom_cleanup(window);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) static const struct pci_device_id amd76xrom_pci_tbl[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7410,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 		PCI_ANY_ID, PCI_ANY_ID, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	{ PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_VIPER_7440,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 		PCI_ANY_ID, PCI_ANY_ID, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	{ PCI_VENDOR_ID_AMD, 0x7468 }, /* amd8111 support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	{ 0, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) MODULE_DEVICE_TABLE(pci, amd76xrom_pci_tbl);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) static struct pci_driver amd76xrom_driver = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.name =		MOD_NAME,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.id_table =	amd76xrom_pci_tbl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.probe =	amd76xrom_init_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.remove =	amd76xrom_remove_one,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) static int __init init_amd76xrom(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	struct pci_dev *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	const struct pci_device_id *id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	pdev = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	for(id = amd76xrom_pci_tbl; id->vendor; id++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		pdev = pci_get_device(id->vendor, id->device, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 		if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	if (pdev) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 		return amd76xrom_init_one(pdev, &amd76xrom_pci_tbl[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	return pci_register_driver(&amd76xrom_driver);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) static void __exit cleanup_amd76xrom(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	amd76xrom_remove_one(amd76xrom_window.pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) module_init(init_amd76xrom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) module_exit(cleanup_amd76xrom);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) MODULE_AUTHOR("Eric Biederman <ebiederman@lnxi.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) MODULE_DESCRIPTION("MTD map driver for BIOS chips on the AMD76X southbridge");