Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) menu "Mapping drivers for chip access"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	depends on MTD!=n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) config MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 	bool "Support non-linear mappings of flash chips"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 	  This causes the chip drivers to allow for complicated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	  paged mappings of flash chips.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) config MTD_PHYSMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	tristate "Flash device in physical memory map"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 	depends on MTD_CFI || MTD_JEDECPROBE || MTD_ROM || MTD_RAM || MTD_LPDDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	  This provides a 'mapping' driver which allows the NOR Flash and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	  ROM driver code to communicate with chips which are mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	  physically into the CPU's memory. You will need to configure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	  the physical address and size of the flash chips on your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	  particular board as well as the bus width, either statically
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	  with config options or at run-time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 	  To compile this driver as a module, choose M here: the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 	  module will be called physmap.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) config MTD_PHYSMAP_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	bool "Physmap compat support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	depends on MTD_PHYSMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	default n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 	  Setup a simple mapping via the Kconfig options.  Normally the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 	  physmap configuration options are done via your board's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	  resource file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	  If unsure, say N here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) config MTD_PHYSMAP_START
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	hex "Physical start address of flash mapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 	depends on MTD_PHYSMAP_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 	default "0x8000000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	  This is the physical memory location at which the flash chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	  are mapped on your particular target board. Refer to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	  memory map which should hopefully be in the documentation for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	  your board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) config MTD_PHYSMAP_LEN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 	hex "Physical length of flash mapping"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	depends on MTD_PHYSMAP_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	default "0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	  This is the total length of the mapping of the flash chips on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	  your particular board. If there is space, or aliases, in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	  physical memory map between the chips, this could be larger
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	  than the total amount of flash present. Refer to the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	  map which should hopefully be in the documentation for your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	  board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) config MTD_PHYSMAP_BANKWIDTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	int "Bank width in octets"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	depends on MTD_PHYSMAP_COMPAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 	default "2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	  This is the total width of the data bus of the flash devices
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	  in octets. For example, if you have a data bus width of 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	  bits, you would set the bus width octet value to 4. This is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	  used internally by the CFI drivers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) config MTD_PHYSMAP_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	bool "Memory device in physical memory map based on OF description"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 	depends on OF && MTD_PHYSMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	  This provides a 'mapping' driver which allows the NOR Flash, ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	  and RAM driver code to communicate with chips which are mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	  physically into the CPU's memory. The mapping description here is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	  taken from OF device tree.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) config MTD_PHYSMAP_BT1_ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	bool "Baikal-T1 Boot ROMs OF-based physical memory map handling"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	depends on MTD_PHYSMAP_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	depends on MIPS_BAIKAL_T1 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	select MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	select MULTIPLEXER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	select MUX_MMIO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	  This provides some extra DT physmap parsing for the Baikal-T1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	  platforms, some detection and setting up ROMs-specific accessors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) config MTD_PHYSMAP_VERSATILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	bool "ARM Versatile OF-based physical memory map handling"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	depends on MTD_PHYSMAP_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	depends on MFD_SYSCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	default y if (ARCH_INTEGRATOR || ARCH_VERSATILE || ARCH_REALVIEW)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	  This provides some extra DT physmap parsing for the ARM Versatile
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	  platforms, basically to add a VPP (write protection) callback so
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	  the flash can be taken out of write protection.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) config MTD_PHYSMAP_GEMINI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	bool "Cortina Gemini OF-based physical memory map handling"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	depends on MTD_PHYSMAP_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	depends on MFD_SYSCON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	select MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	default ARCH_GEMINI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	  This provides some extra DT physmap parsing for the Gemini
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	  platforms, some detection and setting up parallel mode on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 	  external interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) config MTD_PHYSMAP_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	bool "Intel IXP4xx OF-based physical memory map handling"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	depends on MTD_PHYSMAP_OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	depends on ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	select MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	select MTD_CFI_BE_BYTE_SWAP if CPU_BIG_ENDIAN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	default ARCH_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	  This provides some extra DT physmap parsing for the Intel IXP4xx
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	  platforms, some elaborate endianness handling in particular.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) config MTD_PHYSMAP_GPIO_ADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	bool "GPIO-assisted Flash Chip Support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 	depends on MTD_PHYSMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	depends on GPIOLIB || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	depends on MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	  Extend the physmap driver to allow flashes to be partially
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	  physically addressed and assisted by GPIOs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) config MTD_PMC_MSP_EVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	tristate "CFI Flash device mapped on PMC-Sierra MSP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	depends on PMC_MSP && MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	  This provides a 'mapping' driver which supports the way
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	  in which user-programmable flash chips are connected on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	  PMC-Sierra MSP eval/demo boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) choice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	prompt "Maximum mappable memory available for flash IO"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	depends on MTD_PMC_MSP_EVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	default MSP_FLASH_MAP_LIMIT_32M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) config MSP_FLASH_MAP_LIMIT_32M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	bool "32M"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) endchoice
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config MSP_FLASH_MAP_LIMIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	hex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	default "0x02000000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	depends on MSP_FLASH_MAP_LIMIT_32M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) config MTD_SUN_UFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	tristate "Sun Microsystems userflash support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	depends on SPARC && MTD_CFI && PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	  This provides a 'mapping' driver which supports the way in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	  which user-programmable flash chips are connected on various
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	  Sun Microsystems boardsets.  This driver will require CFI support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	  in the kernel, so if you did not enable CFI previously, do that now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) config MTD_SC520CDP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	tristate "CFI Flash device mapped on AMD SC520 CDP"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	depends on (MELAN || COMPILE_TEST) && MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	  The SC520 CDP board has two banks of CFI-compliant chips and one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	  Dual-in-line JEDEC chip. This 'mapping' driver supports that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	  arrangement, implementing three MTD devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) config MTD_NETSC520
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	tristate "CFI Flash device mapped on AMD NetSc520"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	depends on (MELAN || COMPILE_TEST) && MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	  This enables access routines for the flash chips on the AMD NetSc520
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	  demonstration board. If you have one of these boards and would like
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	  to use the flash chips on it, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) config MTD_TS5500
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	tristate "JEDEC Flash device mapped on Technologic Systems TS-5500"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	depends on TS5500 || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	select MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	select MTD_CFI_AMDSTD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	  This provides a driver for the on-board flash of the Technologic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	  System's TS-5500 board. The 2MB flash is split into 3 partitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	  which are accessed as separate MTD devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	  mtd0 and mtd2 are the two BIOS drives, which use the resident
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	  flash disk (RFD) flash translation layer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	  mtd1 allows you to reprogram your BIOS. BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	  Note that jumper 3 ("Write Enable Drive A") must be set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	  otherwise detection won't succeed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) config MTD_SBC_GXX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	tristate "CFI Flash device mapped on Arcom SBC-GXx boards"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	depends on X86 && MTD_CFI_INTELEXT && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	  This provides a driver for the on-board flash of Arcom Control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	  Systems' SBC-GXn family of boards, formerly known as SBC-MediaGX.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	  By default the flash is split into 3 partitions which are accessed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 	  as separate MTD devices. This board utilizes Intel StrataFlash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	  More info at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	  <http://www.arcomcontrols.com/products/icp/pc104/processors/SBC_GX1.htm>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) config MTD_PXA2XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	tristate "CFI Flash device mapped on Intel XScale PXA2xx based boards"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	depends on (PXA25x || PXA27x) && MTD_CFI_INTELEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 	  This provides a driver for the NOR flash attached to a PXA2xx chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) config MTD_SCx200_DOCFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	tristate "Flash device mapped with DOCCS on NatSemi SCx200"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	depends on SCx200 && MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	  Enable support for a flash chip mapped using the DOCCS signal on a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	  National Semiconductor SCx200 processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 	  If you don't know what to do here, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	  If compiled as a module, it will be called scx200_docflash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) config MTD_AMD76XROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	tristate "BIOS flash chip on AMD76x southbridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 	depends on X86 && MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	  Support for treating the BIOS flash chip on AMD76x motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) config MTD_ICHXROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	tristate "BIOS flash chip on Intel Controller Hub 2/3/4/5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	depends on X86 && MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	  Support for treating the BIOS flash chip on ICHX motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) config MTD_ESB2ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	tristate "BIOS flash chip on Intel ESB Controller Hub 2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 	depends on X86 && MTD_JEDECPROBE && PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	  Support for treating the BIOS flash chip on ESB2 motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) config MTD_CK804XROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	tristate "BIOS flash chip on Nvidia CK804"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	depends on X86 && MTD_JEDECPROBE && PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	  Support for treating the BIOS flash chip on nvidia motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) config MTD_SCB2_FLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	tristate "BIOS flash chip on Intel SCB2 boards"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	depends on X86 && MTD_JEDECPROBE && PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 	  Support for treating the BIOS flash chip on Intel SCB2 boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) config MTD_TSUNAMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	tristate "Flash chips on Tsunami TIG bus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	depends on ALPHA_TSUNAMI && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	  Support for the flash chip on Tsunami TIG bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) config MTD_NETtel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 	tristate "CFI flash device on SnapGear/SecureEdge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	depends on X86 && MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	  Support for flash chips on NETtel/SecureEdge/SnapGear boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) config MTD_LANTIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	tristate "Lantiq SoC NOR support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	depends on LANTIQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	  Support for NOR flash attached to the Lantiq SoC's External Bus Unit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) config MTD_L440GX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	tristate "BIOS flash chip on Intel L440GX boards"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	depends on X86 && MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	  Support for treating the BIOS flash chip on Intel L440GX motherboards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	  as an MTD device - with this you can reprogram your BIOS.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	  BE VERY CAREFUL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) config MTD_CFI_FLAGADM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	tristate "CFI Flash device mapping on FlagaDM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	depends on PPC_8xx && MTD_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	  Mapping for the Flaga digital module. If you don't have one, ignore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	  this setting.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) config MTD_SOLUTIONENGINE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 	tristate "CFI Flash device mapped on Hitachi SolutionEngine"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) 	depends on SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	  This enables access to the flash chips on the Hitachi SolutionEngine and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	  similar boards. Say 'Y' if you are building a kernel for such a board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) config MTD_SA1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	tristate "CFI Flash device mapped on StrongARM SA11x0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	depends on MTD_CFI && ARCH_SA1100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	  This enables access to the flash chips on most platforms based on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	  the SA1100 and SA1110, including the Assabet and the Compaq iPAQ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	  If you have such a board, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) config MTD_DC21285
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	tristate "CFI Flash device mapped on DC21285 Footbridge"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	depends on MTD_CFI && ARCH_FOOTBRIDGE && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	  This provides a driver for the flash accessed using Intel's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	  21285 bridge used with Intel's StrongARM processors. More info at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	  <https://www.intel.com/design/bridge/docs/21285_documentation.htm>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) config MTD_IXP4XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	tristate "CFI Flash device mapped on Intel IXP4xx based systems"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	depends on MTD_CFI && MTD_COMPLEX_MAPPINGS && ARCH_IXP4XX && MTD_CFI_ADV_OPTIONS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	  This enables MTD access to flash devices on platforms based
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	  on Intel's IXP4xx family of network processors such as the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	  IXDP425 and Coyote. If you have an IXP4xx based board and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	  would like to use the flash chips on it, say 'Y'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) config MTD_IMPA7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	tristate "JEDEC Flash device mapped on impA7"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 	depends on ARM && MTD_JEDECPROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	  This enables access to the NOR Flash on the impA7 board of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 	  implementa GmbH. If you have such a board, say 'Y' here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) # This needs CFI or JEDEC, depending on the cards found.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) config MTD_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 	tristate "PCI MTD driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) 	depends on PCI && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	  Mapping for accessing flash devices on add-in cards like the Intel XScale
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	  IQ80310 card, and the Intel EBSA285 card in blank ROM programming mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	  (please see the manual for the link settings).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	  If you are not sure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) config MTD_PCMCIA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	tristate "PCMCIA MTD driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	depends on PCMCIA && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	  Map driver for accessing PCMCIA linear flash memory cards. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) 	  cards are usually around 4-16MiB in size. This does not include
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	  Compact Flash cards which are treated as IDE devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) config MTD_PCMCIA_ANONYMOUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	bool "Use PCMCIA MTD drivers for anonymous PCMCIA cards"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	depends on MTD_PCMCIA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	  If this option is enabled, PCMCIA cards which do not report
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	  anything about themselves are assumed to be MTD cards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	  If unsure, say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) config MTD_UCLINUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) 	bool "Generic uClinux RAM/ROM filesystem support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) 	depends on (MTD_RAM=y || MTD_ROM=y) && (!MMU || COLDFIRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) 	  Map driver to support image based filesystems for uClinux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) config MTD_INTEL_VR_NOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) 	tristate "NOR flash on Intel Vermilion Range Expansion Bus CS0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) 	  Map driver for a NOR flash bank located on the Expansion Bus of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) 	  Intel Vermilion Range chipset.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) config MTD_RBTX4939
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) 	tristate "Map driver for RBTX4939 board"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) 	depends on TOSHIBA_RBTX4939 && MTD_CFI && MTD_COMPLEX_MAPPINGS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) 	  Map driver for NOR flash chips on RBTX4939 board.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) config MTD_PLATRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) 	tristate "Map driver for platform device RAM (mtd-ram)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) 	select MTD_RAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) 	  Map driver for RAM areas described via the platform device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) 	  system.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) 	  This selection automatically selects the map_ram driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) config MTD_VMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) 	tristate "Map driver for Dreamcast VMU"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) 	depends on MAPLE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) 	  This driver enables access to the Dreamcast Visual Memory Unit (VMU).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) 	  Most Dreamcast users will want to say Y here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) 	  To build this as a module select M here, the module will be called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) 	  vmu-flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) config MTD_PISMO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) 	tristate "MTD discovery driver for PISMO modules"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) 	depends on I2C
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) 	depends on ARCH_VERSATILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) 	  This driver allows for discovery of PISMO modules - see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) 	  <http://www.pismoworld.org/>.  These are small modules containing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) 	  up to five memory devices (eg, SRAM, flash, DOC) described by an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) 	  I2C EEPROM.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) 	  This driver does not create any MTD maps itself; instead it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) 	  creates MTD physmap and MTD SRAM platform devices.  If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) 	  enable this option, you should consider enabling MTD_PHYSMAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) 	  and/or MTD_PLATRAM according to the devices on your module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) 	  When built as a module, it will be called pismo.ko
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) endmenu