Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) menu "LPDDR & LPDDR2 PCM memory drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) 	depends on MTD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) config MTD_LPDDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 	tristate "Support for LPDDR flash chips"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 	select MTD_QINFO_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 	  This option enables support of LPDDR (Low power double data rate)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 	  flash chips. Synonymous with Mobile-DDR. It is a new standard for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 	  DDR memories, intended for battery-operated systems.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) config MTD_QINFO_PROBE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	depends on MTD_LPDDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	tristate "Detect flash chips by QINFO probe"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	  Device Information for LPDDR chips is offered through the Overlay
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	  Window QINFO interface, permits software to be used for entire
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	  families of devices. This serves similar purpose of CFI on legacy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	  Flash products
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) config MTD_LPDDR2_NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	# ARM dependency is only for writel_relaxed()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	depends on MTD && ARM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	tristate "Support for LPDDR2-NVM flash chips"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	  This option enables support of PCM memories with a LPDDR2-NVM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	  (Low power double data rate 2) interface.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) endmenu