Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0-or-later */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Handles the M-Systems DiskOnChip G3 chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * Copyright (C) 2011 Robert Jarzmik
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) #ifndef _MTD_DOCG3_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #define _MTD_DOCG3_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/mtd/mtd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  * Flash memory areas :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  *   - 0x0000 .. 0x07ff : IPL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *   - 0x0800 .. 0x0fff : Data area
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *   - 0x1000 .. 0x17ff : Registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *   - 0x1800 .. 0x1fff : Unknown
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define DOC_IOSPACE_IPL			0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #define DOC_IOSPACE_DATA		0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #define DOC_IOSPACE_SIZE		0x2000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * DOC G3 layout and adressing scheme
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  *   A page address for the block "b", plane "P" and page "p":
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  *   address = [bbbb bPpp pppp]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define DOC_ADDR_PAGE_MASK		0x3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define DOC_ADDR_BLOCK_SHIFT		6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define DOC_LAYOUT_NBPLANES		2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define DOC_LAYOUT_PAGES_PER_BLOCK	64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #define DOC_LAYOUT_PAGE_SIZE		512
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define DOC_LAYOUT_OOB_SIZE		16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) #define DOC_LAYOUT_WEAR_SIZE		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #define DOC_LAYOUT_PAGE_OOB_SIZE				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	(DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #define DOC_LAYOUT_WEAR_OFFSET		(DOC_LAYOUT_PAGE_OOB_SIZE * 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #define DOC_LAYOUT_BLOCK_SIZE					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	(DOC_LAYOUT_PAGES_PER_BLOCK * DOC_LAYOUT_PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44)  * ECC related constants
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define DOC_ECC_BCH_M			14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define DOC_ECC_BCH_T			4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define DOC_ECC_BCH_PRIMPOLY		0x4443
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define DOC_ECC_BCH_SIZE		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define DOC_ECC_BCH_COVERED_BYTES				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	(DOC_LAYOUT_PAGE_SIZE + DOC_LAYOUT_OOB_PAGEINFO_SZ +	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	 DOC_LAYOUT_OOB_HAMMING_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define DOC_ECC_BCH_TOTAL_BYTES					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	(DOC_ECC_BCH_COVERED_BYTES + DOC_LAYOUT_OOB_BCH_SZ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57)  * Blocks distribution
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define DOC_LAYOUT_BLOCK_BBT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define DOC_LAYOUT_BLOCK_OTP		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define DOC_LAYOUT_BLOCK_FIRST_DATA	6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define DOC_LAYOUT_PAGE_BBT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66)  * Extra page OOB (16 bytes wide) layout
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define DOC_LAYOUT_OOB_PAGEINFO_OFS	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define DOC_LAYOUT_OOB_HAMMING_OFS	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define DOC_LAYOUT_OOB_BCH_OFS		8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define DOC_LAYOUT_OOB_UNUSED_OFS	15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define DOC_LAYOUT_OOB_PAGEINFO_SZ	7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define DOC_LAYOUT_OOB_HAMMING_SZ	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define DOC_LAYOUT_OOB_BCH_SZ		7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define DOC_LAYOUT_OOB_UNUSED_SZ	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define DOC_CHIPID_G3			0x200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define DOC_ERASE_MARK			0xaa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define DOC_MAX_NBFLOORS		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82)  * Flash registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define DOC_CHIPID			0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define DOC_TEST			0x1004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define DOC_BUSLOCK			0x1006
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define DOC_ENDIANCONTROL		0x1008
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define DOC_DEVICESELECT		0x100a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define DOC_ASICMODE			0x100c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define DOC_CONFIGURATION		0x100e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define DOC_INTERRUPTCONTROL		0x1010
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define DOC_READADDRESS			0x101a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define DOC_DATAEND			0x101e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define DOC_INTERRUPTSTATUS		0x1020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define DOC_FLASHSEQUENCE		0x1032
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define DOC_FLASHCOMMAND		0x1034
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define DOC_FLASHADDRESS		0x1036
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define DOC_FLASHCONTROL		0x1038
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define DOC_NOP				0x103e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define DOC_ECCCONF0			0x1040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define DOC_ECCCONF1			0x1042
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define DOC_ECCPRESET			0x1044
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define DOC_HAMMINGPARITY		0x1046
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define DOC_BCH_HW_ECC(idx)		(0x1048 + idx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define DOC_PROTECTION			0x1056
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define DOC_DPS0_KEY			0x105c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define DOC_DPS1_KEY			0x105e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define DOC_DPS0_ADDRLOW		0x1060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define DOC_DPS0_ADDRHIGH		0x1062
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define DOC_DPS1_ADDRLOW		0x1064
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define DOC_DPS1_ADDRHIGH		0x1066
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define DOC_DPS0_STATUS			0x106c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define DOC_DPS1_STATUS			0x106e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define DOC_ASICMODECONFIRM		0x1072
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define DOC_CHIPID_INV			0x1074
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define DOC_POWERMODE			0x107c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)  * Flash sequences
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)  * A sequence is preset before one or more commands are input to the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define DOC_SEQ_RESET			0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define DOC_SEQ_PAGE_SIZE_532		0x03
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define DOC_SEQ_SET_FASTMODE		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define DOC_SEQ_SET_RELIABLEMODE	0x09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) #define DOC_SEQ_READ			0x12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #define DOC_SEQ_SET_PLANE1		0x0e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define DOC_SEQ_SET_PLANE2		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) #define DOC_SEQ_PAGE_SETUP		0x1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #define DOC_SEQ_ERASE			0x27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) #define DOC_SEQ_PLANES_STATUS		0x31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * Flash commands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) #define DOC_CMD_READ_PLANE1		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define DOC_CMD_SET_ADDR_READ		0x05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) #define DOC_CMD_READ_ALL_PLANES		0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) #define DOC_CMD_READ_PLANE2		0x50
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) #define DOC_CMD_READ_FLASH		0xe0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) #define DOC_CMD_PAGE_SIZE_532		0x3c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #define DOC_CMD_PROG_BLOCK_ADDR		0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) #define DOC_CMD_PROG_CYCLE1		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #define DOC_CMD_PROG_CYCLE2		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) #define DOC_CMD_PROG_CYCLE3		0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) #define DOC_CMD_ERASECYCLE2		0xd0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) #define DOC_CMD_READ_STATUS		0x70
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) #define DOC_CMD_PLANES_STATUS		0x71
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define DOC_CMD_RELIABLE_MODE		0x22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define DOC_CMD_FAST_MODE		0xa2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #define DOC_CMD_RESET			0xff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)  * Flash register : DOC_FLASHCONTROL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define DOC_CTRL_VIOLATION		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define DOC_CTRL_CE			0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define DOC_CTRL_UNKNOWN_BITS		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define DOC_CTRL_PROTECTION_ERROR	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define DOC_CTRL_SEQUENCE_ERROR		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define DOC_CTRL_FLASHREADY		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)  * Flash register : DOC_ASICMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define DOC_ASICMODE_RESET		0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define DOC_ASICMODE_NORMAL		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define DOC_ASICMODE_POWERDOWN		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define DOC_ASICMODE_MDWREN		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define DOC_ASICMODE_BDETCT_RESET	0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define DOC_ASICMODE_RSTIN_RESET	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define DOC_ASICMODE_RAM_WE		0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)  * Flash register : DOC_ECCCONF0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define DOC_ECCCONF0_WRITE_MODE		0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define DOC_ECCCONF0_READ_MODE		0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) #define DOC_ECCCONF0_AUTO_ECC_ENABLE	0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #define DOC_ECCCONF0_HAMMING_ENABLE	0x1000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define DOC_ECCCONF0_BCH_ENABLE		0x0800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) #define DOC_ECCCONF0_DATA_BYTES_MASK	0x07ff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)  * Flash register : DOC_ECCCONF1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #define DOC_ECCCONF1_BCH_SYNDROM_ERR	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) #define DOC_ECCCONF1_UNKOWN1		0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define DOC_ECCCONF1_PAGE_IS_WRITTEN	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) #define DOC_ECCCONF1_UNKOWN3		0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) #define DOC_ECCCONF1_HAMMING_BITS_MASK	0x0f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)  * Flash register : DOC_PROTECTION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define DOC_PROTECT_FOUNDRY_OTP_LOCK	0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #define DOC_PROTECT_CUSTOMER_OTP_LOCK	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) #define DOC_PROTECT_LOCK_INPUT		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #define DOC_PROTECT_STICKY_LOCK		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) #define DOC_PROTECT_PROTECTION_ENABLED	0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define DOC_PROTECT_IPL_DOWNLOAD_LOCK	0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #define DOC_PROTECT_PROTECTION_ERROR	0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212)  * Flash register : DOC_DPS0_STATUS and DOC_DPS1_STATUS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #define DOC_DPS_OTP_PROTECTED		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #define DOC_DPS_READ_PROTECTED		0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) #define DOC_DPS_WRITE_PROTECTED		0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) #define DOC_DPS_HW_LOCK_ENABLED		0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) #define DOC_DPS_KEY_OK			0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221)  * Flash register : DOC_CONFIGURATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) #define DOC_CONF_IF_CFG			0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) #define DOC_CONF_MAX_ID_MASK		0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) #define DOC_CONF_VCCQ_3V		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)  * Flash register : DOC_READADDRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) #define DOC_READADDR_INC		0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #define DOC_READADDR_ONE_BYTE		0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) #define DOC_READADDR_ADDR_MASK		0x1fff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)  * Flash register : DOC_POWERMODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #define DOC_POWERDOWN_READY		0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240)  * Status of erase and write operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #define DOC_PLANES_STATUS_FAIL		0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #define DOC_PLANES_STATUS_PLANE0_KO	0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) #define DOC_PLANES_STATUS_PLANE1_KO	0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)  * DPS key management
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249)  * Each floor of docg3 has 2 protection areas: DPS0 and DPS1. These areas span
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)  * across block boundaries, and define whether these blocks can be read or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)  * written.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252)  * The definition is dynamically stored in page 0 of blocks (2,3) for DPS0, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)  * page 0 of blocks (4,5) for DPS1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define DOC_LAYOUT_DPS_KEY_LENGTH	8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)  * struct docg3_cascade - Cascade of 1 to 4 docg3 chips
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)  * @floors: floors (ie. one physical docg3 chip is one floor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260)  * @base: IO space to access all chips in the cascade
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)  * @bch: the BCH correcting control structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262)  * @lock: lock to protect docg3 IO space from concurrent accesses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) struct docg3_cascade {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	struct mtd_info *floors[DOC_MAX_NBFLOORS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	struct bch_control *bch;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 	struct mutex lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272)  * struct docg3 - DiskOnChip driver private data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)  * @dev: the device currently under control
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274)  * @cascade: the cascade this device belongs to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275)  * @device_id: number of the cascaded DoCG3 device (0, 1, 2 or 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276)  * @if_cfg: if true, reads are on 16bits, else reads are on 8bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278)  * @reliable: if 0, docg3 in normal mode, if 1 docg3 in fast mode, if 2 in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)  *            reliable mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)  *            Fast mode implies more errors than normal mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)  *            Reliable mode implies that page 2*n and 2*n+1 are clones.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)  * @bbt: bad block table cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)  * @oob_write_ofs: offset of the MTD where this OOB should belong (ie. in next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)  *                 page_write)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285)  * @oob_autoecc: if 1, use only bytes 0-7, 15, and fill the others with HW ECC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)  *               if 0, use all the 16 bytes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)  * @oob_write_buf: prepared OOB for next page_write
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) struct docg3 {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 	struct device *dev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	struct docg3_cascade *cascade;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	unsigned int device_id:4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	unsigned int if_cfg:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 	unsigned int reliable:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	int max_block;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	u8 *bbt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	loff_t oob_write_ofs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 	int oob_autoecc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) 	u8 oob_write_buf[DOC_LAYOUT_OOB_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) #define doc_err(fmt, arg...) dev_err(docg3->dev, (fmt), ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #define doc_info(fmt, arg...) dev_info(docg3->dev, (fmt), ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) #define doc_dbg(fmt, arg...) dev_dbg(docg3->dev, (fmt), ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #define doc_vdbg(fmt, arg...) dev_vdbg(docg3->dev, (fmt), ## arg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)  * Trace events part
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #undef TRACE_SYSTEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) #define TRACE_SYSTEM docg3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) #if !defined(_MTD_DOCG3_TRACE) || defined(TRACE_HEADER_MULTI_READ)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) #define _MTD_DOCG3_TRACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) #include <linux/tracepoint.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) TRACE_EVENT(docg3_io,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	    TP_PROTO(int op, int width, u16 reg, int val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	    TP_ARGS(op, width, reg, val),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	    TP_STRUCT__entry(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 		    __field(int, op)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 		    __field(unsigned char, width)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 		    __field(u16, reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 		    __field(int, val)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	    TP_fast_assign(
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 		    __entry->op = op;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 		    __entry->width = width;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 		    __entry->reg = reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 		    __entry->val = val;),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	    TP_printk("docg3: %s%02d reg=%04x, val=%04x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 		      __entry->op ? "write" : "read", __entry->width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 		      __entry->reg, __entry->val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 	);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) /* This part must be outside protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) #undef TRACE_INCLUDE_PATH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) #undef TRACE_INCLUDE_FILE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #define TRACE_INCLUDE_PATH .
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #define TRACE_INCLUDE_FILE docg3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) #include <trace/define_trace.h>