Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) # SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) menu "Self-contained MTD device drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) 	depends on MTD!=n
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 	depends on HAS_IOMEM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) config MTD_PMC551
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) 	tristate "Ramix PMC551 PCI Mezzanine RAM card support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 	depends on PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) 	  This provides a MTD device driver for the Ramix PMC551 RAM PCI card
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 	  from Ramix Inc. <http://www.ramix.com/products/memory/pmc551.html>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 	  These devices come in memory configurations from 32M - 1G.  If you
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 	  have one, you probably want to enable this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 	  If this driver is compiled as a module you get the ability to select
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	  the size of the aperture window pointing into the devices memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	  What this means is that if you have a 1G card, normally the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 	  will use a 1G memory map as its view of the device.  As a module,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 	  you can select a 1M window into the memory and the driver will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 	  "slide" the window around the PMC551's memory.  This was
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 	  particularly useful on the 2.2 kernels on PPC architectures as there
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	  was limited kernel space to deal with.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) config MTD_PMC551_BUGFIX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) 	bool "PMC551 256M DRAM Bugfix"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) 	depends on MTD_PMC551
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	  Some of Ramix's PMC551 boards with 256M configurations have invalid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 	  column and row mux values.  This option will fix them, but will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 	  break other memory configurations.  If unsure say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) config MTD_PMC551_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 	bool "PMC551 Debugging"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 	depends on MTD_PMC551
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	  This option makes the PMC551 more verbose during its operation and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	  is only really useful if you are developing on this driver or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	  suspect a possible hardware or driver bug.  If unsure say N.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) config MTD_MS02NV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	tristate "DEC MS02-NV NVRAM module support"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	depends on MACH_DECSTATION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	  This is an MTD driver for the DEC's MS02-NV (54-20948-01) battery
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 	  backed-up NVRAM module.  The module was originally meant as an NFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 	  accelerator.  Say Y here if you have a DECstation 5000/2x0 or a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 	  DECsystem 5900 equipped with such a module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	  If you want to compile this driver as a module ( = code which can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	  inserted in and removed from the running kernel whenever you want),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	  say M here and read <file:Documentation/kbuild/modules.rst>.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	  The module will be called ms02-nv.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) config MTD_DATAFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	tristate "Support for AT45xxx DataFlash"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 	depends on SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	  This enables access to AT45xxx DataFlash chips, using SPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	  Sometimes DataFlash chips are packaged inside MMC-format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	  cards; at this writing, the MMC stack won't handle those.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) config MTD_DATAFLASH_WRITE_VERIFY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	bool "Verify DataFlash page writes"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	depends on MTD_DATAFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 	  This adds an extra check when data is written to the flash.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	  It may help if you are verifying chip setup (timings etc) on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	  your board.  There is a rare possibility that even though the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	  device thinks the write was successful, a bit could have been
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	  flipped accidentally due to device wear or something else.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) config MTD_DATAFLASH_OTP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	bool "DataFlash OTP support (Security Register)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	depends on MTD_DATAFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	  Newer DataFlash chips (revisions C and D) support 128 bytes of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	  one-time-programmable (OTP) data.  The first half may be written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	  (once) with up to 64 bytes of data, such as a serial number or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	  other key product data.  The second half is programmed with a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	  unique-to-each-chip bit pattern at the factory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) config MTD_MCHP23K256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	tristate "Microchip 23K256 SRAM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	depends on SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	  This enables access to Microchip 23K256 SRAM chips, using SPI.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	  Set up your spi devices with the right board-specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 	  platform data, or a device tree description if you want to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	  specify device partitioning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) config MTD_SPEAR_SMI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	tristate "SPEAR MTD NOR Support through SMI controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 	depends on PLAT_SPEAR || COMPILE_TEST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	default y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	  This enable SNOR support on SPEAR platforms using SMI controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) config MTD_SST25L
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	tristate "Support SST25L (non JEDEC) SPI Flash chips"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	depends on SPI_MASTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	  This enables access to the non JEDEC SST25L SPI flash chips, used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	  for program and data storage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	  Set up your spi devices with the right board-specific platform data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	  if you want to specify device partitioning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) config MTD_BCM47XXSFLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	tristate "Support for serial flash on BCMA bus"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	depends on BCMA_SFLASH && (MIPS || ARM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	  BCMA bus can have various flash memories attached, they are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	  registered by bcma as platform devices. This enables driver for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	  serial flash memories.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) config MTD_SLRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	tristate "Uncached system RAM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	  If your CPU cannot cache all of the physical memory in your machine,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	  you can still use it for storage or swap by using this driver to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	  present it to the system as a Memory Technology Device.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) config MTD_PHRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	tristate "Physical system RAM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	  This is a re-implementation of the slram driver above.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	  Use this driver to access physical memory that the kernel proper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	  doesn't have access to, memory beyond the mem=xxx limit, nvram,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 	  memory on the video card, etc...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) config MTD_LART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	tristate "28F160xx flash driver for LART"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	depends on SA1100_LART
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	  This enables the flash driver for LART. Please note that you do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	  not need any mapping/chip driver for LART. This one does it all
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	  for you, so go disable all of those if you enabled some of them (:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) config MTD_MTDRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	tristate "Test driver using RAM"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	  This enables a test MTD device driver which uses vmalloc() to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	  provide storage.  You probably want to say 'N' unless you're
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	  testing stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) config MTDRAM_TOTAL_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	int "MTDRAM device size in KiB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	depends on MTD_MTDRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	default "4096"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	  This allows you to configure the total size of the MTD device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	  emulated by the MTDRAM driver.  If the MTDRAM driver is built
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	  as a module, it is also possible to specify this as a parameter when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	  loading the module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) config MTDRAM_ERASE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	int "MTDRAM erase block size in KiB"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	depends on MTD_MTDRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	default "128"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	  This allows you to configure the size of the erase blocks in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	  device emulated by the MTDRAM driver.  If the MTDRAM driver is built
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	  as a module, it is also possible to specify this as a parameter when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	  loading the module.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) config MTD_BLOCK2MTD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	tristate "MTD using block device"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	depends on BLOCK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	  This driver allows a block device to appear as an MTD. It would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	  generally be used in the following cases:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	  Using Compact Flash as an MTD, these usually present themselves to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	  the system as an ATA drive.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	  Testing MTD users (eg JFFS2) on large media and media that might
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	  be removed during a write (using the floppy drive).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) config MTD_POWERNV_FLASH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	tristate "powernv flash MTD driver"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	depends on PPC_POWERNV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	  This provides an MTD device to access flash on powernv OPAL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	  platforms from Linux. This device abstracts away the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	  firmware interface for flash access.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) comment "Disk-On-Chip Device Drivers"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) config MTD_DOCG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	tristate "M-Systems Disk-On-Chip G3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	select BCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	select BCH_CONST_PARAMS if !MTD_NAND_ECC_SW_BCH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	select BITREVERSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	  This provides an MTD device driver for the M-Systems DiskOnChip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	  G3 devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	  The driver provides access to G3 DiskOnChip, distributed by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	  M-Systems and now Sandisk. The support is very experimental,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	  and doesn't give access to any write operations.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) config MTD_ST_SPI_FSM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	tristate "ST Microelectronics SPI FSM Serial Flash Controller"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	depends on ARCH_STI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	help
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	  This provides an MTD device driver for the ST Microelectronics
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	  SPI Fast Sequence Mode (FSM) Serial Flash Controller and support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	  for a subset of connected Serial Flash devices.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if MTD_DOCG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) config BCH_CONST_M
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	default 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) config BCH_CONST_T
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	default 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) endmenu