^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Common Flash Interface probe code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) (C) 2000 Red Hat. GPL'd.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/slab.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/mtd/xip.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/mtd/map.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/mtd/cfi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/mtd/gen_probe.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) //#define DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #ifdef DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static void print_cfi_ident(struct cfi_ident *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) static int cfi_probe_chip(struct map_info *map, __u32 base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned long *chip_map, struct cfi_private *cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) struct mtd_info *cfi_probe(struct map_info *map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #ifdef CONFIG_MTD_XIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /* only needed for short periods, so this is rather simple */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define xip_disable() local_irq_disable()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define xip_allowed(base, map) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) (void) map_read(map, base); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) xip_iprefetch(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) local_irq_enable(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define xip_enable(base, map, cfi) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) cfi_qry_mode_off(base, map, cfi); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) xip_allowed(base, map); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define xip_disable_qry(base, map, cfi) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) do { \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) xip_disable(); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) cfi_qry_mode_on(base, map, cfi); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define xip_disable() do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define xip_allowed(base, map) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define xip_enable(base, map, cfi) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define xip_disable_qry(base, map, cfi) do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * This fixup occurs immediately after reading the CFI structure and can affect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * the number of chips detected, unlike cfi_fixup, which occurs after an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * mtd_info structure has been created for the chip.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) struct cfi_early_fixup {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) uint16_t mfr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) uint16_t id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) void (*fixup)(struct cfi_private *cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) static void cfi_early_fixup(struct cfi_private *cfi,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) const struct cfi_early_fixup *fixups)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) const struct cfi_early_fixup *f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) for (f = fixups; f->fixup; f++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) f->fixup(cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) /* check for QRY.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) in: interleave,type,mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ret: table index, <0 for error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned long *chip_map, struct cfi_private *cfi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) if ((base + 0) >= map->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) printk(KERN_NOTICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) (unsigned long)base, map->size -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if ((base + 0xff) >= map->size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) printk(KERN_NOTICE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) (unsigned long)base + 0x55, map->size -1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) xip_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) if (!cfi_qry_mode_on(base, map, cfi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) xip_enable(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) if (!cfi->numchips) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /* This is the first time we're called. Set up the CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) stuff accordingly and return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) return cfi_chip_setup(map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* Check each previous chip to see if it's an alias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) for (i=0; i < (base >> cfi->chipshift); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) unsigned long start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if(!test_bit(i, chip_map)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) /* Skip location; no valid chip at this address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) start = i << cfi->chipshift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* This chip should be in read mode if it's one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) we've already touched. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) if (cfi_qry_present(map, start, cfi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) /* Eep. This chip also had the QRY marker.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * Is it an alias for the new one? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) cfi_qry_mode_off(start, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) /* If the QRY marker goes away, it's an alias */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) if (!cfi_qry_present(map, start, cfi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) xip_allowed(base, map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) map->name, base, start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Yes, it's actually got QRY for data. Most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * unfortunate. Stick the new chip in read mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) * too and if it's the same, assume it's an alias. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /* FIXME: Use other modes to do a proper check */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) cfi_qry_mode_off(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) if (cfi_qry_present(map, base, cfi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) xip_allowed(base, map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) map->name, base, start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* OK, if we got to here, then none of the previous chips appear to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) be aliases for the current one. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) cfi->numchips++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) /* Put it back into Read Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) cfi_qry_mode_off(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) xip_allowed(base, map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) map->name, cfi->interleave, cfi->device_type*8, base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) map->bankwidth*8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) static void fixup_s70gl02gs_chips(struct cfi_private *cfi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * S70GL02GS flash reports a single 256 MiB chip, but is really made up
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * of two 128 MiB chips with 1024 sectors each.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) cfi->cfiq->DevSize = 27;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) cfi->cfiq->EraseRegionInfo[0] = 0x20003ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) static const struct cfi_early_fixup cfi_early_fixup_table[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) { CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) { },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int __xipram cfi_chip_setup(struct map_info *map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) struct cfi_private *cfi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) int ofs_factor = cfi->interleave*cfi->device_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) __u32 base = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) xip_enable(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) #ifdef DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) printk("Number of erase regions: %d\n", num_erase_regions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) if (!num_erase_regions)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) if (!cfi->cfiq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) memset(cfi->cfiq,0,sizeof(struct cfi_ident));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) cfi->cfi_mode = CFI_MODE_CFI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) cfi->sector_erase_cmd = CMD(0x30);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /* Read the CFI info structure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) xip_disable_qry(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /* Do any necessary byteswapping */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) #ifdef DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) /* Dump the information therein */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) print_cfi_ident(cfi->cfiq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) #ifdef DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) printk(" Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) addr_unlock1 = 0x5555;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) addr_unlock2 = 0x2AAA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) * Note we put the device back into Read Mode BEFORE going into Auto
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) * Select Mode, as some devices support nesting of modes, others
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) * don't. This way should always work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) * so should be treated as nops or illegal (and so put the device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) * back into Read Mode, which is a nop in this case).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) cfi_send_gen_cmd(0xf0, 0, base, map, cfi, cfi->device_type, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) cfi->mfr = cfi_read_query16(map, base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) cfi->id = cfi_read_query16(map, base + ofs_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* Get AMD/Spansion extended JEDEC ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) cfi_read_query(map, base + 0xf * ofs_factor);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) /* Put it back into Read Mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) cfi_qry_mode_off(base, map, cfi);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) xip_allowed(base, map);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) cfi_early_fixup(cfi, cfi_early_fixup_table);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) map->name, cfi->interleave, cfi->device_type*8, base,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) map->bankwidth*8, cfi->mfr, cfi->id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) #ifdef DEBUG_CFI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) static char *vendorname(__u16 vendor)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) switch (vendor) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) case P_ID_NONE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) return "None";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) case P_ID_INTEL_EXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) return "Intel/Sharp Extended";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) case P_ID_AMD_STD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) return "AMD/Fujitsu Standard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) case P_ID_INTEL_STD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) return "Intel/Sharp Standard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) case P_ID_AMD_EXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) return "AMD/Fujitsu Extended";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) case P_ID_WINBOND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) return "Winbond Standard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) case P_ID_ST_ADV:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) return "ST Advanced";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) case P_ID_MITSUBISHI_STD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) return "Mitsubishi Standard";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) case P_ID_MITSUBISHI_EXT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return "Mitsubishi Extended";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) case P_ID_SST_PAGE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return "SST Page Write";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) case P_ID_SST_OLD:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) return "SST 39VF160x/39VF320x";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) case P_ID_INTEL_PERFORMANCE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) return "Intel Performance Code";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) case P_ID_INTEL_DATA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) return "Intel Data";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) case P_ID_RESERVED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) return "Not Allowed / Reserved for Future Use";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) return "Unknown";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) static void print_cfi_ident(struct cfi_ident *cfip)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) printk("Invalid CFI ident structure.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) if (cfip->P_ADR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) printk("No Primary Algorithm Table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) if (cfip->A_ADR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) printk("No Alternate Algorithm Table\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) if (cfip->VppMin) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) printk("No Vpp line\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) printk("Full buffer write not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) printk("Chip erase not supported\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) switch(cfip->InterfaceDesc) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) case CFI_INTERFACE_X8_ASYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) printk(" - x8-only asynchronous interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) case CFI_INTERFACE_X16_ASYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) printk(" - x16-only asynchronous interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) case CFI_INTERFACE_X8_BY_X16_ASYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) printk(" - supports x8 and x16 via BYTE# with asynchronous interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) case CFI_INTERFACE_X32_ASYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) printk(" - x32-only asynchronous interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) case CFI_INTERFACE_X16_BY_X32_ASYNC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) printk(" - supports x16 and x32 via Word# with asynchronous interface\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) case CFI_INTERFACE_NOT_ALLOWED:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) printk(" - Not Allowed / Reserved\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) printk(" - Unknown\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) #endif /* DEBUG_CFI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) static struct chip_probe cfi_chip_probe = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) .name = "CFI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .probe_chip = cfi_probe_chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) struct mtd_info *cfi_probe(struct map_info *map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * Just use the generic probe stuff to call our CFI-specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * chip_probe routine in all the possible permutations, etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) return mtd_do_chip_probe(map, &cfi_chip_probe);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) static struct mtd_chip_driver cfi_chipdrv = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .probe = cfi_probe,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .name = "cfi_probe",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .module = THIS_MODULE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) static int __init cfi_probe_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) register_mtd_chip_driver(&cfi_chipdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) static void __exit cfi_probe_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) unregister_mtd_chip_driver(&cfi_chipdrv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) module_init(cfi_probe_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) module_exit(cfi_probe_exit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags